001package org.jikesrvm.compilers.opt.mir2mc.ia32; 002 003import static org.jikesrvm.compilers.opt.ir.Operators.*; 004 005import org.jikesrvm.*; 006 007import org.jikesrvm.compilers.opt.*; 008 009import org.jikesrvm.compilers.opt.ir.*; 010 011import org.jikesrvm.compilers.opt.ir.ia32.*; 012 013import static org.jikesrvm.compilers.opt.ir.ia32.ArchOperators.*; 014 015import static org.jikesrvm.compilers.opt.OptimizingCompilerException.opt_assert; 016 017 018 019/** 020 * This class is the automatically-generated assembler for 021 * the optimizing compiler. It consists of methods that 022 * understand the possible operand combinations of each 023 * instruction type, and how to translate those operands to 024 * calls to the Assember low-level emit method 025 * 026 * It is generated by GenerateAssembler.java 027 * 028 */ 029public class AssemblerOpt extends AssemblerBase { 030 031 /** 032 * @param bcSize initial machine code buffer size. 033 * @param print whether to dump generated machine code. 034 * @param ir the IR object for the opt compilation. 035 * @see org.jikesrvm.compilers.common.assembler.ia32.Assembler 036 */ 037 public AssemblerOpt(int bcSize, boolean print, IR ir) { 038 super(bcSize, print, ir); 039 } 040 041 /** 042 * Emit the given instruction, assuming that 043 * it is a MIR_BinaryAcc instruction 044 * and has a ORPS operator 045 * 046 * @param inst the instruction to assemble 047 */ 048 private void doORPS(Instruction inst) { 049 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 050 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 051 emitORPS_Reg_Reg( 052 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 053 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 054 055 } else { 056 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 057 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 058 emitORPS_Reg_Abs( 059 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 060 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 061 062 } else { 063 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 064 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 065 emitORPS_Reg_RegDisp( 066 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 067 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 068 069 } else { 070 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 071 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 072 emitORPS_Reg_RegOff( 073 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 074 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 075 076 } else { 077 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 078 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 079 emitORPS_Reg_RegIdx( 080 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 081 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 082 083 } else { 084 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 085 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 086 emitORPS_Reg_RegInd( 087 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 088 getBase(MIR_BinaryAcc.getValue(inst))); 089 } 090 } 091 } 092 } 093 } 094 } 095 096 /** 097 * Emit the given instruction, assuming that 098 * it is a MIR_Unary instruction 099 * and has a CVTSD2SIQ operator 100 * 101 * @param inst the instruction to assemble 102 */ 103 private void doCVTSD2SIQ(Instruction inst) { 104 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 105 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 106 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 107 emitCVTSD2SIQ_Reg_Reg_Quad( 108 getGPR_Reg(MIR_Unary.getResult(inst)), 109 getXMM_Reg(MIR_Unary.getVal(inst))); 110 111 } else { 112 if (isAbs(MIR_Unary.getVal(inst))) { 113 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 114 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 115 emitCVTSD2SIQ_Reg_Abs_Quad( 116 getGPR_Reg(MIR_Unary.getResult(inst)), 117 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 118 119 } else { 120 if (isRegDisp(MIR_Unary.getVal(inst))) { 121 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 122 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 123 emitCVTSD2SIQ_Reg_RegDisp_Quad( 124 getGPR_Reg(MIR_Unary.getResult(inst)), 125 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 126 127 } else { 128 if (isRegOff(MIR_Unary.getVal(inst))) { 129 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 130 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 131 emitCVTSD2SIQ_Reg_RegOff_Quad( 132 getGPR_Reg(MIR_Unary.getResult(inst)), 133 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 134 135 } else { 136 if (isRegIdx(MIR_Unary.getVal(inst))) { 137 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 138 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 139 emitCVTSD2SIQ_Reg_RegIdx_Quad( 140 getGPR_Reg(MIR_Unary.getResult(inst)), 141 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 142 143 } else { 144 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 145 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 146 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 147 emitCVTSD2SIQ_Reg_RegInd_Quad( 148 getGPR_Reg(MIR_Unary.getResult(inst)), 149 getBase(MIR_Unary.getVal(inst))); 150 } 151 } 152 } 153 } 154 } 155 } 156 157 /** 158 * Emit the given instruction, assuming that 159 * it is a MIR_Unary instruction 160 * and has a CVTSI2SS operator 161 * 162 * @param inst the instruction to assemble 163 */ 164 private void doCVTSI2SS(Instruction inst) { 165 if (isQuad(inst)) { 166 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 167 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 168 emitCVTSI2SS_Reg_Reg_Quad( 169 getXMM_Reg(MIR_Unary.getResult(inst)), 170 getGPR_Reg(MIR_Unary.getVal(inst))); 171 172 } else { 173 if (isAbs(MIR_Unary.getVal(inst))) { 174 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 175 emitCVTSI2SS_Reg_Abs_Quad( 176 getXMM_Reg(MIR_Unary.getResult(inst)), 177 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 178 179 } else { 180 if (isRegDisp(MIR_Unary.getVal(inst))) { 181 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 182 emitCVTSI2SS_Reg_RegDisp_Quad( 183 getXMM_Reg(MIR_Unary.getResult(inst)), 184 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 185 186 } else { 187 if (isRegOff(MIR_Unary.getVal(inst))) { 188 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 189 emitCVTSI2SS_Reg_RegOff_Quad( 190 getXMM_Reg(MIR_Unary.getResult(inst)), 191 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 192 193 } else { 194 if (isRegIdx(MIR_Unary.getVal(inst))) { 195 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 196 emitCVTSI2SS_Reg_RegIdx_Quad( 197 getXMM_Reg(MIR_Unary.getResult(inst)), 198 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 199 200 } else { 201 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 202 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 203 emitCVTSI2SS_Reg_RegInd_Quad( 204 getXMM_Reg(MIR_Unary.getResult(inst)), 205 getBase(MIR_Unary.getVal(inst))); 206 } 207 } 208 } 209 } 210 } 211 212 } else { 213 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 214 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 215 emitCVTSI2SS_Reg_Reg( 216 getXMM_Reg(MIR_Unary.getResult(inst)), 217 getGPR_Reg(MIR_Unary.getVal(inst))); 218 219 } else { 220 if (isAbs(MIR_Unary.getVal(inst))) { 221 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 222 emitCVTSI2SS_Reg_Abs( 223 getXMM_Reg(MIR_Unary.getResult(inst)), 224 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 225 226 } else { 227 if (isRegDisp(MIR_Unary.getVal(inst))) { 228 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 229 emitCVTSI2SS_Reg_RegDisp( 230 getXMM_Reg(MIR_Unary.getResult(inst)), 231 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 232 233 } else { 234 if (isRegOff(MIR_Unary.getVal(inst))) { 235 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 236 emitCVTSI2SS_Reg_RegOff( 237 getXMM_Reg(MIR_Unary.getResult(inst)), 238 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 239 240 } else { 241 if (isRegIdx(MIR_Unary.getVal(inst))) { 242 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 243 emitCVTSI2SS_Reg_RegIdx( 244 getXMM_Reg(MIR_Unary.getResult(inst)), 245 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 246 247 } else { 248 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 249 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 250 emitCVTSI2SS_Reg_RegInd( 251 getXMM_Reg(MIR_Unary.getResult(inst)), 252 getBase(MIR_Unary.getVal(inst))); 253 } 254 } 255 } 256 } 257 } 258 } 259 } 260 261 /** 262 * Emit the given instruction, assuming that 263 * it is a MIR_Compare instruction 264 * and has a FUCOMIP operator 265 * 266 * @param inst the instruction to assemble 267 */ 268 private void doFUCOMIP(Instruction inst) { 269 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 270 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 271 emitFUCOMIP_Reg_Reg( 272 getFPR_Reg(MIR_Compare.getVal1(inst)), 273 getFPR_Reg(MIR_Compare.getVal2(inst))); 274 } 275 276 /** 277 * Emit the given instruction, assuming that 278 * it is a MIR_BinaryAcc instruction 279 * and has a CMPEQSD operator 280 * 281 * @param inst the instruction to assemble 282 */ 283 private void doCMPEQSD(Instruction inst) { 284 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 285 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 286 emitCMPEQSD_Reg_Reg( 287 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 288 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 289 290 } else { 291 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 292 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 293 emitCMPEQSD_Reg_Abs( 294 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 295 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 296 297 } else { 298 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 299 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 300 emitCMPEQSD_Reg_RegDisp( 301 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 302 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 303 304 } else { 305 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 306 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 307 emitCMPEQSD_Reg_RegOff( 308 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 309 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 310 311 } else { 312 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 313 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 314 emitCMPEQSD_Reg_RegIdx( 315 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 316 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 317 318 } else { 319 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 320 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 321 emitCMPEQSD_Reg_RegInd( 322 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 323 getBase(MIR_BinaryAcc.getValue(inst))); 324 } 325 } 326 } 327 } 328 } 329 } 330 331 /** 332 * Emit the given instruction, assuming that 333 * it is a MIR_ConvertDW2QW instruction 334 * and has a CDO operator 335 * 336 * @param inst the instruction to assemble 337 */ 338 private void doCDO(Instruction inst) { 339 emitCDO(); 340 } 341 342 /** 343 * Emit the given instruction, assuming that 344 * it is a MIR_ConvertDW2QW instruction 345 * and has a CDQ operator 346 * 347 * @param inst the instruction to assemble 348 */ 349 private void doCDQ(Instruction inst) { 350 emitCDQ(); 351 } 352 353 /** 354 * Emit the given instruction, assuming that 355 * it is a MIR_Unary instruction 356 * and has a CVTTSD2SIQ operator 357 * 358 * @param inst the instruction to assemble 359 */ 360 private void doCVTTSD2SIQ(Instruction inst) { 361 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 362 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 363 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 364 emitCVTTSD2SIQ_Reg_Reg_Quad( 365 getGPR_Reg(MIR_Unary.getResult(inst)), 366 getXMM_Reg(MIR_Unary.getVal(inst))); 367 368 } else { 369 if (isAbs(MIR_Unary.getVal(inst))) { 370 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 371 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 372 emitCVTTSD2SIQ_Reg_Abs_Quad( 373 getGPR_Reg(MIR_Unary.getResult(inst)), 374 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 375 376 } else { 377 if (isRegDisp(MIR_Unary.getVal(inst))) { 378 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 379 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 380 emitCVTTSD2SIQ_Reg_RegDisp_Quad( 381 getGPR_Reg(MIR_Unary.getResult(inst)), 382 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 383 384 } else { 385 if (isRegOff(MIR_Unary.getVal(inst))) { 386 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 387 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 388 emitCVTTSD2SIQ_Reg_RegOff_Quad( 389 getGPR_Reg(MIR_Unary.getResult(inst)), 390 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 391 392 } else { 393 if (isRegIdx(MIR_Unary.getVal(inst))) { 394 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 395 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 396 emitCVTTSD2SIQ_Reg_RegIdx_Quad( 397 getGPR_Reg(MIR_Unary.getResult(inst)), 398 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 399 400 } else { 401 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 402 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 403 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 404 emitCVTTSD2SIQ_Reg_RegInd_Quad( 405 getGPR_Reg(MIR_Unary.getResult(inst)), 406 getBase(MIR_Unary.getVal(inst))); 407 } 408 } 409 } 410 } 411 } 412 } 413 414 /** 415 * Emit the given instruction, assuming that 416 * it is a MIR_BinaryAcc instruction 417 * and has a ADDSS operator 418 * 419 * @param inst the instruction to assemble 420 */ 421 private void doADDSS(Instruction inst) { 422 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 423 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 424 emitADDSS_Reg_Reg( 425 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 426 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 427 428 } else { 429 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 430 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 431 emitADDSS_Reg_Abs( 432 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 433 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 434 435 } else { 436 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 437 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 438 emitADDSS_Reg_RegDisp( 439 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 440 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 441 442 } else { 443 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 444 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 445 emitADDSS_Reg_RegOff( 446 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 447 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 448 449 } else { 450 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 451 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 452 emitADDSS_Reg_RegIdx( 453 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 454 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 455 456 } else { 457 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 458 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 459 emitADDSS_Reg_RegInd( 460 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 461 getBase(MIR_BinaryAcc.getValue(inst))); 462 } 463 } 464 } 465 } 466 } 467 } 468 469 /** 470 * Emit the given instruction, assuming that 471 * it is a MIR_Compare instruction 472 * and has a FUCOMI operator 473 * 474 * @param inst the instruction to assemble 475 */ 476 private void doFUCOMI(Instruction inst) { 477 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 478 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 479 emitFUCOMI_Reg_Reg( 480 getFPR_Reg(MIR_Compare.getVal1(inst)), 481 getFPR_Reg(MIR_Compare.getVal2(inst))); 482 } 483 484 /** 485 * Emit the given instruction, assuming that 486 * it is a MIR_UnaryAcc instruction 487 * and has a BSWAP operator 488 * 489 * @param inst the instruction to assemble 490 */ 491 private void doBSWAP(Instruction inst) { 492 if (isQuad(inst)) { 493 if (VM.VerifyAssertions && !isGPR_Reg(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 494 emitBSWAP_Reg_Quad( 495 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 496 497 } else { 498 if (VM.VerifyAssertions && !isGPR_Reg(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 499 emitBSWAP_Reg( 500 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 501 } 502 } 503 504 /** 505 * Emit the given instruction, assuming that 506 * it is a MIR_BinaryAcc instruction 507 * and has a CMPEQSS operator 508 * 509 * @param inst the instruction to assemble 510 */ 511 private void doCMPEQSS(Instruction inst) { 512 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 513 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 514 emitCMPEQSS_Reg_Reg( 515 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 516 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 517 518 } else { 519 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 520 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 521 emitCMPEQSS_Reg_Abs( 522 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 523 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 524 525 } else { 526 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 527 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 528 emitCMPEQSS_Reg_RegDisp( 529 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 530 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 531 532 } else { 533 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 534 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 535 emitCMPEQSS_Reg_RegOff( 536 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 537 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 538 539 } else { 540 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 541 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 542 emitCMPEQSS_Reg_RegIdx( 543 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 544 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 545 546 } else { 547 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 548 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 549 emitCMPEQSS_Reg_RegInd( 550 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 551 getBase(MIR_BinaryAcc.getValue(inst))); 552 } 553 } 554 } 555 } 556 } 557 } 558 559 /** 560 * Emit the given instruction, assuming that 561 * it is a MIR_Unary instruction 562 * and has a CVTSI2SD operator 563 * 564 * @param inst the instruction to assemble 565 */ 566 private void doCVTSI2SD(Instruction inst) { 567 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 568 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 569 emitCVTSI2SD_Reg_Reg( 570 getXMM_Reg(MIR_Unary.getResult(inst)), 571 getGPR_Reg(MIR_Unary.getVal(inst))); 572 573 } else { 574 if (isAbs(MIR_Unary.getVal(inst))) { 575 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 576 emitCVTSI2SD_Reg_Abs( 577 getXMM_Reg(MIR_Unary.getResult(inst)), 578 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 579 580 } else { 581 if (isRegDisp(MIR_Unary.getVal(inst))) { 582 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 583 emitCVTSI2SD_Reg_RegDisp( 584 getXMM_Reg(MIR_Unary.getResult(inst)), 585 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 586 587 } else { 588 if (isRegOff(MIR_Unary.getVal(inst))) { 589 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 590 emitCVTSI2SD_Reg_RegOff( 591 getXMM_Reg(MIR_Unary.getResult(inst)), 592 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 593 594 } else { 595 if (isRegIdx(MIR_Unary.getVal(inst))) { 596 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 597 emitCVTSI2SD_Reg_RegIdx( 598 getXMM_Reg(MIR_Unary.getResult(inst)), 599 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 600 601 } else { 602 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 603 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 604 emitCVTSI2SD_Reg_RegInd( 605 getXMM_Reg(MIR_Unary.getResult(inst)), 606 getBase(MIR_Unary.getVal(inst))); 607 } 608 } 609 } 610 } 611 } 612 } 613 614 /** 615 * Emit the given instruction, assuming that 616 * it is a MIR_BinaryAcc instruction 617 * and has a SUB operator 618 * 619 * @param inst the instruction to assemble 620 */ 621 private void doSUB(Instruction inst) { 622 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 623 if (isByte(inst)) { 624 if (isImm(MIR_BinaryAcc.getValue(inst))) { 625 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 626 emitSUB_Reg_Imm_Byte( 627 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 628 getImm(MIR_BinaryAcc.getValue(inst))); 629 630 } else { 631 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 632 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 633 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 634 emitSUB_Reg_Reg_Byte( 635 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 636 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 637 638 } else { 639 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 640 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 641 emitSUB_Reg_Abs_Byte( 642 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 643 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 644 645 } else { 646 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 647 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 648 emitSUB_Reg_RegDisp_Byte( 649 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 650 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 651 652 } else { 653 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 654 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 655 emitSUB_Reg_RegOff_Byte( 656 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 657 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 658 659 } else { 660 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 661 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 662 emitSUB_Reg_RegIdx_Byte( 663 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 664 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 665 666 } else { 667 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 668 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 669 emitSUB_Reg_RegInd_Byte( 670 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 671 getBase(MIR_BinaryAcc.getValue(inst))); 672 } 673 } 674 } 675 } 676 } 677 } 678 679 } else { 680 if (isWord(inst)) { 681 if (isImm(MIR_BinaryAcc.getValue(inst))) { 682 emitSUB_Reg_Imm_Word( 683 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 684 getImm(MIR_BinaryAcc.getValue(inst))); 685 686 } else { 687 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 688 emitSUB_Reg_Reg_Word( 689 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 690 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 691 692 } else { 693 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 694 emitSUB_Reg_Abs_Word( 695 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 696 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 697 698 } else { 699 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 700 emitSUB_Reg_RegDisp_Word( 701 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 702 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 703 704 } else { 705 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 706 emitSUB_Reg_RegOff_Word( 707 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 708 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 709 710 } else { 711 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 712 emitSUB_Reg_RegIdx_Word( 713 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 714 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 715 716 } else { 717 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 718 emitSUB_Reg_RegInd_Word( 719 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 720 getBase(MIR_BinaryAcc.getValue(inst))); 721 } 722 } 723 } 724 } 725 } 726 } 727 728 } else { 729 if (isQuad(inst)) { 730 if (isImm(MIR_BinaryAcc.getValue(inst))) { 731 emitSUB_Reg_Imm_Quad( 732 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 733 getImm(MIR_BinaryAcc.getValue(inst))); 734 735 } else { 736 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 737 emitSUB_Reg_Reg_Quad( 738 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 739 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 740 741 } else { 742 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 743 emitSUB_Reg_Abs_Quad( 744 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 745 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 746 747 } else { 748 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 749 emitSUB_Reg_RegDisp_Quad( 750 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 751 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 752 753 } else { 754 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 755 emitSUB_Reg_RegOff_Quad( 756 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 757 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 758 759 } else { 760 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 761 emitSUB_Reg_RegIdx_Quad( 762 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 763 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 764 765 } else { 766 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 767 emitSUB_Reg_RegInd_Quad( 768 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 769 getBase(MIR_BinaryAcc.getValue(inst))); 770 } 771 } 772 } 773 } 774 } 775 } 776 777 } else { 778 if (isImm(MIR_BinaryAcc.getValue(inst))) { 779 emitSUB_Reg_Imm( 780 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 781 getImm(MIR_BinaryAcc.getValue(inst))); 782 783 } else { 784 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 785 emitSUB_Reg_Reg( 786 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 787 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 788 789 } else { 790 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 791 emitSUB_Reg_Abs( 792 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 793 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 794 795 } else { 796 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 797 emitSUB_Reg_RegDisp( 798 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 799 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 800 801 } else { 802 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 803 emitSUB_Reg_RegOff( 804 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 805 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 806 807 } else { 808 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 809 emitSUB_Reg_RegIdx( 810 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 811 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 812 813 } else { 814 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 815 emitSUB_Reg_RegInd( 816 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 817 getBase(MIR_BinaryAcc.getValue(inst))); 818 } 819 } 820 } 821 } 822 } 823 } 824 } 825 } 826 } 827 828 } else { 829 if (isImm(MIR_BinaryAcc.getValue(inst))) { 830 if (isByte(inst)) { 831 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 832 emitSUB_Abs_Imm_Byte( 833 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 834 getImm(MIR_BinaryAcc.getValue(inst))); 835 836 } else { 837 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 838 emitSUB_RegDisp_Imm_Byte( 839 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 840 getImm(MIR_BinaryAcc.getValue(inst))); 841 842 } else { 843 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 844 emitSUB_RegOff_Imm_Byte( 845 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 846 getImm(MIR_BinaryAcc.getValue(inst))); 847 848 } else { 849 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 850 emitSUB_RegIdx_Imm_Byte( 851 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 852 getImm(MIR_BinaryAcc.getValue(inst))); 853 854 } else { 855 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 856 emitSUB_RegInd_Imm_Byte( 857 getBase(MIR_BinaryAcc.getResult(inst)), 858 getImm(MIR_BinaryAcc.getValue(inst))); 859 } 860 } 861 } 862 } 863 864 } else { 865 if (isWord(inst)) { 866 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 867 emitSUB_Abs_Imm_Word( 868 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 869 getImm(MIR_BinaryAcc.getValue(inst))); 870 871 } else { 872 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 873 emitSUB_RegDisp_Imm_Word( 874 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 875 getImm(MIR_BinaryAcc.getValue(inst))); 876 877 } else { 878 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 879 emitSUB_RegOff_Imm_Word( 880 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 881 getImm(MIR_BinaryAcc.getValue(inst))); 882 883 } else { 884 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 885 emitSUB_RegIdx_Imm_Word( 886 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 887 getImm(MIR_BinaryAcc.getValue(inst))); 888 889 } else { 890 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 891 emitSUB_RegInd_Imm_Word( 892 getBase(MIR_BinaryAcc.getResult(inst)), 893 getImm(MIR_BinaryAcc.getValue(inst))); 894 } 895 } 896 } 897 } 898 899 } else { 900 if (isQuad(inst)) { 901 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 902 emitSUB_Abs_Imm_Quad( 903 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 904 getImm(MIR_BinaryAcc.getValue(inst))); 905 906 } else { 907 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 908 emitSUB_RegDisp_Imm_Quad( 909 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 910 getImm(MIR_BinaryAcc.getValue(inst))); 911 912 } else { 913 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 914 emitSUB_RegOff_Imm_Quad( 915 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 916 getImm(MIR_BinaryAcc.getValue(inst))); 917 918 } else { 919 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 920 emitSUB_RegIdx_Imm_Quad( 921 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 922 getImm(MIR_BinaryAcc.getValue(inst))); 923 924 } else { 925 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 926 emitSUB_RegInd_Imm_Quad( 927 getBase(MIR_BinaryAcc.getResult(inst)), 928 getImm(MIR_BinaryAcc.getValue(inst))); 929 } 930 } 931 } 932 } 933 934 } else { 935 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 936 emitSUB_Abs_Imm( 937 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 938 getImm(MIR_BinaryAcc.getValue(inst))); 939 940 } else { 941 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 942 emitSUB_RegDisp_Imm( 943 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 944 getImm(MIR_BinaryAcc.getValue(inst))); 945 946 } else { 947 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 948 emitSUB_RegOff_Imm( 949 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 950 getImm(MIR_BinaryAcc.getValue(inst))); 951 952 } else { 953 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 954 emitSUB_RegIdx_Imm( 955 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 956 getImm(MIR_BinaryAcc.getValue(inst))); 957 958 } else { 959 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 960 emitSUB_RegInd_Imm( 961 getBase(MIR_BinaryAcc.getResult(inst)), 962 getImm(MIR_BinaryAcc.getValue(inst))); 963 } 964 } 965 } 966 } 967 } 968 } 969 } 970 971 } else { 972 if (isByte(inst)) { 973 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 974 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 975 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 976 emitSUB_Abs_Reg_Byte( 977 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 978 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 979 980 } else { 981 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 982 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 983 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 984 emitSUB_RegDisp_Reg_Byte( 985 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 986 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 987 988 } else { 989 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 990 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 991 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 992 emitSUB_RegOff_Reg_Byte( 993 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 994 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 995 996 } else { 997 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 998 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 999 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 1000 emitSUB_RegIdx_Reg_Byte( 1001 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1002 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1003 1004 } else { 1005 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1006 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1007 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 1008 emitSUB_RegInd_Reg_Byte( 1009 getBase(MIR_BinaryAcc.getResult(inst)), 1010 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1011 } 1012 } 1013 } 1014 } 1015 1016 } else { 1017 if (isWord(inst)) { 1018 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 1019 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1020 emitSUB_Abs_Reg_Word( 1021 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 1022 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1023 1024 } else { 1025 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 1026 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1027 emitSUB_RegDisp_Reg_Word( 1028 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1029 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1030 1031 } else { 1032 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 1033 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1034 emitSUB_RegOff_Reg_Word( 1035 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1036 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1037 1038 } else { 1039 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 1040 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1041 emitSUB_RegIdx_Reg_Word( 1042 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1043 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1044 1045 } else { 1046 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1047 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1048 emitSUB_RegInd_Reg_Word( 1049 getBase(MIR_BinaryAcc.getResult(inst)), 1050 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1051 } 1052 } 1053 } 1054 } 1055 1056 } else { 1057 if (isQuad(inst)) { 1058 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 1059 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1060 emitSUB_Abs_Reg_Quad( 1061 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 1062 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1063 1064 } else { 1065 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 1066 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1067 emitSUB_RegDisp_Reg_Quad( 1068 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1069 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1070 1071 } else { 1072 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 1073 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1074 emitSUB_RegOff_Reg_Quad( 1075 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1076 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1077 1078 } else { 1079 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 1080 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1081 emitSUB_RegIdx_Reg_Quad( 1082 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1083 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1084 1085 } else { 1086 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1087 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1088 emitSUB_RegInd_Reg_Quad( 1089 getBase(MIR_BinaryAcc.getResult(inst)), 1090 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1091 } 1092 } 1093 } 1094 } 1095 1096 } else { 1097 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 1098 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1099 emitSUB_Abs_Reg( 1100 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 1101 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1102 1103 } else { 1104 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 1105 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1106 emitSUB_RegDisp_Reg( 1107 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1108 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1109 1110 } else { 1111 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 1112 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1113 emitSUB_RegOff_Reg( 1114 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1115 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1116 1117 } else { 1118 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 1119 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1120 emitSUB_RegIdx_Reg( 1121 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 1122 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1123 1124 } else { 1125 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1126 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1127 emitSUB_RegInd_Reg( 1128 getBase(MIR_BinaryAcc.getResult(inst)), 1129 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 1130 } 1131 } 1132 } 1133 } 1134 } 1135 } 1136 } 1137 } 1138 } 1139 } 1140 1141 /** 1142 * Emit the given instruction, assuming that 1143 * it is a MIR_BinaryAcc instruction 1144 * and has a ADDSD operator 1145 * 1146 * @param inst the instruction to assemble 1147 */ 1148 private void doADDSD(Instruction inst) { 1149 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 1150 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1151 emitADDSD_Reg_Reg( 1152 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 1153 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 1154 1155 } else { 1156 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 1157 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1158 emitADDSD_Reg_Abs( 1159 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 1160 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 1161 1162 } else { 1163 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 1164 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1165 emitADDSD_Reg_RegDisp( 1166 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 1167 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 1168 1169 } else { 1170 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 1171 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1172 emitADDSD_Reg_RegOff( 1173 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 1174 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 1175 1176 } else { 1177 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 1178 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1179 emitADDSD_Reg_RegIdx( 1180 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 1181 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 1182 1183 } else { 1184 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1185 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1186 emitADDSD_Reg_RegInd( 1187 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 1188 getBase(MIR_BinaryAcc.getValue(inst))); 1189 } 1190 } 1191 } 1192 } 1193 } 1194 } 1195 1196 /** 1197 * Emit the given instruction, assuming that 1198 * it is a MIR_BinaryAcc instruction 1199 * and has a FIADD operator 1200 * 1201 * @param inst the instruction to assemble 1202 */ 1203 private void doFIADD(Instruction inst) { 1204 if (isWord(inst)) { 1205 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 1206 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1207 emitFIADD_Reg_Abs_Word( 1208 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1209 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 1210 1211 } else { 1212 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 1213 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1214 emitFIADD_Reg_RegDisp_Word( 1215 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1216 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 1217 1218 } else { 1219 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 1220 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1221 emitFIADD_Reg_RegOff_Word( 1222 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1223 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 1224 1225 } else { 1226 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 1227 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1228 emitFIADD_Reg_RegIdx_Word( 1229 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1230 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 1231 1232 } else { 1233 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1234 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1235 emitFIADD_Reg_RegInd_Word( 1236 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1237 getBase(MIR_BinaryAcc.getValue(inst))); 1238 } 1239 } 1240 } 1241 } 1242 1243 } else { 1244 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 1245 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1246 emitFIADD_Reg_Abs( 1247 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1248 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 1249 1250 } else { 1251 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 1252 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1253 emitFIADD_Reg_RegDisp( 1254 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1255 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 1256 1257 } else { 1258 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 1259 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1260 emitFIADD_Reg_RegOff( 1261 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1262 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 1263 1264 } else { 1265 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 1266 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1267 emitFIADD_Reg_RegIdx( 1268 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1269 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 1270 1271 } else { 1272 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1273 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1274 emitFIADD_Reg_RegInd( 1275 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 1276 getBase(MIR_BinaryAcc.getValue(inst))); 1277 } 1278 } 1279 } 1280 } 1281 } 1282 } 1283 1284 /** 1285 * Emit the given instruction, assuming that 1286 * it is a MIR_Move instruction 1287 * and has a FST operator 1288 * 1289 * @param inst the instruction to assemble 1290 */ 1291 private void doFST(Instruction inst) { 1292 if (isQuad(inst)) { 1293 if (isAbs(MIR_Move.getResult(inst))) { 1294 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1295 emitFST_Abs_Reg_Quad( 1296 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 1297 getFPR_Reg(MIR_Move.getValue(inst))); 1298 1299 } else { 1300 if (isRegDisp(MIR_Move.getResult(inst))) { 1301 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1302 emitFST_RegDisp_Reg_Quad( 1303 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 1304 getFPR_Reg(MIR_Move.getValue(inst))); 1305 1306 } else { 1307 if (isRegOff(MIR_Move.getResult(inst))) { 1308 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1309 emitFST_RegOff_Reg_Quad( 1310 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 1311 getFPR_Reg(MIR_Move.getValue(inst))); 1312 1313 } else { 1314 if (isRegIdx(MIR_Move.getResult(inst))) { 1315 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1316 emitFST_RegIdx_Reg_Quad( 1317 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 1318 getFPR_Reg(MIR_Move.getValue(inst))); 1319 1320 } else { 1321 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1322 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1323 emitFST_RegInd_Reg_Quad( 1324 getBase(MIR_Move.getResult(inst)), 1325 getFPR_Reg(MIR_Move.getValue(inst))); 1326 } 1327 } 1328 } 1329 } 1330 1331 } else { 1332 if (isFPR_Reg(MIR_Move.getResult(inst))) { 1333 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1334 emitFST_Reg_Reg( 1335 getFPR_Reg(MIR_Move.getResult(inst)), 1336 getFPR_Reg(MIR_Move.getValue(inst))); 1337 1338 } else { 1339 if (isAbs(MIR_Move.getResult(inst))) { 1340 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1341 emitFST_Abs_Reg( 1342 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 1343 getFPR_Reg(MIR_Move.getValue(inst))); 1344 1345 } else { 1346 if (isRegDisp(MIR_Move.getResult(inst))) { 1347 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1348 emitFST_RegDisp_Reg( 1349 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 1350 getFPR_Reg(MIR_Move.getValue(inst))); 1351 1352 } else { 1353 if (isRegOff(MIR_Move.getResult(inst))) { 1354 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1355 emitFST_RegOff_Reg( 1356 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 1357 getFPR_Reg(MIR_Move.getValue(inst))); 1358 1359 } else { 1360 if (isRegIdx(MIR_Move.getResult(inst))) { 1361 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1362 emitFST_RegIdx_Reg( 1363 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 1364 getFPR_Reg(MIR_Move.getValue(inst))); 1365 1366 } else { 1367 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1368 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1369 emitFST_RegInd_Reg( 1370 getBase(MIR_Move.getResult(inst)), 1371 getFPR_Reg(MIR_Move.getValue(inst))); 1372 } 1373 } 1374 } 1375 } 1376 } 1377 } 1378 } 1379 1380 /** 1381 * Emit the given instruction, assuming that 1382 * it is a MIR_Compare instruction 1383 * and has a CMP operator 1384 * 1385 * @param inst the instruction to assemble 1386 */ 1387 private void doCMP(Instruction inst) { 1388 if (isGPR_Reg(MIR_Compare.getVal1(inst))) { 1389 if (isByte(inst)) { 1390 if (isImm(MIR_Compare.getVal2(inst))) { 1391 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal1(inst)).isValidAs8bitRegister()); 1392 emitCMP_Reg_Imm_Byte( 1393 getGPR_Reg(MIR_Compare.getVal1(inst)), 1394 getImm(MIR_Compare.getVal2(inst))); 1395 1396 } else { 1397 if (isGPR_Reg(MIR_Compare.getVal2(inst))) { 1398 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal1(inst)).isValidAs8bitRegister()); 1399 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal2(inst)).isValidAs8bitRegister()); 1400 emitCMP_Reg_Reg_Byte( 1401 getGPR_Reg(MIR_Compare.getVal1(inst)), 1402 getGPR_Reg(MIR_Compare.getVal2(inst))); 1403 1404 } else { 1405 if (isAbs(MIR_Compare.getVal2(inst))) { 1406 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal1(inst)).isValidAs8bitRegister()); 1407 emitCMP_Reg_Abs_Byte( 1408 getGPR_Reg(MIR_Compare.getVal1(inst)), 1409 getDisp(MIR_Compare.getVal2(inst)).toWord().toAddress()); 1410 1411 } else { 1412 if (isRegDisp(MIR_Compare.getVal2(inst))) { 1413 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal1(inst)).isValidAs8bitRegister()); 1414 emitCMP_Reg_RegDisp_Byte( 1415 getGPR_Reg(MIR_Compare.getVal1(inst)), 1416 getBase(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1417 1418 } else { 1419 if (isRegOff(MIR_Compare.getVal2(inst))) { 1420 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal1(inst)).isValidAs8bitRegister()); 1421 emitCMP_Reg_RegOff_Byte( 1422 getGPR_Reg(MIR_Compare.getVal1(inst)), 1423 getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1424 1425 } else { 1426 if (isRegIdx(MIR_Compare.getVal2(inst))) { 1427 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal1(inst)).isValidAs8bitRegister()); 1428 emitCMP_Reg_RegIdx_Byte( 1429 getGPR_Reg(MIR_Compare.getVal1(inst)), 1430 getBase(MIR_Compare.getVal2(inst)), getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1431 1432 } else { 1433 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1434 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal1(inst)).isValidAs8bitRegister()); 1435 emitCMP_Reg_RegInd_Byte( 1436 getGPR_Reg(MIR_Compare.getVal1(inst)), 1437 getBase(MIR_Compare.getVal2(inst))); 1438 } 1439 } 1440 } 1441 } 1442 } 1443 } 1444 1445 } else { 1446 if (isWord(inst)) { 1447 if (isImm(MIR_Compare.getVal2(inst))) { 1448 emitCMP_Reg_Imm_Word( 1449 getGPR_Reg(MIR_Compare.getVal1(inst)), 1450 getImm(MIR_Compare.getVal2(inst))); 1451 1452 } else { 1453 if (isGPR_Reg(MIR_Compare.getVal2(inst))) { 1454 emitCMP_Reg_Reg_Word( 1455 getGPR_Reg(MIR_Compare.getVal1(inst)), 1456 getGPR_Reg(MIR_Compare.getVal2(inst))); 1457 1458 } else { 1459 if (isAbs(MIR_Compare.getVal2(inst))) { 1460 emitCMP_Reg_Abs_Word( 1461 getGPR_Reg(MIR_Compare.getVal1(inst)), 1462 getDisp(MIR_Compare.getVal2(inst)).toWord().toAddress()); 1463 1464 } else { 1465 if (isRegDisp(MIR_Compare.getVal2(inst))) { 1466 emitCMP_Reg_RegDisp_Word( 1467 getGPR_Reg(MIR_Compare.getVal1(inst)), 1468 getBase(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1469 1470 } else { 1471 if (isRegOff(MIR_Compare.getVal2(inst))) { 1472 emitCMP_Reg_RegOff_Word( 1473 getGPR_Reg(MIR_Compare.getVal1(inst)), 1474 getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1475 1476 } else { 1477 if (isRegIdx(MIR_Compare.getVal2(inst))) { 1478 emitCMP_Reg_RegIdx_Word( 1479 getGPR_Reg(MIR_Compare.getVal1(inst)), 1480 getBase(MIR_Compare.getVal2(inst)), getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1481 1482 } else { 1483 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1484 emitCMP_Reg_RegInd_Word( 1485 getGPR_Reg(MIR_Compare.getVal1(inst)), 1486 getBase(MIR_Compare.getVal2(inst))); 1487 } 1488 } 1489 } 1490 } 1491 } 1492 } 1493 1494 } else { 1495 if (isQuad(inst)) { 1496 if (isImm(MIR_Compare.getVal2(inst))) { 1497 emitCMP_Reg_Imm_Quad( 1498 getGPR_Reg(MIR_Compare.getVal1(inst)), 1499 getImm(MIR_Compare.getVal2(inst))); 1500 1501 } else { 1502 if (isGPR_Reg(MIR_Compare.getVal2(inst))) { 1503 emitCMP_Reg_Reg_Quad( 1504 getGPR_Reg(MIR_Compare.getVal1(inst)), 1505 getGPR_Reg(MIR_Compare.getVal2(inst))); 1506 1507 } else { 1508 if (isAbs(MIR_Compare.getVal2(inst))) { 1509 emitCMP_Reg_Abs_Quad( 1510 getGPR_Reg(MIR_Compare.getVal1(inst)), 1511 getDisp(MIR_Compare.getVal2(inst)).toWord().toAddress()); 1512 1513 } else { 1514 if (isRegDisp(MIR_Compare.getVal2(inst))) { 1515 emitCMP_Reg_RegDisp_Quad( 1516 getGPR_Reg(MIR_Compare.getVal1(inst)), 1517 getBase(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1518 1519 } else { 1520 if (isRegOff(MIR_Compare.getVal2(inst))) { 1521 emitCMP_Reg_RegOff_Quad( 1522 getGPR_Reg(MIR_Compare.getVal1(inst)), 1523 getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1524 1525 } else { 1526 if (isRegIdx(MIR_Compare.getVal2(inst))) { 1527 emitCMP_Reg_RegIdx_Quad( 1528 getGPR_Reg(MIR_Compare.getVal1(inst)), 1529 getBase(MIR_Compare.getVal2(inst)), getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1530 1531 } else { 1532 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1533 emitCMP_Reg_RegInd_Quad( 1534 getGPR_Reg(MIR_Compare.getVal1(inst)), 1535 getBase(MIR_Compare.getVal2(inst))); 1536 } 1537 } 1538 } 1539 } 1540 } 1541 } 1542 1543 } else { 1544 if (isImm(MIR_Compare.getVal2(inst))) { 1545 emitCMP_Reg_Imm( 1546 getGPR_Reg(MIR_Compare.getVal1(inst)), 1547 getImm(MIR_Compare.getVal2(inst))); 1548 1549 } else { 1550 if (isGPR_Reg(MIR_Compare.getVal2(inst))) { 1551 emitCMP_Reg_Reg( 1552 getGPR_Reg(MIR_Compare.getVal1(inst)), 1553 getGPR_Reg(MIR_Compare.getVal2(inst))); 1554 1555 } else { 1556 if (isAbs(MIR_Compare.getVal2(inst))) { 1557 emitCMP_Reg_Abs( 1558 getGPR_Reg(MIR_Compare.getVal1(inst)), 1559 getDisp(MIR_Compare.getVal2(inst)).toWord().toAddress()); 1560 1561 } else { 1562 if (isRegDisp(MIR_Compare.getVal2(inst))) { 1563 emitCMP_Reg_RegDisp( 1564 getGPR_Reg(MIR_Compare.getVal1(inst)), 1565 getBase(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1566 1567 } else { 1568 if (isRegOff(MIR_Compare.getVal2(inst))) { 1569 emitCMP_Reg_RegOff( 1570 getGPR_Reg(MIR_Compare.getVal1(inst)), 1571 getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1572 1573 } else { 1574 if (isRegIdx(MIR_Compare.getVal2(inst))) { 1575 emitCMP_Reg_RegIdx( 1576 getGPR_Reg(MIR_Compare.getVal1(inst)), 1577 getBase(MIR_Compare.getVal2(inst)), getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 1578 1579 } else { 1580 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1581 emitCMP_Reg_RegInd( 1582 getGPR_Reg(MIR_Compare.getVal1(inst)), 1583 getBase(MIR_Compare.getVal2(inst))); 1584 } 1585 } 1586 } 1587 } 1588 } 1589 } 1590 } 1591 } 1592 } 1593 1594 } else { 1595 if (isImm(MIR_Compare.getVal2(inst))) { 1596 if (isByte(inst)) { 1597 if (isAbs(MIR_Compare.getVal1(inst))) { 1598 emitCMP_Abs_Imm_Byte( 1599 getDisp(MIR_Compare.getVal1(inst)).toWord().toAddress(), 1600 getImm(MIR_Compare.getVal2(inst))); 1601 1602 } else { 1603 if (isRegDisp(MIR_Compare.getVal1(inst))) { 1604 emitCMP_RegDisp_Imm_Byte( 1605 getBase(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1606 getImm(MIR_Compare.getVal2(inst))); 1607 1608 } else { 1609 if (isRegOff(MIR_Compare.getVal1(inst))) { 1610 emitCMP_RegOff_Imm_Byte( 1611 getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1612 getImm(MIR_Compare.getVal2(inst))); 1613 1614 } else { 1615 if (isRegIdx(MIR_Compare.getVal1(inst))) { 1616 emitCMP_RegIdx_Imm_Byte( 1617 getBase(MIR_Compare.getVal1(inst)), getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1618 getImm(MIR_Compare.getVal2(inst))); 1619 1620 } else { 1621 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1622 emitCMP_RegInd_Imm_Byte( 1623 getBase(MIR_Compare.getVal1(inst)), 1624 getImm(MIR_Compare.getVal2(inst))); 1625 } 1626 } 1627 } 1628 } 1629 1630 } else { 1631 if (isWord(inst)) { 1632 if (isAbs(MIR_Compare.getVal1(inst))) { 1633 emitCMP_Abs_Imm_Word( 1634 getDisp(MIR_Compare.getVal1(inst)).toWord().toAddress(), 1635 getImm(MIR_Compare.getVal2(inst))); 1636 1637 } else { 1638 if (isRegDisp(MIR_Compare.getVal1(inst))) { 1639 emitCMP_RegDisp_Imm_Word( 1640 getBase(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1641 getImm(MIR_Compare.getVal2(inst))); 1642 1643 } else { 1644 if (isRegOff(MIR_Compare.getVal1(inst))) { 1645 emitCMP_RegOff_Imm_Word( 1646 getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1647 getImm(MIR_Compare.getVal2(inst))); 1648 1649 } else { 1650 if (isRegIdx(MIR_Compare.getVal1(inst))) { 1651 emitCMP_RegIdx_Imm_Word( 1652 getBase(MIR_Compare.getVal1(inst)), getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1653 getImm(MIR_Compare.getVal2(inst))); 1654 1655 } else { 1656 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1657 emitCMP_RegInd_Imm_Word( 1658 getBase(MIR_Compare.getVal1(inst)), 1659 getImm(MIR_Compare.getVal2(inst))); 1660 } 1661 } 1662 } 1663 } 1664 1665 } else { 1666 if (isQuad(inst)) { 1667 if (isAbs(MIR_Compare.getVal1(inst))) { 1668 emitCMP_Abs_Imm_Quad( 1669 getDisp(MIR_Compare.getVal1(inst)).toWord().toAddress(), 1670 getImm(MIR_Compare.getVal2(inst))); 1671 1672 } else { 1673 if (isRegDisp(MIR_Compare.getVal1(inst))) { 1674 emitCMP_RegDisp_Imm_Quad( 1675 getBase(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1676 getImm(MIR_Compare.getVal2(inst))); 1677 1678 } else { 1679 if (isRegOff(MIR_Compare.getVal1(inst))) { 1680 emitCMP_RegOff_Imm_Quad( 1681 getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1682 getImm(MIR_Compare.getVal2(inst))); 1683 1684 } else { 1685 if (isRegIdx(MIR_Compare.getVal1(inst))) { 1686 emitCMP_RegIdx_Imm_Quad( 1687 getBase(MIR_Compare.getVal1(inst)), getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1688 getImm(MIR_Compare.getVal2(inst))); 1689 1690 } else { 1691 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1692 emitCMP_RegInd_Imm_Quad( 1693 getBase(MIR_Compare.getVal1(inst)), 1694 getImm(MIR_Compare.getVal2(inst))); 1695 } 1696 } 1697 } 1698 } 1699 1700 } else { 1701 if (isAbs(MIR_Compare.getVal1(inst))) { 1702 emitCMP_Abs_Imm( 1703 getDisp(MIR_Compare.getVal1(inst)).toWord().toAddress(), 1704 getImm(MIR_Compare.getVal2(inst))); 1705 1706 } else { 1707 if (isRegDisp(MIR_Compare.getVal1(inst))) { 1708 emitCMP_RegDisp_Imm( 1709 getBase(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1710 getImm(MIR_Compare.getVal2(inst))); 1711 1712 } else { 1713 if (isRegOff(MIR_Compare.getVal1(inst))) { 1714 emitCMP_RegOff_Imm( 1715 getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1716 getImm(MIR_Compare.getVal2(inst))); 1717 1718 } else { 1719 if (isRegIdx(MIR_Compare.getVal1(inst))) { 1720 emitCMP_RegIdx_Imm( 1721 getBase(MIR_Compare.getVal1(inst)), getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1722 getImm(MIR_Compare.getVal2(inst))); 1723 1724 } else { 1725 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1726 emitCMP_RegInd_Imm( 1727 getBase(MIR_Compare.getVal1(inst)), 1728 getImm(MIR_Compare.getVal2(inst))); 1729 } 1730 } 1731 } 1732 } 1733 } 1734 } 1735 } 1736 1737 } else { 1738 if (isByte(inst)) { 1739 if (isAbs(MIR_Compare.getVal1(inst))) { 1740 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1741 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal2(inst)).isValidAs8bitRegister()); 1742 emitCMP_Abs_Reg_Byte( 1743 getDisp(MIR_Compare.getVal1(inst)).toWord().toAddress(), 1744 getGPR_Reg(MIR_Compare.getVal2(inst))); 1745 1746 } else { 1747 if (isRegDisp(MIR_Compare.getVal1(inst))) { 1748 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1749 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal2(inst)).isValidAs8bitRegister()); 1750 emitCMP_RegDisp_Reg_Byte( 1751 getBase(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1752 getGPR_Reg(MIR_Compare.getVal2(inst))); 1753 1754 } else { 1755 if (isRegOff(MIR_Compare.getVal1(inst))) { 1756 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1757 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal2(inst)).isValidAs8bitRegister()); 1758 emitCMP_RegOff_Reg_Byte( 1759 getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1760 getGPR_Reg(MIR_Compare.getVal2(inst))); 1761 1762 } else { 1763 if (isRegIdx(MIR_Compare.getVal1(inst))) { 1764 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1765 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal2(inst)).isValidAs8bitRegister()); 1766 emitCMP_RegIdx_Reg_Byte( 1767 getBase(MIR_Compare.getVal1(inst)), getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1768 getGPR_Reg(MIR_Compare.getVal2(inst))); 1769 1770 } else { 1771 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1772 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1773 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Compare.getVal2(inst)).isValidAs8bitRegister()); 1774 emitCMP_RegInd_Reg_Byte( 1775 getBase(MIR_Compare.getVal1(inst)), 1776 getGPR_Reg(MIR_Compare.getVal2(inst))); 1777 } 1778 } 1779 } 1780 } 1781 1782 } else { 1783 if (isWord(inst)) { 1784 if (isAbs(MIR_Compare.getVal1(inst))) { 1785 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1786 emitCMP_Abs_Reg_Word( 1787 getDisp(MIR_Compare.getVal1(inst)).toWord().toAddress(), 1788 getGPR_Reg(MIR_Compare.getVal2(inst))); 1789 1790 } else { 1791 if (isRegDisp(MIR_Compare.getVal1(inst))) { 1792 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1793 emitCMP_RegDisp_Reg_Word( 1794 getBase(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1795 getGPR_Reg(MIR_Compare.getVal2(inst))); 1796 1797 } else { 1798 if (isRegOff(MIR_Compare.getVal1(inst))) { 1799 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1800 emitCMP_RegOff_Reg_Word( 1801 getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1802 getGPR_Reg(MIR_Compare.getVal2(inst))); 1803 1804 } else { 1805 if (isRegIdx(MIR_Compare.getVal1(inst))) { 1806 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1807 emitCMP_RegIdx_Reg_Word( 1808 getBase(MIR_Compare.getVal1(inst)), getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1809 getGPR_Reg(MIR_Compare.getVal2(inst))); 1810 1811 } else { 1812 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1813 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1814 emitCMP_RegInd_Reg_Word( 1815 getBase(MIR_Compare.getVal1(inst)), 1816 getGPR_Reg(MIR_Compare.getVal2(inst))); 1817 } 1818 } 1819 } 1820 } 1821 1822 } else { 1823 if (isQuad(inst)) { 1824 if (isAbs(MIR_Compare.getVal1(inst))) { 1825 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1826 emitCMP_Abs_Reg_Quad( 1827 getDisp(MIR_Compare.getVal1(inst)).toWord().toAddress(), 1828 getGPR_Reg(MIR_Compare.getVal2(inst))); 1829 1830 } else { 1831 if (isRegDisp(MIR_Compare.getVal1(inst))) { 1832 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1833 emitCMP_RegDisp_Reg_Quad( 1834 getBase(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1835 getGPR_Reg(MIR_Compare.getVal2(inst))); 1836 1837 } else { 1838 if (isRegOff(MIR_Compare.getVal1(inst))) { 1839 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1840 emitCMP_RegOff_Reg_Quad( 1841 getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1842 getGPR_Reg(MIR_Compare.getVal2(inst))); 1843 1844 } else { 1845 if (isRegIdx(MIR_Compare.getVal1(inst))) { 1846 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1847 emitCMP_RegIdx_Reg_Quad( 1848 getBase(MIR_Compare.getVal1(inst)), getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1849 getGPR_Reg(MIR_Compare.getVal2(inst))); 1850 1851 } else { 1852 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1853 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1854 emitCMP_RegInd_Reg_Quad( 1855 getBase(MIR_Compare.getVal1(inst)), 1856 getGPR_Reg(MIR_Compare.getVal2(inst))); 1857 } 1858 } 1859 } 1860 } 1861 1862 } else { 1863 if (isAbs(MIR_Compare.getVal1(inst))) { 1864 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1865 emitCMP_Abs_Reg( 1866 getDisp(MIR_Compare.getVal1(inst)).toWord().toAddress(), 1867 getGPR_Reg(MIR_Compare.getVal2(inst))); 1868 1869 } else { 1870 if (isRegDisp(MIR_Compare.getVal1(inst))) { 1871 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1872 emitCMP_RegDisp_Reg( 1873 getBase(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1874 getGPR_Reg(MIR_Compare.getVal2(inst))); 1875 1876 } else { 1877 if (isRegOff(MIR_Compare.getVal1(inst))) { 1878 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1879 emitCMP_RegOff_Reg( 1880 getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1881 getGPR_Reg(MIR_Compare.getVal2(inst))); 1882 1883 } else { 1884 if (isRegIdx(MIR_Compare.getVal1(inst))) { 1885 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1886 emitCMP_RegIdx_Reg( 1887 getBase(MIR_Compare.getVal1(inst)), getIndex(MIR_Compare.getVal1(inst)), getScale(MIR_Compare.getVal1(inst)), getDisp(MIR_Compare.getVal1(inst)), 1888 getGPR_Reg(MIR_Compare.getVal2(inst))); 1889 1890 } else { 1891 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1892 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1893 emitCMP_RegInd_Reg( 1894 getBase(MIR_Compare.getVal1(inst)), 1895 getGPR_Reg(MIR_Compare.getVal2(inst))); 1896 } 1897 } 1898 } 1899 } 1900 } 1901 } 1902 } 1903 } 1904 } 1905 } 1906 1907 /** 1908 * Emit the given instruction, assuming that 1909 * it is a MIR_Move instruction 1910 * and has a MOVSD operator 1911 * 1912 * @param inst the instruction to assemble 1913 */ 1914 private void doMOVSD(Instruction inst) { 1915 if (isXMM_Reg(MIR_Move.getResult(inst))) { 1916 if (isXMM_Reg(MIR_Move.getValue(inst))) { 1917 emitMOVSD_Reg_Reg( 1918 getXMM_Reg(MIR_Move.getResult(inst)), 1919 getXMM_Reg(MIR_Move.getValue(inst))); 1920 1921 } else { 1922 if (isAbs(MIR_Move.getValue(inst))) { 1923 emitMOVSD_Reg_Abs( 1924 getXMM_Reg(MIR_Move.getResult(inst)), 1925 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 1926 1927 } else { 1928 if (isRegDisp(MIR_Move.getValue(inst))) { 1929 emitMOVSD_Reg_RegDisp( 1930 getXMM_Reg(MIR_Move.getResult(inst)), 1931 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 1932 1933 } else { 1934 if (isRegOff(MIR_Move.getValue(inst))) { 1935 emitMOVSD_Reg_RegOff( 1936 getXMM_Reg(MIR_Move.getResult(inst)), 1937 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 1938 1939 } else { 1940 if (isRegIdx(MIR_Move.getValue(inst))) { 1941 emitMOVSD_Reg_RegIdx( 1942 getXMM_Reg(MIR_Move.getResult(inst)), 1943 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 1944 1945 } else { 1946 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1947 emitMOVSD_Reg_RegInd( 1948 getXMM_Reg(MIR_Move.getResult(inst)), 1949 getBase(MIR_Move.getValue(inst))); 1950 } 1951 } 1952 } 1953 } 1954 } 1955 1956 } else { 1957 if (isAbs(MIR_Move.getResult(inst))) { 1958 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1959 emitMOVSD_Abs_Reg( 1960 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 1961 getXMM_Reg(MIR_Move.getValue(inst))); 1962 1963 } else { 1964 if (isRegDisp(MIR_Move.getResult(inst))) { 1965 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1966 emitMOVSD_RegDisp_Reg( 1967 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 1968 getXMM_Reg(MIR_Move.getValue(inst))); 1969 1970 } else { 1971 if (isRegOff(MIR_Move.getResult(inst))) { 1972 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1973 emitMOVSD_RegOff_Reg( 1974 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 1975 getXMM_Reg(MIR_Move.getValue(inst))); 1976 1977 } else { 1978 if (isRegIdx(MIR_Move.getResult(inst))) { 1979 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1980 emitMOVSD_RegIdx_Reg( 1981 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 1982 getXMM_Reg(MIR_Move.getValue(inst))); 1983 1984 } else { 1985 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1986 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 1987 emitMOVSD_RegInd_Reg( 1988 getBase(MIR_Move.getResult(inst)), 1989 getXMM_Reg(MIR_Move.getValue(inst))); 1990 } 1991 } 1992 } 1993 } 1994 } 1995 } 1996 1997 /** 1998 * Emit the given instruction, assuming that 1999 * it is a MIR_Move instruction 2000 * and has a FSTP operator 2001 * 2002 * @param inst the instruction to assemble 2003 */ 2004 private void doFSTP(Instruction inst) { 2005 if (isQuad(inst)) { 2006 if (isAbs(MIR_Move.getResult(inst))) { 2007 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2008 emitFSTP_Abs_Reg_Quad( 2009 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 2010 getFPR_Reg(MIR_Move.getValue(inst))); 2011 2012 } else { 2013 if (isRegDisp(MIR_Move.getResult(inst))) { 2014 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2015 emitFSTP_RegDisp_Reg_Quad( 2016 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2017 getFPR_Reg(MIR_Move.getValue(inst))); 2018 2019 } else { 2020 if (isRegOff(MIR_Move.getResult(inst))) { 2021 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2022 emitFSTP_RegOff_Reg_Quad( 2023 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2024 getFPR_Reg(MIR_Move.getValue(inst))); 2025 2026 } else { 2027 if (isRegIdx(MIR_Move.getResult(inst))) { 2028 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2029 emitFSTP_RegIdx_Reg_Quad( 2030 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2031 getFPR_Reg(MIR_Move.getValue(inst))); 2032 2033 } else { 2034 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2035 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2036 emitFSTP_RegInd_Reg_Quad( 2037 getBase(MIR_Move.getResult(inst)), 2038 getFPR_Reg(MIR_Move.getValue(inst))); 2039 } 2040 } 2041 } 2042 } 2043 2044 } else { 2045 if (isFPR_Reg(MIR_Move.getResult(inst))) { 2046 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2047 emitFSTP_Reg_Reg( 2048 getFPR_Reg(MIR_Move.getResult(inst)), 2049 getFPR_Reg(MIR_Move.getValue(inst))); 2050 2051 } else { 2052 if (isAbs(MIR_Move.getResult(inst))) { 2053 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2054 emitFSTP_Abs_Reg( 2055 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 2056 getFPR_Reg(MIR_Move.getValue(inst))); 2057 2058 } else { 2059 if (isRegDisp(MIR_Move.getResult(inst))) { 2060 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2061 emitFSTP_RegDisp_Reg( 2062 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2063 getFPR_Reg(MIR_Move.getValue(inst))); 2064 2065 } else { 2066 if (isRegOff(MIR_Move.getResult(inst))) { 2067 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2068 emitFSTP_RegOff_Reg( 2069 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2070 getFPR_Reg(MIR_Move.getValue(inst))); 2071 2072 } else { 2073 if (isRegIdx(MIR_Move.getResult(inst))) { 2074 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2075 emitFSTP_RegIdx_Reg( 2076 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2077 getFPR_Reg(MIR_Move.getValue(inst))); 2078 2079 } else { 2080 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2081 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2082 emitFSTP_RegInd_Reg( 2083 getBase(MIR_Move.getResult(inst)), 2084 getFPR_Reg(MIR_Move.getValue(inst))); 2085 } 2086 } 2087 } 2088 } 2089 } 2090 } 2091 } 2092 2093 /** 2094 * Emit the given instruction, assuming that 2095 * it is a MIR_ConvertDW2QW instruction 2096 * and has a CDQE operator 2097 * 2098 * @param inst the instruction to assemble 2099 */ 2100 private void doCDQE(Instruction inst) { 2101 emitCDQE(); 2102 } 2103 2104 /** 2105 * Emit the given instruction, assuming that 2106 * it is a MIR_Move instruction 2107 * and has a MOVLPD operator 2108 * 2109 * @param inst the instruction to assemble 2110 */ 2111 private void doMOVLPD(Instruction inst) { 2112 if (isXMM_Reg(MIR_Move.getResult(inst))) { 2113 if (isXMM_Reg(MIR_Move.getValue(inst))) { 2114 emitMOVLPD_Reg_Reg( 2115 getXMM_Reg(MIR_Move.getResult(inst)), 2116 getXMM_Reg(MIR_Move.getValue(inst))); 2117 2118 } else { 2119 if (isAbs(MIR_Move.getValue(inst))) { 2120 emitMOVLPD_Reg_Abs( 2121 getXMM_Reg(MIR_Move.getResult(inst)), 2122 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 2123 2124 } else { 2125 if (isRegDisp(MIR_Move.getValue(inst))) { 2126 emitMOVLPD_Reg_RegDisp( 2127 getXMM_Reg(MIR_Move.getResult(inst)), 2128 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 2129 2130 } else { 2131 if (isRegOff(MIR_Move.getValue(inst))) { 2132 emitMOVLPD_Reg_RegOff( 2133 getXMM_Reg(MIR_Move.getResult(inst)), 2134 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 2135 2136 } else { 2137 if (isRegIdx(MIR_Move.getValue(inst))) { 2138 emitMOVLPD_Reg_RegIdx( 2139 getXMM_Reg(MIR_Move.getResult(inst)), 2140 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 2141 2142 } else { 2143 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2144 emitMOVLPD_Reg_RegInd( 2145 getXMM_Reg(MIR_Move.getResult(inst)), 2146 getBase(MIR_Move.getValue(inst))); 2147 } 2148 } 2149 } 2150 } 2151 } 2152 2153 } else { 2154 if (isAbs(MIR_Move.getResult(inst))) { 2155 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2156 emitMOVLPD_Abs_Reg( 2157 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 2158 getXMM_Reg(MIR_Move.getValue(inst))); 2159 2160 } else { 2161 if (isRegDisp(MIR_Move.getResult(inst))) { 2162 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2163 emitMOVLPD_RegDisp_Reg( 2164 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2165 getXMM_Reg(MIR_Move.getValue(inst))); 2166 2167 } else { 2168 if (isRegOff(MIR_Move.getResult(inst))) { 2169 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2170 emitMOVLPD_RegOff_Reg( 2171 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2172 getXMM_Reg(MIR_Move.getValue(inst))); 2173 2174 } else { 2175 if (isRegIdx(MIR_Move.getResult(inst))) { 2176 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2177 emitMOVLPD_RegIdx_Reg( 2178 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2179 getXMM_Reg(MIR_Move.getValue(inst))); 2180 2181 } else { 2182 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2183 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2184 emitMOVLPD_RegInd_Reg( 2185 getBase(MIR_Move.getResult(inst)), 2186 getXMM_Reg(MIR_Move.getValue(inst))); 2187 } 2188 } 2189 } 2190 } 2191 } 2192 } 2193 2194 /** 2195 * Emit the given instruction, assuming that 2196 * it is a MIR_Nullary instruction 2197 * and has a METHODSTART operator 2198 * 2199 * @param inst the instruction to assemble 2200 */ 2201 private void doMETHODSTART(Instruction inst) { 2202 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2203 emitMETHODSTART_Reg( 2204 getGPR_Reg(MIR_Nullary.getResult(inst))); 2205 } 2206 2207 /** 2208 * Emit the given instruction, assuming that 2209 * it is a MIR_Test instruction 2210 * and has a BTC operator 2211 * 2212 * @param inst the instruction to assemble 2213 */ 2214 private void doBTC(Instruction inst) { 2215 if (isQuad(inst)) { 2216 if (isImm(MIR_Test.getVal2(inst))) { 2217 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 2218 emitBTC_Reg_Imm_Quad( 2219 getGPR_Reg(MIR_Test.getVal1(inst)), 2220 getImm(MIR_Test.getVal2(inst))); 2221 2222 } else { 2223 if (isAbs(MIR_Test.getVal1(inst))) { 2224 emitBTC_Abs_Imm_Quad( 2225 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 2226 getImm(MIR_Test.getVal2(inst))); 2227 2228 } else { 2229 if (isRegDisp(MIR_Test.getVal1(inst))) { 2230 emitBTC_RegDisp_Imm_Quad( 2231 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2232 getImm(MIR_Test.getVal2(inst))); 2233 2234 } else { 2235 if (isRegOff(MIR_Test.getVal1(inst))) { 2236 emitBTC_RegOff_Imm_Quad( 2237 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2238 getImm(MIR_Test.getVal2(inst))); 2239 2240 } else { 2241 if (isRegIdx(MIR_Test.getVal1(inst))) { 2242 emitBTC_RegIdx_Imm_Quad( 2243 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2244 getImm(MIR_Test.getVal2(inst))); 2245 2246 } else { 2247 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2248 emitBTC_RegInd_Imm_Quad( 2249 getBase(MIR_Test.getVal1(inst)), 2250 getImm(MIR_Test.getVal2(inst))); 2251 } 2252 } 2253 } 2254 } 2255 } 2256 2257 } else { 2258 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 2259 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2260 emitBTC_Reg_Reg_Quad( 2261 getGPR_Reg(MIR_Test.getVal1(inst)), 2262 getGPR_Reg(MIR_Test.getVal2(inst))); 2263 2264 } else { 2265 if (isAbs(MIR_Test.getVal1(inst))) { 2266 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2267 emitBTC_Abs_Reg_Quad( 2268 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 2269 getGPR_Reg(MIR_Test.getVal2(inst))); 2270 2271 } else { 2272 if (isRegDisp(MIR_Test.getVal1(inst))) { 2273 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2274 emitBTC_RegDisp_Reg_Quad( 2275 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2276 getGPR_Reg(MIR_Test.getVal2(inst))); 2277 2278 } else { 2279 if (isRegOff(MIR_Test.getVal1(inst))) { 2280 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2281 emitBTC_RegOff_Reg_Quad( 2282 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2283 getGPR_Reg(MIR_Test.getVal2(inst))); 2284 2285 } else { 2286 if (isRegIdx(MIR_Test.getVal1(inst))) { 2287 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2288 emitBTC_RegIdx_Reg_Quad( 2289 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2290 getGPR_Reg(MIR_Test.getVal2(inst))); 2291 2292 } else { 2293 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2294 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2295 emitBTC_RegInd_Reg_Quad( 2296 getBase(MIR_Test.getVal1(inst)), 2297 getGPR_Reg(MIR_Test.getVal2(inst))); 2298 } 2299 } 2300 } 2301 } 2302 } 2303 } 2304 2305 } else { 2306 if (isImm(MIR_Test.getVal2(inst))) { 2307 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 2308 emitBTC_Reg_Imm( 2309 getGPR_Reg(MIR_Test.getVal1(inst)), 2310 getImm(MIR_Test.getVal2(inst))); 2311 2312 } else { 2313 if (isAbs(MIR_Test.getVal1(inst))) { 2314 emitBTC_Abs_Imm( 2315 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 2316 getImm(MIR_Test.getVal2(inst))); 2317 2318 } else { 2319 if (isRegDisp(MIR_Test.getVal1(inst))) { 2320 emitBTC_RegDisp_Imm( 2321 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2322 getImm(MIR_Test.getVal2(inst))); 2323 2324 } else { 2325 if (isRegOff(MIR_Test.getVal1(inst))) { 2326 emitBTC_RegOff_Imm( 2327 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2328 getImm(MIR_Test.getVal2(inst))); 2329 2330 } else { 2331 if (isRegIdx(MIR_Test.getVal1(inst))) { 2332 emitBTC_RegIdx_Imm( 2333 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2334 getImm(MIR_Test.getVal2(inst))); 2335 2336 } else { 2337 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2338 emitBTC_RegInd_Imm( 2339 getBase(MIR_Test.getVal1(inst)), 2340 getImm(MIR_Test.getVal2(inst))); 2341 } 2342 } 2343 } 2344 } 2345 } 2346 2347 } else { 2348 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 2349 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2350 emitBTC_Reg_Reg( 2351 getGPR_Reg(MIR_Test.getVal1(inst)), 2352 getGPR_Reg(MIR_Test.getVal2(inst))); 2353 2354 } else { 2355 if (isAbs(MIR_Test.getVal1(inst))) { 2356 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2357 emitBTC_Abs_Reg( 2358 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 2359 getGPR_Reg(MIR_Test.getVal2(inst))); 2360 2361 } else { 2362 if (isRegDisp(MIR_Test.getVal1(inst))) { 2363 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2364 emitBTC_RegDisp_Reg( 2365 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2366 getGPR_Reg(MIR_Test.getVal2(inst))); 2367 2368 } else { 2369 if (isRegOff(MIR_Test.getVal1(inst))) { 2370 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2371 emitBTC_RegOff_Reg( 2372 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2373 getGPR_Reg(MIR_Test.getVal2(inst))); 2374 2375 } else { 2376 if (isRegIdx(MIR_Test.getVal1(inst))) { 2377 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2378 emitBTC_RegIdx_Reg( 2379 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 2380 getGPR_Reg(MIR_Test.getVal2(inst))); 2381 2382 } else { 2383 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2384 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2385 emitBTC_RegInd_Reg( 2386 getBase(MIR_Test.getVal1(inst)), 2387 getGPR_Reg(MIR_Test.getVal2(inst))); 2388 } 2389 } 2390 } 2391 } 2392 } 2393 } 2394 } 2395 } 2396 2397 /** 2398 * Emit the given instruction, assuming that 2399 * it is a MIR_Nullary instruction 2400 * and has a POP operator 2401 * 2402 * @param inst the instruction to assemble 2403 */ 2404 private void doPOP(Instruction inst) { 2405 if (isGPR_Reg(MIR_Nullary.getResult(inst))) { 2406 emitPOP_Reg( 2407 getGPR_Reg(MIR_Nullary.getResult(inst))); 2408 2409 } else { 2410 if (isAbs(MIR_Nullary.getResult(inst))) { 2411 emitPOP_Abs( 2412 getDisp(MIR_Nullary.getResult(inst)).toWord().toAddress()); 2413 2414 } else { 2415 if (isRegDisp(MIR_Nullary.getResult(inst))) { 2416 emitPOP_RegDisp( 2417 getBase(MIR_Nullary.getResult(inst)), getDisp(MIR_Nullary.getResult(inst))); 2418 2419 } else { 2420 if (isRegOff(MIR_Nullary.getResult(inst))) { 2421 emitPOP_RegOff( 2422 getIndex(MIR_Nullary.getResult(inst)), getScale(MIR_Nullary.getResult(inst)), getDisp(MIR_Nullary.getResult(inst))); 2423 2424 } else { 2425 if (isRegIdx(MIR_Nullary.getResult(inst))) { 2426 emitPOP_RegIdx( 2427 getBase(MIR_Nullary.getResult(inst)), getIndex(MIR_Nullary.getResult(inst)), getScale(MIR_Nullary.getResult(inst)), getDisp(MIR_Nullary.getResult(inst))); 2428 2429 } else { 2430 if (VM.VerifyAssertions && !isRegInd(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2431 emitPOP_RegInd( 2432 getBase(MIR_Nullary.getResult(inst))); 2433 } 2434 } 2435 } 2436 } 2437 } 2438 } 2439 2440 /** 2441 * Emit the given instruction, assuming that 2442 * it is a MIR_Nullary instruction 2443 * and has a FLDLN2 operator 2444 * 2445 * @param inst the instruction to assemble 2446 */ 2447 private void doFLDLN2(Instruction inst) { 2448 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2449 emitFLDLN2_Reg( 2450 getFPR_Reg(MIR_Nullary.getResult(inst))); 2451 } 2452 2453 /** 2454 * Emit the given instruction, assuming that 2455 * it is a MIR_BinaryAcc instruction 2456 * and has a ORPD operator 2457 * 2458 * @param inst the instruction to assemble 2459 */ 2460 private void doORPD(Instruction inst) { 2461 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 2462 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2463 emitORPD_Reg_Reg( 2464 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2465 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 2466 2467 } else { 2468 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 2469 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2470 emitORPD_Reg_Abs( 2471 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2472 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 2473 2474 } else { 2475 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 2476 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2477 emitORPD_Reg_RegDisp( 2478 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2479 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2480 2481 } else { 2482 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 2483 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2484 emitORPD_Reg_RegOff( 2485 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2486 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2487 2488 } else { 2489 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 2490 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2491 emitORPD_Reg_RegIdx( 2492 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2493 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2494 2495 } else { 2496 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2497 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2498 emitORPD_Reg_RegInd( 2499 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2500 getBase(MIR_BinaryAcc.getValue(inst))); 2501 } 2502 } 2503 } 2504 } 2505 } 2506 } 2507 2508 /** 2509 * Emit the given instruction, assuming that 2510 * it is a MIR_BinaryAcc instruction 2511 * and has a FIDIV operator 2512 * 2513 * @param inst the instruction to assemble 2514 */ 2515 private void doFIDIV(Instruction inst) { 2516 if (isWord(inst)) { 2517 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 2518 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2519 emitFIDIV_Reg_Abs_Word( 2520 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2521 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 2522 2523 } else { 2524 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 2525 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2526 emitFIDIV_Reg_RegDisp_Word( 2527 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2528 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2529 2530 } else { 2531 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 2532 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2533 emitFIDIV_Reg_RegOff_Word( 2534 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2535 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2536 2537 } else { 2538 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 2539 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2540 emitFIDIV_Reg_RegIdx_Word( 2541 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2542 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2543 2544 } else { 2545 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2546 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2547 emitFIDIV_Reg_RegInd_Word( 2548 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2549 getBase(MIR_BinaryAcc.getValue(inst))); 2550 } 2551 } 2552 } 2553 } 2554 2555 } else { 2556 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 2557 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2558 emitFIDIV_Reg_Abs( 2559 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2560 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 2561 2562 } else { 2563 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 2564 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2565 emitFIDIV_Reg_RegDisp( 2566 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2567 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2568 2569 } else { 2570 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 2571 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2572 emitFIDIV_Reg_RegOff( 2573 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2574 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2575 2576 } else { 2577 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 2578 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2579 emitFIDIV_Reg_RegIdx( 2580 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2581 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2582 2583 } else { 2584 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2585 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2586 emitFIDIV_Reg_RegInd( 2587 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 2588 getBase(MIR_BinaryAcc.getValue(inst))); 2589 } 2590 } 2591 } 2592 } 2593 } 2594 } 2595 2596 /** 2597 * Emit the given instruction, assuming that 2598 * it is a MIR_BinaryAcc instruction 2599 * and has a CMPUNORDSS operator 2600 * 2601 * @param inst the instruction to assemble 2602 */ 2603 private void doCMPUNORDSS(Instruction inst) { 2604 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 2605 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2606 emitCMPUNORDSS_Reg_Reg( 2607 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2608 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 2609 2610 } else { 2611 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 2612 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2613 emitCMPUNORDSS_Reg_Abs( 2614 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2615 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 2616 2617 } else { 2618 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 2619 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2620 emitCMPUNORDSS_Reg_RegDisp( 2621 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2622 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2623 2624 } else { 2625 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 2626 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2627 emitCMPUNORDSS_Reg_RegOff( 2628 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2629 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2630 2631 } else { 2632 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 2633 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2634 emitCMPUNORDSS_Reg_RegIdx( 2635 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2636 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2637 2638 } else { 2639 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2640 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2641 emitCMPUNORDSS_Reg_RegInd( 2642 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2643 getBase(MIR_BinaryAcc.getValue(inst))); 2644 } 2645 } 2646 } 2647 } 2648 } 2649 } 2650 2651 /** 2652 * Emit the given instruction, assuming that 2653 * it is a MIR_Move instruction 2654 * and has a MOVSS operator 2655 * 2656 * @param inst the instruction to assemble 2657 */ 2658 private void doMOVSS(Instruction inst) { 2659 if (isXMM_Reg(MIR_Move.getResult(inst))) { 2660 if (isXMM_Reg(MIR_Move.getValue(inst))) { 2661 emitMOVSS_Reg_Reg( 2662 getXMM_Reg(MIR_Move.getResult(inst)), 2663 getXMM_Reg(MIR_Move.getValue(inst))); 2664 2665 } else { 2666 if (isAbs(MIR_Move.getValue(inst))) { 2667 emitMOVSS_Reg_Abs( 2668 getXMM_Reg(MIR_Move.getResult(inst)), 2669 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 2670 2671 } else { 2672 if (isRegDisp(MIR_Move.getValue(inst))) { 2673 emitMOVSS_Reg_RegDisp( 2674 getXMM_Reg(MIR_Move.getResult(inst)), 2675 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 2676 2677 } else { 2678 if (isRegOff(MIR_Move.getValue(inst))) { 2679 emitMOVSS_Reg_RegOff( 2680 getXMM_Reg(MIR_Move.getResult(inst)), 2681 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 2682 2683 } else { 2684 if (isRegIdx(MIR_Move.getValue(inst))) { 2685 emitMOVSS_Reg_RegIdx( 2686 getXMM_Reg(MIR_Move.getResult(inst)), 2687 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 2688 2689 } else { 2690 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2691 emitMOVSS_Reg_RegInd( 2692 getXMM_Reg(MIR_Move.getResult(inst)), 2693 getBase(MIR_Move.getValue(inst))); 2694 } 2695 } 2696 } 2697 } 2698 } 2699 2700 } else { 2701 if (isAbs(MIR_Move.getResult(inst))) { 2702 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2703 emitMOVSS_Abs_Reg( 2704 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 2705 getXMM_Reg(MIR_Move.getValue(inst))); 2706 2707 } else { 2708 if (isRegDisp(MIR_Move.getResult(inst))) { 2709 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2710 emitMOVSS_RegDisp_Reg( 2711 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2712 getXMM_Reg(MIR_Move.getValue(inst))); 2713 2714 } else { 2715 if (isRegOff(MIR_Move.getResult(inst))) { 2716 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2717 emitMOVSS_RegOff_Reg( 2718 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2719 getXMM_Reg(MIR_Move.getValue(inst))); 2720 2721 } else { 2722 if (isRegIdx(MIR_Move.getResult(inst))) { 2723 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2724 emitMOVSS_RegIdx_Reg( 2725 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 2726 getXMM_Reg(MIR_Move.getValue(inst))); 2727 2728 } else { 2729 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2730 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2731 emitMOVSS_RegInd_Reg( 2732 getBase(MIR_Move.getResult(inst)), 2733 getXMM_Reg(MIR_Move.getValue(inst))); 2734 } 2735 } 2736 } 2737 } 2738 } 2739 } 2740 2741 /** 2742 * Emit the given instruction, assuming that 2743 * it is a MIR_Empty instruction 2744 * and has a FNINIT operator 2745 * 2746 * @param inst the instruction to assemble 2747 */ 2748 private void doFNINIT(Instruction inst) { 2749 emitFNINIT(); 2750 } 2751 2752 /** 2753 * Emit the given instruction, assuming that 2754 * it is a MIR_BinaryAcc instruction 2755 * and has a SUBSS operator 2756 * 2757 * @param inst the instruction to assemble 2758 */ 2759 private void doSUBSS(Instruction inst) { 2760 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 2761 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2762 emitSUBSS_Reg_Reg( 2763 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2764 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 2765 2766 } else { 2767 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 2768 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2769 emitSUBSS_Reg_Abs( 2770 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2771 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 2772 2773 } else { 2774 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 2775 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2776 emitSUBSS_Reg_RegDisp( 2777 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2778 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2779 2780 } else { 2781 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 2782 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2783 emitSUBSS_Reg_RegOff( 2784 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2785 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2786 2787 } else { 2788 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 2789 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2790 emitSUBSS_Reg_RegIdx( 2791 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2792 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2793 2794 } else { 2795 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2796 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2797 emitSUBSS_Reg_RegInd( 2798 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 2799 getBase(MIR_BinaryAcc.getValue(inst))); 2800 } 2801 } 2802 } 2803 } 2804 } 2805 } 2806 2807 /** 2808 * Emit the given instruction, assuming that 2809 * it is a MIR_Unary instruction 2810 * and has a CVTSD2SI operator 2811 * 2812 * @param inst the instruction to assemble 2813 */ 2814 private void doCVTSD2SI(Instruction inst) { 2815 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 2816 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2817 emitCVTSD2SI_Reg_Reg( 2818 getGPR_Reg(MIR_Unary.getResult(inst)), 2819 getXMM_Reg(MIR_Unary.getVal(inst))); 2820 2821 } else { 2822 if (isAbs(MIR_Unary.getVal(inst))) { 2823 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2824 emitCVTSD2SI_Reg_Abs( 2825 getGPR_Reg(MIR_Unary.getResult(inst)), 2826 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 2827 2828 } else { 2829 if (isRegDisp(MIR_Unary.getVal(inst))) { 2830 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2831 emitCVTSD2SI_Reg_RegDisp( 2832 getGPR_Reg(MIR_Unary.getResult(inst)), 2833 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 2834 2835 } else { 2836 if (isRegOff(MIR_Unary.getVal(inst))) { 2837 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2838 emitCVTSD2SI_Reg_RegOff( 2839 getGPR_Reg(MIR_Unary.getResult(inst)), 2840 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 2841 2842 } else { 2843 if (isRegIdx(MIR_Unary.getVal(inst))) { 2844 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2845 emitCVTSD2SI_Reg_RegIdx( 2846 getGPR_Reg(MIR_Unary.getResult(inst)), 2847 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 2848 2849 } else { 2850 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2851 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2852 emitCVTSD2SI_Reg_RegInd( 2853 getGPR_Reg(MIR_Unary.getResult(inst)), 2854 getBase(MIR_Unary.getVal(inst))); 2855 } 2856 } 2857 } 2858 } 2859 } 2860 } 2861 2862 /** 2863 * Emit the given instruction, assuming that 2864 * it is a MIR_BinaryAcc instruction 2865 * and has a XOR operator 2866 * 2867 * @param inst the instruction to assemble 2868 */ 2869 private void doXOR(Instruction inst) { 2870 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 2871 if (isByte(inst)) { 2872 if (isImm(MIR_BinaryAcc.getValue(inst))) { 2873 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 2874 emitXOR_Reg_Imm_Byte( 2875 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2876 getImm(MIR_BinaryAcc.getValue(inst))); 2877 2878 } else { 2879 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 2880 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 2881 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 2882 emitXOR_Reg_Reg_Byte( 2883 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2884 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 2885 2886 } else { 2887 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 2888 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 2889 emitXOR_Reg_Abs_Byte( 2890 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2891 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 2892 2893 } else { 2894 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 2895 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 2896 emitXOR_Reg_RegDisp_Byte( 2897 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2898 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2899 2900 } else { 2901 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 2902 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 2903 emitXOR_Reg_RegOff_Byte( 2904 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2905 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2906 2907 } else { 2908 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 2909 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 2910 emitXOR_Reg_RegIdx_Byte( 2911 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2912 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2913 2914 } else { 2915 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2916 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 2917 emitXOR_Reg_RegInd_Byte( 2918 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2919 getBase(MIR_BinaryAcc.getValue(inst))); 2920 } 2921 } 2922 } 2923 } 2924 } 2925 } 2926 2927 } else { 2928 if (isWord(inst)) { 2929 if (isImm(MIR_BinaryAcc.getValue(inst))) { 2930 emitXOR_Reg_Imm_Word( 2931 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2932 getImm(MIR_BinaryAcc.getValue(inst))); 2933 2934 } else { 2935 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 2936 emitXOR_Reg_Reg_Word( 2937 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2938 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 2939 2940 } else { 2941 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 2942 emitXOR_Reg_Abs_Word( 2943 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2944 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 2945 2946 } else { 2947 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 2948 emitXOR_Reg_RegDisp_Word( 2949 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2950 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2951 2952 } else { 2953 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 2954 emitXOR_Reg_RegOff_Word( 2955 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2956 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2957 2958 } else { 2959 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 2960 emitXOR_Reg_RegIdx_Word( 2961 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2962 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 2963 2964 } else { 2965 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 2966 emitXOR_Reg_RegInd_Word( 2967 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2968 getBase(MIR_BinaryAcc.getValue(inst))); 2969 } 2970 } 2971 } 2972 } 2973 } 2974 } 2975 2976 } else { 2977 if (isQuad(inst)) { 2978 if (isImm(MIR_BinaryAcc.getValue(inst))) { 2979 emitXOR_Reg_Imm_Quad( 2980 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2981 getImm(MIR_BinaryAcc.getValue(inst))); 2982 2983 } else { 2984 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 2985 emitXOR_Reg_Reg_Quad( 2986 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2987 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 2988 2989 } else { 2990 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 2991 emitXOR_Reg_Abs_Quad( 2992 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2993 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 2994 2995 } else { 2996 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 2997 emitXOR_Reg_RegDisp_Quad( 2998 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 2999 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3000 3001 } else { 3002 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 3003 emitXOR_Reg_RegOff_Quad( 3004 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3005 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3006 3007 } else { 3008 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 3009 emitXOR_Reg_RegIdx_Quad( 3010 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3011 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3012 3013 } else { 3014 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3015 emitXOR_Reg_RegInd_Quad( 3016 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3017 getBase(MIR_BinaryAcc.getValue(inst))); 3018 } 3019 } 3020 } 3021 } 3022 } 3023 } 3024 3025 } else { 3026 if (isImm(MIR_BinaryAcc.getValue(inst))) { 3027 emitXOR_Reg_Imm( 3028 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3029 getImm(MIR_BinaryAcc.getValue(inst))); 3030 3031 } else { 3032 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 3033 emitXOR_Reg_Reg( 3034 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3035 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3036 3037 } else { 3038 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 3039 emitXOR_Reg_Abs( 3040 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3041 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 3042 3043 } else { 3044 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 3045 emitXOR_Reg_RegDisp( 3046 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3047 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3048 3049 } else { 3050 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 3051 emitXOR_Reg_RegOff( 3052 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3053 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3054 3055 } else { 3056 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 3057 emitXOR_Reg_RegIdx( 3058 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3059 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3060 3061 } else { 3062 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3063 emitXOR_Reg_RegInd( 3064 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3065 getBase(MIR_BinaryAcc.getValue(inst))); 3066 } 3067 } 3068 } 3069 } 3070 } 3071 } 3072 } 3073 } 3074 } 3075 3076 } else { 3077 if (isImm(MIR_BinaryAcc.getValue(inst))) { 3078 if (isByte(inst)) { 3079 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3080 emitXOR_Abs_Imm_Byte( 3081 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3082 getImm(MIR_BinaryAcc.getValue(inst))); 3083 3084 } else { 3085 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3086 emitXOR_RegDisp_Imm_Byte( 3087 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3088 getImm(MIR_BinaryAcc.getValue(inst))); 3089 3090 } else { 3091 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3092 emitXOR_RegOff_Imm_Byte( 3093 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3094 getImm(MIR_BinaryAcc.getValue(inst))); 3095 3096 } else { 3097 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3098 emitXOR_RegIdx_Imm_Byte( 3099 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3100 getImm(MIR_BinaryAcc.getValue(inst))); 3101 3102 } else { 3103 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3104 emitXOR_RegInd_Imm_Byte( 3105 getBase(MIR_BinaryAcc.getResult(inst)), 3106 getImm(MIR_BinaryAcc.getValue(inst))); 3107 } 3108 } 3109 } 3110 } 3111 3112 } else { 3113 if (isWord(inst)) { 3114 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3115 emitXOR_Abs_Imm_Word( 3116 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3117 getImm(MIR_BinaryAcc.getValue(inst))); 3118 3119 } else { 3120 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3121 emitXOR_RegDisp_Imm_Word( 3122 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3123 getImm(MIR_BinaryAcc.getValue(inst))); 3124 3125 } else { 3126 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3127 emitXOR_RegOff_Imm_Word( 3128 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3129 getImm(MIR_BinaryAcc.getValue(inst))); 3130 3131 } else { 3132 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3133 emitXOR_RegIdx_Imm_Word( 3134 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3135 getImm(MIR_BinaryAcc.getValue(inst))); 3136 3137 } else { 3138 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3139 emitXOR_RegInd_Imm_Word( 3140 getBase(MIR_BinaryAcc.getResult(inst)), 3141 getImm(MIR_BinaryAcc.getValue(inst))); 3142 } 3143 } 3144 } 3145 } 3146 3147 } else { 3148 if (isQuad(inst)) { 3149 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3150 emitXOR_Abs_Imm_Quad( 3151 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3152 getImm(MIR_BinaryAcc.getValue(inst))); 3153 3154 } else { 3155 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3156 emitXOR_RegDisp_Imm_Quad( 3157 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3158 getImm(MIR_BinaryAcc.getValue(inst))); 3159 3160 } else { 3161 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3162 emitXOR_RegOff_Imm_Quad( 3163 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3164 getImm(MIR_BinaryAcc.getValue(inst))); 3165 3166 } else { 3167 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3168 emitXOR_RegIdx_Imm_Quad( 3169 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3170 getImm(MIR_BinaryAcc.getValue(inst))); 3171 3172 } else { 3173 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3174 emitXOR_RegInd_Imm_Quad( 3175 getBase(MIR_BinaryAcc.getResult(inst)), 3176 getImm(MIR_BinaryAcc.getValue(inst))); 3177 } 3178 } 3179 } 3180 } 3181 3182 } else { 3183 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3184 emitXOR_Abs_Imm( 3185 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3186 getImm(MIR_BinaryAcc.getValue(inst))); 3187 3188 } else { 3189 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3190 emitXOR_RegDisp_Imm( 3191 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3192 getImm(MIR_BinaryAcc.getValue(inst))); 3193 3194 } else { 3195 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3196 emitXOR_RegOff_Imm( 3197 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3198 getImm(MIR_BinaryAcc.getValue(inst))); 3199 3200 } else { 3201 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3202 emitXOR_RegIdx_Imm( 3203 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3204 getImm(MIR_BinaryAcc.getValue(inst))); 3205 3206 } else { 3207 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3208 emitXOR_RegInd_Imm( 3209 getBase(MIR_BinaryAcc.getResult(inst)), 3210 getImm(MIR_BinaryAcc.getValue(inst))); 3211 } 3212 } 3213 } 3214 } 3215 } 3216 } 3217 } 3218 3219 } else { 3220 if (isByte(inst)) { 3221 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3222 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3223 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3224 emitXOR_Abs_Reg_Byte( 3225 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3226 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3227 3228 } else { 3229 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3230 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3231 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3232 emitXOR_RegDisp_Reg_Byte( 3233 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3234 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3235 3236 } else { 3237 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3238 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3239 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3240 emitXOR_RegOff_Reg_Byte( 3241 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3242 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3243 3244 } else { 3245 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3246 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3247 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3248 emitXOR_RegIdx_Reg_Byte( 3249 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3250 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3251 3252 } else { 3253 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3254 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3255 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3256 emitXOR_RegInd_Reg_Byte( 3257 getBase(MIR_BinaryAcc.getResult(inst)), 3258 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3259 } 3260 } 3261 } 3262 } 3263 3264 } else { 3265 if (isWord(inst)) { 3266 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3267 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3268 emitXOR_Abs_Reg_Word( 3269 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3270 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3271 3272 } else { 3273 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3274 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3275 emitXOR_RegDisp_Reg_Word( 3276 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3277 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3278 3279 } else { 3280 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3281 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3282 emitXOR_RegOff_Reg_Word( 3283 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3284 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3285 3286 } else { 3287 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3288 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3289 emitXOR_RegIdx_Reg_Word( 3290 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3291 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3292 3293 } else { 3294 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3295 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3296 emitXOR_RegInd_Reg_Word( 3297 getBase(MIR_BinaryAcc.getResult(inst)), 3298 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3299 } 3300 } 3301 } 3302 } 3303 3304 } else { 3305 if (isQuad(inst)) { 3306 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3307 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3308 emitXOR_Abs_Reg_Quad( 3309 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3310 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3311 3312 } else { 3313 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3314 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3315 emitXOR_RegDisp_Reg_Quad( 3316 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3317 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3318 3319 } else { 3320 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3321 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3322 emitXOR_RegOff_Reg_Quad( 3323 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3324 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3325 3326 } else { 3327 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3328 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3329 emitXOR_RegIdx_Reg_Quad( 3330 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3331 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3332 3333 } else { 3334 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3335 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3336 emitXOR_RegInd_Reg_Quad( 3337 getBase(MIR_BinaryAcc.getResult(inst)), 3338 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3339 } 3340 } 3341 } 3342 } 3343 3344 } else { 3345 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3346 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3347 emitXOR_Abs_Reg( 3348 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3349 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3350 3351 } else { 3352 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3353 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3354 emitXOR_RegDisp_Reg( 3355 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3356 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3357 3358 } else { 3359 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3360 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3361 emitXOR_RegOff_Reg( 3362 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3363 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3364 3365 } else { 3366 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3367 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3368 emitXOR_RegIdx_Reg( 3369 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3370 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3371 3372 } else { 3373 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3374 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3375 emitXOR_RegInd_Reg( 3376 getBase(MIR_BinaryAcc.getResult(inst)), 3377 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3378 } 3379 } 3380 } 3381 } 3382 } 3383 } 3384 } 3385 } 3386 } 3387 } 3388 3389 /** 3390 * Emit the given instruction, assuming that 3391 * it is a MIR_BinaryAcc instruction 3392 * and has a RCL operator 3393 * 3394 * @param inst the instruction to assemble 3395 */ 3396 private void doRCL(Instruction inst) { 3397 if (isImm(MIR_BinaryAcc.getValue(inst))) { 3398 if (isByte(inst)) { 3399 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 3400 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 3401 emitRCL_Reg_Imm_Byte( 3402 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3403 getImm(MIR_BinaryAcc.getValue(inst))); 3404 3405 } else { 3406 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3407 emitRCL_Abs_Imm_Byte( 3408 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3409 getImm(MIR_BinaryAcc.getValue(inst))); 3410 3411 } else { 3412 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3413 emitRCL_RegDisp_Imm_Byte( 3414 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3415 getImm(MIR_BinaryAcc.getValue(inst))); 3416 3417 } else { 3418 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3419 emitRCL_RegOff_Imm_Byte( 3420 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3421 getImm(MIR_BinaryAcc.getValue(inst))); 3422 3423 } else { 3424 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3425 emitRCL_RegIdx_Imm_Byte( 3426 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3427 getImm(MIR_BinaryAcc.getValue(inst))); 3428 3429 } else { 3430 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3431 emitRCL_RegInd_Imm_Byte( 3432 getBase(MIR_BinaryAcc.getResult(inst)), 3433 getImm(MIR_BinaryAcc.getValue(inst))); 3434 } 3435 } 3436 } 3437 } 3438 } 3439 3440 } else { 3441 if (isWord(inst)) { 3442 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 3443 emitRCL_Reg_Imm_Word( 3444 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3445 getImm(MIR_BinaryAcc.getValue(inst))); 3446 3447 } else { 3448 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3449 emitRCL_Abs_Imm_Word( 3450 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3451 getImm(MIR_BinaryAcc.getValue(inst))); 3452 3453 } else { 3454 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3455 emitRCL_RegDisp_Imm_Word( 3456 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3457 getImm(MIR_BinaryAcc.getValue(inst))); 3458 3459 } else { 3460 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3461 emitRCL_RegOff_Imm_Word( 3462 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3463 getImm(MIR_BinaryAcc.getValue(inst))); 3464 3465 } else { 3466 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3467 emitRCL_RegIdx_Imm_Word( 3468 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3469 getImm(MIR_BinaryAcc.getValue(inst))); 3470 3471 } else { 3472 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3473 emitRCL_RegInd_Imm_Word( 3474 getBase(MIR_BinaryAcc.getResult(inst)), 3475 getImm(MIR_BinaryAcc.getValue(inst))); 3476 } 3477 } 3478 } 3479 } 3480 } 3481 3482 } else { 3483 if (isQuad(inst)) { 3484 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 3485 emitRCL_Reg_Imm_Quad( 3486 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3487 getImm(MIR_BinaryAcc.getValue(inst))); 3488 3489 } else { 3490 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3491 emitRCL_Abs_Imm_Quad( 3492 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3493 getImm(MIR_BinaryAcc.getValue(inst))); 3494 3495 } else { 3496 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3497 emitRCL_RegDisp_Imm_Quad( 3498 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3499 getImm(MIR_BinaryAcc.getValue(inst))); 3500 3501 } else { 3502 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3503 emitRCL_RegOff_Imm_Quad( 3504 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3505 getImm(MIR_BinaryAcc.getValue(inst))); 3506 3507 } else { 3508 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3509 emitRCL_RegIdx_Imm_Quad( 3510 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3511 getImm(MIR_BinaryAcc.getValue(inst))); 3512 3513 } else { 3514 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3515 emitRCL_RegInd_Imm_Quad( 3516 getBase(MIR_BinaryAcc.getResult(inst)), 3517 getImm(MIR_BinaryAcc.getValue(inst))); 3518 } 3519 } 3520 } 3521 } 3522 } 3523 3524 } else { 3525 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 3526 emitRCL_Reg_Imm( 3527 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3528 getImm(MIR_BinaryAcc.getValue(inst))); 3529 3530 } else { 3531 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3532 emitRCL_Abs_Imm( 3533 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3534 getImm(MIR_BinaryAcc.getValue(inst))); 3535 3536 } else { 3537 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3538 emitRCL_RegDisp_Imm( 3539 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3540 getImm(MIR_BinaryAcc.getValue(inst))); 3541 3542 } else { 3543 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3544 emitRCL_RegOff_Imm( 3545 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3546 getImm(MIR_BinaryAcc.getValue(inst))); 3547 3548 } else { 3549 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3550 emitRCL_RegIdx_Imm( 3551 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3552 getImm(MIR_BinaryAcc.getValue(inst))); 3553 3554 } else { 3555 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3556 emitRCL_RegInd_Imm( 3557 getBase(MIR_BinaryAcc.getResult(inst)), 3558 getImm(MIR_BinaryAcc.getValue(inst))); 3559 } 3560 } 3561 } 3562 } 3563 } 3564 } 3565 } 3566 } 3567 3568 } else { 3569 if (isByte(inst)) { 3570 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 3571 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3572 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 3573 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3574 emitRCL_Reg_Reg_Byte( 3575 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3576 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3577 3578 } else { 3579 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3580 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3581 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3582 emitRCL_Abs_Reg_Byte( 3583 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3584 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3585 3586 } else { 3587 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3588 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3589 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3590 emitRCL_RegDisp_Reg_Byte( 3591 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3592 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3593 3594 } else { 3595 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3596 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3597 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3598 emitRCL_RegOff_Reg_Byte( 3599 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3600 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3601 3602 } else { 3603 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3604 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3605 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3606 emitRCL_RegIdx_Reg_Byte( 3607 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3608 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3609 3610 } else { 3611 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3612 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3613 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 3614 emitRCL_RegInd_Reg_Byte( 3615 getBase(MIR_BinaryAcc.getResult(inst)), 3616 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3617 } 3618 } 3619 } 3620 } 3621 } 3622 3623 } else { 3624 if (isWord(inst)) { 3625 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 3626 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3627 emitRCL_Reg_Reg_Word( 3628 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3629 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3630 3631 } else { 3632 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3633 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3634 emitRCL_Abs_Reg_Word( 3635 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3636 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3637 3638 } else { 3639 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3640 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3641 emitRCL_RegDisp_Reg_Word( 3642 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3643 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3644 3645 } else { 3646 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3647 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3648 emitRCL_RegOff_Reg_Word( 3649 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3650 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3651 3652 } else { 3653 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3654 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3655 emitRCL_RegIdx_Reg_Word( 3656 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3657 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3658 3659 } else { 3660 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3661 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3662 emitRCL_RegInd_Reg_Word( 3663 getBase(MIR_BinaryAcc.getResult(inst)), 3664 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3665 } 3666 } 3667 } 3668 } 3669 } 3670 3671 } else { 3672 if (isQuad(inst)) { 3673 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 3674 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3675 emitRCL_Reg_Reg_Quad( 3676 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3677 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3678 3679 } else { 3680 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3681 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3682 emitRCL_Abs_Reg_Quad( 3683 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3684 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3685 3686 } else { 3687 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3688 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3689 emitRCL_RegDisp_Reg_Quad( 3690 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3691 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3692 3693 } else { 3694 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3695 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3696 emitRCL_RegOff_Reg_Quad( 3697 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3698 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3699 3700 } else { 3701 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3702 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3703 emitRCL_RegIdx_Reg_Quad( 3704 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3705 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3706 3707 } else { 3708 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3709 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3710 emitRCL_RegInd_Reg_Quad( 3711 getBase(MIR_BinaryAcc.getResult(inst)), 3712 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3713 } 3714 } 3715 } 3716 } 3717 } 3718 3719 } else { 3720 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 3721 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3722 emitRCL_Reg_Reg( 3723 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 3724 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3725 3726 } else { 3727 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 3728 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3729 emitRCL_Abs_Reg( 3730 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 3731 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3732 3733 } else { 3734 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 3735 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3736 emitRCL_RegDisp_Reg( 3737 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3738 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3739 3740 } else { 3741 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 3742 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3743 emitRCL_RegOff_Reg( 3744 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3745 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3746 3747 } else { 3748 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 3749 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3750 emitRCL_RegIdx_Reg( 3751 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 3752 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3753 3754 } else { 3755 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3756 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3757 emitRCL_RegInd_Reg( 3758 getBase(MIR_BinaryAcc.getResult(inst)), 3759 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 3760 } 3761 } 3762 } 3763 } 3764 } 3765 } 3766 } 3767 } 3768 } 3769 } 3770 3771 /** 3772 * Emit the given instruction, assuming that 3773 * it is a MIR_Unary instruction 3774 * and has a MOVSX operator 3775 * 3776 * @param inst the instruction to assemble 3777 */ 3778 private void doMOVSX(Instruction inst) { 3779 if (isByte(inst)) { 3780 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 3781 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3782 emitMOVSX_Reg_Reg_Byte( 3783 getGPR_Reg(MIR_Unary.getResult(inst)), 3784 getGPR_Reg(MIR_Unary.getVal(inst))); 3785 3786 } else { 3787 if (isAbs(MIR_Unary.getVal(inst))) { 3788 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3789 emitMOVSX_Reg_Abs_Byte( 3790 getGPR_Reg(MIR_Unary.getResult(inst)), 3791 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 3792 3793 } else { 3794 if (isRegDisp(MIR_Unary.getVal(inst))) { 3795 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3796 emitMOVSX_Reg_RegDisp_Byte( 3797 getGPR_Reg(MIR_Unary.getResult(inst)), 3798 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 3799 3800 } else { 3801 if (isRegOff(MIR_Unary.getVal(inst))) { 3802 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3803 emitMOVSX_Reg_RegOff_Byte( 3804 getGPR_Reg(MIR_Unary.getResult(inst)), 3805 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 3806 3807 } else { 3808 if (isRegIdx(MIR_Unary.getVal(inst))) { 3809 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3810 emitMOVSX_Reg_RegIdx_Byte( 3811 getGPR_Reg(MIR_Unary.getResult(inst)), 3812 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 3813 3814 } else { 3815 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3816 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3817 emitMOVSX_Reg_RegInd_Byte( 3818 getGPR_Reg(MIR_Unary.getResult(inst)), 3819 getBase(MIR_Unary.getVal(inst))); 3820 } 3821 } 3822 } 3823 } 3824 } 3825 3826 } else { 3827 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 3828 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3829 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3830 emitMOVSX_Reg_Reg_Word( 3831 getGPR_Reg(MIR_Unary.getResult(inst)), 3832 getGPR_Reg(MIR_Unary.getVal(inst))); 3833 3834 } else { 3835 if (isAbs(MIR_Unary.getVal(inst))) { 3836 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3837 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3838 emitMOVSX_Reg_Abs_Word( 3839 getGPR_Reg(MIR_Unary.getResult(inst)), 3840 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 3841 3842 } else { 3843 if (isRegDisp(MIR_Unary.getVal(inst))) { 3844 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3845 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3846 emitMOVSX_Reg_RegDisp_Word( 3847 getGPR_Reg(MIR_Unary.getResult(inst)), 3848 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 3849 3850 } else { 3851 if (isRegOff(MIR_Unary.getVal(inst))) { 3852 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3853 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3854 emitMOVSX_Reg_RegOff_Word( 3855 getGPR_Reg(MIR_Unary.getResult(inst)), 3856 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 3857 3858 } else { 3859 if (isRegIdx(MIR_Unary.getVal(inst))) { 3860 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3861 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3862 emitMOVSX_Reg_RegIdx_Word( 3863 getGPR_Reg(MIR_Unary.getResult(inst)), 3864 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 3865 3866 } else { 3867 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3868 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3869 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3870 emitMOVSX_Reg_RegInd_Word( 3871 getGPR_Reg(MIR_Unary.getResult(inst)), 3872 getBase(MIR_Unary.getVal(inst))); 3873 } 3874 } 3875 } 3876 } 3877 } 3878 } 3879 } 3880 3881 /** 3882 * Emit the given instruction, assuming that 3883 * it is a MIR_BinaryAcc instruction 3884 * and has a FSUB operator 3885 * 3886 * @param inst the instruction to assemble 3887 */ 3888 private void doFSUB(Instruction inst) { 3889 if (isQuad(inst)) { 3890 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 3891 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3892 emitFSUB_Reg_Abs_Quad( 3893 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3894 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 3895 3896 } else { 3897 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 3898 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3899 emitFSUB_Reg_RegDisp_Quad( 3900 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3901 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3902 3903 } else { 3904 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 3905 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3906 emitFSUB_Reg_RegOff_Quad( 3907 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3908 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3909 3910 } else { 3911 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 3912 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3913 emitFSUB_Reg_RegIdx_Quad( 3914 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3915 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3916 3917 } else { 3918 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3919 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3920 emitFSUB_Reg_RegInd_Quad( 3921 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3922 getBase(MIR_BinaryAcc.getValue(inst))); 3923 } 3924 } 3925 } 3926 } 3927 3928 } else { 3929 if (isFPR_Reg(MIR_BinaryAcc.getValue(inst))) { 3930 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3931 emitFSUB_Reg_Reg( 3932 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3933 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 3934 3935 } else { 3936 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 3937 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3938 emitFSUB_Reg_Abs( 3939 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3940 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 3941 3942 } else { 3943 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 3944 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3945 emitFSUB_Reg_RegDisp( 3946 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3947 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3948 3949 } else { 3950 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 3951 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3952 emitFSUB_Reg_RegOff( 3953 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3954 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3955 3956 } else { 3957 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 3958 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3959 emitFSUB_Reg_RegIdx( 3960 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3961 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 3962 3963 } else { 3964 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3965 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 3966 emitFSUB_Reg_RegInd( 3967 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 3968 getBase(MIR_BinaryAcc.getValue(inst))); 3969 } 3970 } 3971 } 3972 } 3973 } 3974 } 3975 } 3976 3977 /** 3978 * Emit the given instruction, assuming that 3979 * it is a MIR_Move instruction 3980 * and has a MOVLPS operator 3981 * 3982 * @param inst the instruction to assemble 3983 */ 3984 private void doMOVLPS(Instruction inst) { 3985 if (isXMM_Reg(MIR_Move.getResult(inst))) { 3986 if (isXMM_Reg(MIR_Move.getValue(inst))) { 3987 emitMOVLPS_Reg_Reg( 3988 getXMM_Reg(MIR_Move.getResult(inst)), 3989 getXMM_Reg(MIR_Move.getValue(inst))); 3990 3991 } else { 3992 if (isAbs(MIR_Move.getValue(inst))) { 3993 emitMOVLPS_Reg_Abs( 3994 getXMM_Reg(MIR_Move.getResult(inst)), 3995 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 3996 3997 } else { 3998 if (isRegDisp(MIR_Move.getValue(inst))) { 3999 emitMOVLPS_Reg_RegDisp( 4000 getXMM_Reg(MIR_Move.getResult(inst)), 4001 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 4002 4003 } else { 4004 if (isRegOff(MIR_Move.getValue(inst))) { 4005 emitMOVLPS_Reg_RegOff( 4006 getXMM_Reg(MIR_Move.getResult(inst)), 4007 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 4008 4009 } else { 4010 if (isRegIdx(MIR_Move.getValue(inst))) { 4011 emitMOVLPS_Reg_RegIdx( 4012 getXMM_Reg(MIR_Move.getResult(inst)), 4013 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 4014 4015 } else { 4016 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4017 emitMOVLPS_Reg_RegInd( 4018 getXMM_Reg(MIR_Move.getResult(inst)), 4019 getBase(MIR_Move.getValue(inst))); 4020 } 4021 } 4022 } 4023 } 4024 } 4025 4026 } else { 4027 if (isAbs(MIR_Move.getResult(inst))) { 4028 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4029 emitMOVLPS_Abs_Reg( 4030 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 4031 getXMM_Reg(MIR_Move.getValue(inst))); 4032 4033 } else { 4034 if (isRegDisp(MIR_Move.getResult(inst))) { 4035 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4036 emitMOVLPS_RegDisp_Reg( 4037 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 4038 getXMM_Reg(MIR_Move.getValue(inst))); 4039 4040 } else { 4041 if (isRegOff(MIR_Move.getResult(inst))) { 4042 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4043 emitMOVLPS_RegOff_Reg( 4044 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 4045 getXMM_Reg(MIR_Move.getValue(inst))); 4046 4047 } else { 4048 if (isRegIdx(MIR_Move.getResult(inst))) { 4049 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4050 emitMOVLPS_RegIdx_Reg( 4051 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 4052 getXMM_Reg(MIR_Move.getValue(inst))); 4053 4054 } else { 4055 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4056 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4057 emitMOVLPS_RegInd_Reg( 4058 getBase(MIR_Move.getResult(inst)), 4059 getXMM_Reg(MIR_Move.getValue(inst))); 4060 } 4061 } 4062 } 4063 } 4064 } 4065 } 4066 4067 /** 4068 * Emit the given instruction, assuming that 4069 * it is a MIR_Move instruction 4070 * and has a FLD operator 4071 * 4072 * @param inst the instruction to assemble 4073 */ 4074 private void doFLD(Instruction inst) { 4075 if (isQuad(inst)) { 4076 if (isAbs(MIR_Move.getValue(inst))) { 4077 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4078 emitFLD_Reg_Abs_Quad( 4079 getFPR_Reg(MIR_Move.getResult(inst)), 4080 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 4081 4082 } else { 4083 if (isRegDisp(MIR_Move.getValue(inst))) { 4084 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4085 emitFLD_Reg_RegDisp_Quad( 4086 getFPR_Reg(MIR_Move.getResult(inst)), 4087 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 4088 4089 } else { 4090 if (isRegOff(MIR_Move.getValue(inst))) { 4091 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4092 emitFLD_Reg_RegOff_Quad( 4093 getFPR_Reg(MIR_Move.getResult(inst)), 4094 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 4095 4096 } else { 4097 if (isRegIdx(MIR_Move.getValue(inst))) { 4098 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4099 emitFLD_Reg_RegIdx_Quad( 4100 getFPR_Reg(MIR_Move.getResult(inst)), 4101 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 4102 4103 } else { 4104 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4105 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4106 emitFLD_Reg_RegInd_Quad( 4107 getFPR_Reg(MIR_Move.getResult(inst)), 4108 getBase(MIR_Move.getValue(inst))); 4109 } 4110 } 4111 } 4112 } 4113 4114 } else { 4115 if (isFPR_Reg(MIR_Move.getValue(inst))) { 4116 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4117 emitFLD_Reg_Reg( 4118 getFPR_Reg(MIR_Move.getResult(inst)), 4119 getFPR_Reg(MIR_Move.getValue(inst))); 4120 4121 } else { 4122 if (isAbs(MIR_Move.getValue(inst))) { 4123 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4124 emitFLD_Reg_Abs( 4125 getFPR_Reg(MIR_Move.getResult(inst)), 4126 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 4127 4128 } else { 4129 if (isRegDisp(MIR_Move.getValue(inst))) { 4130 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4131 emitFLD_Reg_RegDisp( 4132 getFPR_Reg(MIR_Move.getResult(inst)), 4133 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 4134 4135 } else { 4136 if (isRegOff(MIR_Move.getValue(inst))) { 4137 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4138 emitFLD_Reg_RegOff( 4139 getFPR_Reg(MIR_Move.getResult(inst)), 4140 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 4141 4142 } else { 4143 if (isRegIdx(MIR_Move.getValue(inst))) { 4144 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4145 emitFLD_Reg_RegIdx( 4146 getFPR_Reg(MIR_Move.getResult(inst)), 4147 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 4148 4149 } else { 4150 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4151 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4152 emitFLD_Reg_RegInd( 4153 getFPR_Reg(MIR_Move.getResult(inst)), 4154 getBase(MIR_Move.getValue(inst))); 4155 } 4156 } 4157 } 4158 } 4159 } 4160 } 4161 } 4162 4163 /** 4164 * Emit the given instruction, assuming that 4165 * it is a MIR_UnaryNoRes instruction 4166 * and has a PUSH operator 4167 * 4168 * @param inst the instruction to assemble 4169 */ 4170 private void doPUSH(Instruction inst) { 4171 if (isImm(MIR_UnaryNoRes.getVal(inst))) { 4172 emitPUSH_Imm( 4173 getImm(MIR_UnaryNoRes.getVal(inst))); 4174 4175 } else { 4176 if (isGPR_Reg(MIR_UnaryNoRes.getVal(inst))) { 4177 emitPUSH_Reg( 4178 getGPR_Reg(MIR_UnaryNoRes.getVal(inst))); 4179 4180 } else { 4181 if (isAbs(MIR_UnaryNoRes.getVal(inst))) { 4182 emitPUSH_Abs( 4183 getDisp(MIR_UnaryNoRes.getVal(inst)).toWord().toAddress()); 4184 4185 } else { 4186 if (isRegDisp(MIR_UnaryNoRes.getVal(inst))) { 4187 emitPUSH_RegDisp( 4188 getBase(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 4189 4190 } else { 4191 if (isRegOff(MIR_UnaryNoRes.getVal(inst))) { 4192 emitPUSH_RegOff( 4193 getIndex(MIR_UnaryNoRes.getVal(inst)), getScale(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 4194 4195 } else { 4196 if (isRegIdx(MIR_UnaryNoRes.getVal(inst))) { 4197 emitPUSH_RegIdx( 4198 getBase(MIR_UnaryNoRes.getVal(inst)), getIndex(MIR_UnaryNoRes.getVal(inst)), getScale(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 4199 4200 } else { 4201 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryNoRes.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4202 emitPUSH_RegInd( 4203 getBase(MIR_UnaryNoRes.getVal(inst))); 4204 } 4205 } 4206 } 4207 } 4208 } 4209 } 4210 } 4211 4212 /** 4213 * Emit the given instruction, assuming that 4214 * it is a MIR_BinaryAcc instruction 4215 * and has a CMPLTSS operator 4216 * 4217 * @param inst the instruction to assemble 4218 */ 4219 private void doCMPLTSS(Instruction inst) { 4220 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 4221 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4222 emitCMPLTSS_Reg_Reg( 4223 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 4224 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 4225 4226 } else { 4227 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 4228 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4229 emitCMPLTSS_Reg_Abs( 4230 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 4231 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 4232 4233 } else { 4234 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 4235 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4236 emitCMPLTSS_Reg_RegDisp( 4237 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 4238 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 4239 4240 } else { 4241 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 4242 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4243 emitCMPLTSS_Reg_RegOff( 4244 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 4245 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 4246 4247 } else { 4248 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 4249 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4250 emitCMPLTSS_Reg_RegIdx( 4251 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 4252 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 4253 4254 } else { 4255 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4256 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4257 emitCMPLTSS_Reg_RegInd( 4258 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 4259 getBase(MIR_BinaryAcc.getValue(inst))); 4260 } 4261 } 4262 } 4263 } 4264 } 4265 } 4266 4267 /** 4268 * Emit the given instruction, assuming that 4269 * it is a MIR_Test instruction 4270 * and has a BTS operator 4271 * 4272 * @param inst the instruction to assemble 4273 */ 4274 private void doBTS(Instruction inst) { 4275 if (isQuad(inst)) { 4276 if (isImm(MIR_Test.getVal2(inst))) { 4277 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 4278 emitBTS_Reg_Imm_Quad( 4279 getGPR_Reg(MIR_Test.getVal1(inst)), 4280 getImm(MIR_Test.getVal2(inst))); 4281 4282 } else { 4283 if (isAbs(MIR_Test.getVal1(inst))) { 4284 emitBTS_Abs_Imm_Quad( 4285 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 4286 getImm(MIR_Test.getVal2(inst))); 4287 4288 } else { 4289 if (isRegDisp(MIR_Test.getVal1(inst))) { 4290 emitBTS_RegDisp_Imm_Quad( 4291 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4292 getImm(MIR_Test.getVal2(inst))); 4293 4294 } else { 4295 if (isRegOff(MIR_Test.getVal1(inst))) { 4296 emitBTS_RegOff_Imm_Quad( 4297 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4298 getImm(MIR_Test.getVal2(inst))); 4299 4300 } else { 4301 if (isRegIdx(MIR_Test.getVal1(inst))) { 4302 emitBTS_RegIdx_Imm_Quad( 4303 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4304 getImm(MIR_Test.getVal2(inst))); 4305 4306 } else { 4307 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4308 emitBTS_RegInd_Imm_Quad( 4309 getBase(MIR_Test.getVal1(inst)), 4310 getImm(MIR_Test.getVal2(inst))); 4311 } 4312 } 4313 } 4314 } 4315 } 4316 4317 } else { 4318 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 4319 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4320 emitBTS_Reg_Reg_Quad( 4321 getGPR_Reg(MIR_Test.getVal1(inst)), 4322 getGPR_Reg(MIR_Test.getVal2(inst))); 4323 4324 } else { 4325 if (isAbs(MIR_Test.getVal1(inst))) { 4326 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4327 emitBTS_Abs_Reg_Quad( 4328 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 4329 getGPR_Reg(MIR_Test.getVal2(inst))); 4330 4331 } else { 4332 if (isRegDisp(MIR_Test.getVal1(inst))) { 4333 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4334 emitBTS_RegDisp_Reg_Quad( 4335 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4336 getGPR_Reg(MIR_Test.getVal2(inst))); 4337 4338 } else { 4339 if (isRegOff(MIR_Test.getVal1(inst))) { 4340 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4341 emitBTS_RegOff_Reg_Quad( 4342 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4343 getGPR_Reg(MIR_Test.getVal2(inst))); 4344 4345 } else { 4346 if (isRegIdx(MIR_Test.getVal1(inst))) { 4347 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4348 emitBTS_RegIdx_Reg_Quad( 4349 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4350 getGPR_Reg(MIR_Test.getVal2(inst))); 4351 4352 } else { 4353 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4354 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4355 emitBTS_RegInd_Reg_Quad( 4356 getBase(MIR_Test.getVal1(inst)), 4357 getGPR_Reg(MIR_Test.getVal2(inst))); 4358 } 4359 } 4360 } 4361 } 4362 } 4363 } 4364 4365 } else { 4366 if (isImm(MIR_Test.getVal2(inst))) { 4367 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 4368 emitBTS_Reg_Imm( 4369 getGPR_Reg(MIR_Test.getVal1(inst)), 4370 getImm(MIR_Test.getVal2(inst))); 4371 4372 } else { 4373 if (isAbs(MIR_Test.getVal1(inst))) { 4374 emitBTS_Abs_Imm( 4375 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 4376 getImm(MIR_Test.getVal2(inst))); 4377 4378 } else { 4379 if (isRegDisp(MIR_Test.getVal1(inst))) { 4380 emitBTS_RegDisp_Imm( 4381 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4382 getImm(MIR_Test.getVal2(inst))); 4383 4384 } else { 4385 if (isRegOff(MIR_Test.getVal1(inst))) { 4386 emitBTS_RegOff_Imm( 4387 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4388 getImm(MIR_Test.getVal2(inst))); 4389 4390 } else { 4391 if (isRegIdx(MIR_Test.getVal1(inst))) { 4392 emitBTS_RegIdx_Imm( 4393 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4394 getImm(MIR_Test.getVal2(inst))); 4395 4396 } else { 4397 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4398 emitBTS_RegInd_Imm( 4399 getBase(MIR_Test.getVal1(inst)), 4400 getImm(MIR_Test.getVal2(inst))); 4401 } 4402 } 4403 } 4404 } 4405 } 4406 4407 } else { 4408 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 4409 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4410 emitBTS_Reg_Reg( 4411 getGPR_Reg(MIR_Test.getVal1(inst)), 4412 getGPR_Reg(MIR_Test.getVal2(inst))); 4413 4414 } else { 4415 if (isAbs(MIR_Test.getVal1(inst))) { 4416 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4417 emitBTS_Abs_Reg( 4418 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 4419 getGPR_Reg(MIR_Test.getVal2(inst))); 4420 4421 } else { 4422 if (isRegDisp(MIR_Test.getVal1(inst))) { 4423 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4424 emitBTS_RegDisp_Reg( 4425 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4426 getGPR_Reg(MIR_Test.getVal2(inst))); 4427 4428 } else { 4429 if (isRegOff(MIR_Test.getVal1(inst))) { 4430 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4431 emitBTS_RegOff_Reg( 4432 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4433 getGPR_Reg(MIR_Test.getVal2(inst))); 4434 4435 } else { 4436 if (isRegIdx(MIR_Test.getVal1(inst))) { 4437 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4438 emitBTS_RegIdx_Reg( 4439 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4440 getGPR_Reg(MIR_Test.getVal2(inst))); 4441 4442 } else { 4443 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4444 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4445 emitBTS_RegInd_Reg( 4446 getBase(MIR_Test.getVal1(inst)), 4447 getGPR_Reg(MIR_Test.getVal2(inst))); 4448 } 4449 } 4450 } 4451 } 4452 } 4453 } 4454 } 4455 } 4456 4457 /** 4458 * Emit the given instruction, assuming that 4459 * it is a MIR_BinaryAcc instruction 4460 * and has a RCR operator 4461 * 4462 * @param inst the instruction to assemble 4463 */ 4464 private void doRCR(Instruction inst) { 4465 if (isImm(MIR_BinaryAcc.getValue(inst))) { 4466 if (isByte(inst)) { 4467 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 4468 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 4469 emitRCR_Reg_Imm_Byte( 4470 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 4471 getImm(MIR_BinaryAcc.getValue(inst))); 4472 4473 } else { 4474 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 4475 emitRCR_Abs_Imm_Byte( 4476 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 4477 getImm(MIR_BinaryAcc.getValue(inst))); 4478 4479 } else { 4480 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 4481 emitRCR_RegDisp_Imm_Byte( 4482 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4483 getImm(MIR_BinaryAcc.getValue(inst))); 4484 4485 } else { 4486 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 4487 emitRCR_RegOff_Imm_Byte( 4488 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4489 getImm(MIR_BinaryAcc.getValue(inst))); 4490 4491 } else { 4492 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 4493 emitRCR_RegIdx_Imm_Byte( 4494 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4495 getImm(MIR_BinaryAcc.getValue(inst))); 4496 4497 } else { 4498 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4499 emitRCR_RegInd_Imm_Byte( 4500 getBase(MIR_BinaryAcc.getResult(inst)), 4501 getImm(MIR_BinaryAcc.getValue(inst))); 4502 } 4503 } 4504 } 4505 } 4506 } 4507 4508 } else { 4509 if (isWord(inst)) { 4510 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 4511 emitRCR_Reg_Imm_Word( 4512 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 4513 getImm(MIR_BinaryAcc.getValue(inst))); 4514 4515 } else { 4516 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 4517 emitRCR_Abs_Imm_Word( 4518 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 4519 getImm(MIR_BinaryAcc.getValue(inst))); 4520 4521 } else { 4522 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 4523 emitRCR_RegDisp_Imm_Word( 4524 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4525 getImm(MIR_BinaryAcc.getValue(inst))); 4526 4527 } else { 4528 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 4529 emitRCR_RegOff_Imm_Word( 4530 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4531 getImm(MIR_BinaryAcc.getValue(inst))); 4532 4533 } else { 4534 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 4535 emitRCR_RegIdx_Imm_Word( 4536 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4537 getImm(MIR_BinaryAcc.getValue(inst))); 4538 4539 } else { 4540 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4541 emitRCR_RegInd_Imm_Word( 4542 getBase(MIR_BinaryAcc.getResult(inst)), 4543 getImm(MIR_BinaryAcc.getValue(inst))); 4544 } 4545 } 4546 } 4547 } 4548 } 4549 4550 } else { 4551 if (isQuad(inst)) { 4552 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 4553 emitRCR_Reg_Imm_Quad( 4554 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 4555 getImm(MIR_BinaryAcc.getValue(inst))); 4556 4557 } else { 4558 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 4559 emitRCR_Abs_Imm_Quad( 4560 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 4561 getImm(MIR_BinaryAcc.getValue(inst))); 4562 4563 } else { 4564 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 4565 emitRCR_RegDisp_Imm_Quad( 4566 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4567 getImm(MIR_BinaryAcc.getValue(inst))); 4568 4569 } else { 4570 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 4571 emitRCR_RegOff_Imm_Quad( 4572 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4573 getImm(MIR_BinaryAcc.getValue(inst))); 4574 4575 } else { 4576 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 4577 emitRCR_RegIdx_Imm_Quad( 4578 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4579 getImm(MIR_BinaryAcc.getValue(inst))); 4580 4581 } else { 4582 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4583 emitRCR_RegInd_Imm_Quad( 4584 getBase(MIR_BinaryAcc.getResult(inst)), 4585 getImm(MIR_BinaryAcc.getValue(inst))); 4586 } 4587 } 4588 } 4589 } 4590 } 4591 4592 } else { 4593 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 4594 emitRCR_Reg_Imm( 4595 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 4596 getImm(MIR_BinaryAcc.getValue(inst))); 4597 4598 } else { 4599 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 4600 emitRCR_Abs_Imm( 4601 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 4602 getImm(MIR_BinaryAcc.getValue(inst))); 4603 4604 } else { 4605 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 4606 emitRCR_RegDisp_Imm( 4607 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4608 getImm(MIR_BinaryAcc.getValue(inst))); 4609 4610 } else { 4611 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 4612 emitRCR_RegOff_Imm( 4613 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4614 getImm(MIR_BinaryAcc.getValue(inst))); 4615 4616 } else { 4617 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 4618 emitRCR_RegIdx_Imm( 4619 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4620 getImm(MIR_BinaryAcc.getValue(inst))); 4621 4622 } else { 4623 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4624 emitRCR_RegInd_Imm( 4625 getBase(MIR_BinaryAcc.getResult(inst)), 4626 getImm(MIR_BinaryAcc.getValue(inst))); 4627 } 4628 } 4629 } 4630 } 4631 } 4632 } 4633 } 4634 } 4635 4636 } else { 4637 if (isByte(inst)) { 4638 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 4639 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4640 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 4641 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 4642 emitRCR_Reg_Reg_Byte( 4643 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 4644 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4645 4646 } else { 4647 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 4648 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4649 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 4650 emitRCR_Abs_Reg_Byte( 4651 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 4652 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4653 4654 } else { 4655 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 4656 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4657 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 4658 emitRCR_RegDisp_Reg_Byte( 4659 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4660 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4661 4662 } else { 4663 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 4664 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4665 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 4666 emitRCR_RegOff_Reg_Byte( 4667 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4668 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4669 4670 } else { 4671 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 4672 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4673 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 4674 emitRCR_RegIdx_Reg_Byte( 4675 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4676 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4677 4678 } else { 4679 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4680 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4681 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 4682 emitRCR_RegInd_Reg_Byte( 4683 getBase(MIR_BinaryAcc.getResult(inst)), 4684 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4685 } 4686 } 4687 } 4688 } 4689 } 4690 4691 } else { 4692 if (isWord(inst)) { 4693 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 4694 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4695 emitRCR_Reg_Reg_Word( 4696 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 4697 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4698 4699 } else { 4700 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 4701 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4702 emitRCR_Abs_Reg_Word( 4703 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 4704 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4705 4706 } else { 4707 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 4708 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4709 emitRCR_RegDisp_Reg_Word( 4710 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4711 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4712 4713 } else { 4714 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 4715 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4716 emitRCR_RegOff_Reg_Word( 4717 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4718 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4719 4720 } else { 4721 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 4722 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4723 emitRCR_RegIdx_Reg_Word( 4724 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4725 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4726 4727 } else { 4728 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4729 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4730 emitRCR_RegInd_Reg_Word( 4731 getBase(MIR_BinaryAcc.getResult(inst)), 4732 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4733 } 4734 } 4735 } 4736 } 4737 } 4738 4739 } else { 4740 if (isQuad(inst)) { 4741 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 4742 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4743 emitRCR_Reg_Reg_Quad( 4744 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 4745 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4746 4747 } else { 4748 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 4749 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4750 emitRCR_Abs_Reg_Quad( 4751 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 4752 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4753 4754 } else { 4755 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 4756 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4757 emitRCR_RegDisp_Reg_Quad( 4758 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4759 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4760 4761 } else { 4762 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 4763 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4764 emitRCR_RegOff_Reg_Quad( 4765 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4766 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4767 4768 } else { 4769 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 4770 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4771 emitRCR_RegIdx_Reg_Quad( 4772 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4773 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4774 4775 } else { 4776 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4777 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4778 emitRCR_RegInd_Reg_Quad( 4779 getBase(MIR_BinaryAcc.getResult(inst)), 4780 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4781 } 4782 } 4783 } 4784 } 4785 } 4786 4787 } else { 4788 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 4789 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4790 emitRCR_Reg_Reg( 4791 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 4792 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4793 4794 } else { 4795 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 4796 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4797 emitRCR_Abs_Reg( 4798 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 4799 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4800 4801 } else { 4802 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 4803 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4804 emitRCR_RegDisp_Reg( 4805 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4806 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4807 4808 } else { 4809 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 4810 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4811 emitRCR_RegOff_Reg( 4812 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4813 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4814 4815 } else { 4816 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 4817 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4818 emitRCR_RegIdx_Reg( 4819 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 4820 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4821 4822 } else { 4823 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4824 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4825 emitRCR_RegInd_Reg( 4826 getBase(MIR_BinaryAcc.getResult(inst)), 4827 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 4828 } 4829 } 4830 } 4831 } 4832 } 4833 } 4834 } 4835 } 4836 } 4837 } 4838 4839 /** 4840 * Emit the given instruction, assuming that 4841 * it is a MIR_Test instruction 4842 * and has a BTR operator 4843 * 4844 * @param inst the instruction to assemble 4845 */ 4846 private void doBTR(Instruction inst) { 4847 if (isQuad(inst)) { 4848 if (isImm(MIR_Test.getVal2(inst))) { 4849 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 4850 emitBTR_Reg_Imm_Quad( 4851 getGPR_Reg(MIR_Test.getVal1(inst)), 4852 getImm(MIR_Test.getVal2(inst))); 4853 4854 } else { 4855 if (isAbs(MIR_Test.getVal1(inst))) { 4856 emitBTR_Abs_Imm_Quad( 4857 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 4858 getImm(MIR_Test.getVal2(inst))); 4859 4860 } else { 4861 if (isRegDisp(MIR_Test.getVal1(inst))) { 4862 emitBTR_RegDisp_Imm_Quad( 4863 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4864 getImm(MIR_Test.getVal2(inst))); 4865 4866 } else { 4867 if (isRegOff(MIR_Test.getVal1(inst))) { 4868 emitBTR_RegOff_Imm_Quad( 4869 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4870 getImm(MIR_Test.getVal2(inst))); 4871 4872 } else { 4873 if (isRegIdx(MIR_Test.getVal1(inst))) { 4874 emitBTR_RegIdx_Imm_Quad( 4875 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4876 getImm(MIR_Test.getVal2(inst))); 4877 4878 } else { 4879 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4880 emitBTR_RegInd_Imm_Quad( 4881 getBase(MIR_Test.getVal1(inst)), 4882 getImm(MIR_Test.getVal2(inst))); 4883 } 4884 } 4885 } 4886 } 4887 } 4888 4889 } else { 4890 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 4891 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4892 emitBTR_Reg_Reg_Quad( 4893 getGPR_Reg(MIR_Test.getVal1(inst)), 4894 getGPR_Reg(MIR_Test.getVal2(inst))); 4895 4896 } else { 4897 if (isAbs(MIR_Test.getVal1(inst))) { 4898 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4899 emitBTR_Abs_Reg_Quad( 4900 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 4901 getGPR_Reg(MIR_Test.getVal2(inst))); 4902 4903 } else { 4904 if (isRegDisp(MIR_Test.getVal1(inst))) { 4905 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4906 emitBTR_RegDisp_Reg_Quad( 4907 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4908 getGPR_Reg(MIR_Test.getVal2(inst))); 4909 4910 } else { 4911 if (isRegOff(MIR_Test.getVal1(inst))) { 4912 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4913 emitBTR_RegOff_Reg_Quad( 4914 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4915 getGPR_Reg(MIR_Test.getVal2(inst))); 4916 4917 } else { 4918 if (isRegIdx(MIR_Test.getVal1(inst))) { 4919 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4920 emitBTR_RegIdx_Reg_Quad( 4921 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4922 getGPR_Reg(MIR_Test.getVal2(inst))); 4923 4924 } else { 4925 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4926 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4927 emitBTR_RegInd_Reg_Quad( 4928 getBase(MIR_Test.getVal1(inst)), 4929 getGPR_Reg(MIR_Test.getVal2(inst))); 4930 } 4931 } 4932 } 4933 } 4934 } 4935 } 4936 4937 } else { 4938 if (isImm(MIR_Test.getVal2(inst))) { 4939 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 4940 emitBTR_Reg_Imm( 4941 getGPR_Reg(MIR_Test.getVal1(inst)), 4942 getImm(MIR_Test.getVal2(inst))); 4943 4944 } else { 4945 if (isAbs(MIR_Test.getVal1(inst))) { 4946 emitBTR_Abs_Imm( 4947 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 4948 getImm(MIR_Test.getVal2(inst))); 4949 4950 } else { 4951 if (isRegDisp(MIR_Test.getVal1(inst))) { 4952 emitBTR_RegDisp_Imm( 4953 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4954 getImm(MIR_Test.getVal2(inst))); 4955 4956 } else { 4957 if (isRegOff(MIR_Test.getVal1(inst))) { 4958 emitBTR_RegOff_Imm( 4959 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4960 getImm(MIR_Test.getVal2(inst))); 4961 4962 } else { 4963 if (isRegIdx(MIR_Test.getVal1(inst))) { 4964 emitBTR_RegIdx_Imm( 4965 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4966 getImm(MIR_Test.getVal2(inst))); 4967 4968 } else { 4969 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4970 emitBTR_RegInd_Imm( 4971 getBase(MIR_Test.getVal1(inst)), 4972 getImm(MIR_Test.getVal2(inst))); 4973 } 4974 } 4975 } 4976 } 4977 } 4978 4979 } else { 4980 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 4981 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4982 emitBTR_Reg_Reg( 4983 getGPR_Reg(MIR_Test.getVal1(inst)), 4984 getGPR_Reg(MIR_Test.getVal2(inst))); 4985 4986 } else { 4987 if (isAbs(MIR_Test.getVal1(inst))) { 4988 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4989 emitBTR_Abs_Reg( 4990 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 4991 getGPR_Reg(MIR_Test.getVal2(inst))); 4992 4993 } else { 4994 if (isRegDisp(MIR_Test.getVal1(inst))) { 4995 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 4996 emitBTR_RegDisp_Reg( 4997 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 4998 getGPR_Reg(MIR_Test.getVal2(inst))); 4999 5000 } else { 5001 if (isRegOff(MIR_Test.getVal1(inst))) { 5002 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5003 emitBTR_RegOff_Reg( 5004 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5005 getGPR_Reg(MIR_Test.getVal2(inst))); 5006 5007 } else { 5008 if (isRegIdx(MIR_Test.getVal1(inst))) { 5009 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5010 emitBTR_RegIdx_Reg( 5011 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5012 getGPR_Reg(MIR_Test.getVal2(inst))); 5013 5014 } else { 5015 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5016 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5017 emitBTR_RegInd_Reg( 5018 getBase(MIR_Test.getVal1(inst)), 5019 getGPR_Reg(MIR_Test.getVal2(inst))); 5020 } 5021 } 5022 } 5023 } 5024 } 5025 } 5026 } 5027 } 5028 5029 /** 5030 * Emit the given instruction, assuming that 5031 * it is a MIR_Call instruction 5032 * and has a CALL operator 5033 * 5034 * @param inst the instruction to assemble 5035 */ 5036 private void doCALL(Instruction inst) { 5037 if (isImm(MIR_Call.getTarget(inst))) { 5038 emitCALL_Imm( 5039 getImm(MIR_Call.getTarget(inst))); 5040 5041 } else { 5042 if (isGPR_Reg(MIR_Call.getTarget(inst))) { 5043 emitCALL_Reg( 5044 getGPR_Reg(MIR_Call.getTarget(inst))); 5045 5046 } else { 5047 if (isAbs(MIR_Call.getTarget(inst))) { 5048 emitCALL_Abs( 5049 getDisp(MIR_Call.getTarget(inst)).toWord().toAddress()); 5050 5051 } else { 5052 if (isRegDisp(MIR_Call.getTarget(inst))) { 5053 emitCALL_RegDisp( 5054 getBase(MIR_Call.getTarget(inst)), getDisp(MIR_Call.getTarget(inst))); 5055 5056 } else { 5057 if (isRegOff(MIR_Call.getTarget(inst))) { 5058 emitCALL_RegOff( 5059 getIndex(MIR_Call.getTarget(inst)), getScale(MIR_Call.getTarget(inst)), getDisp(MIR_Call.getTarget(inst))); 5060 5061 } else { 5062 if (isRegIdx(MIR_Call.getTarget(inst))) { 5063 emitCALL_RegIdx( 5064 getBase(MIR_Call.getTarget(inst)), getIndex(MIR_Call.getTarget(inst)), getScale(MIR_Call.getTarget(inst)), getDisp(MIR_Call.getTarget(inst))); 5065 5066 } else { 5067 if (isRegInd(MIR_Call.getTarget(inst))) { 5068 emitCALL_RegInd( 5069 getBase(MIR_Call.getTarget(inst))); 5070 5071 } else { 5072 if (isLabel(MIR_Call.getTarget(inst))) { 5073 emitCALL_Label( 5074 getLabel(MIR_Call.getTarget(inst))); 5075 5076 } else { 5077 if (VM.VerifyAssertions && !isImmOrLabel(MIR_Call.getTarget(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5078 emitCALL_ImmOrLabel( 5079 getImm(MIR_Call.getTarget(inst)), getLabel(MIR_Call.getTarget(inst))); 5080 } 5081 } 5082 } 5083 } 5084 } 5085 } 5086 } 5087 } 5088 } 5089 5090 /** 5091 * Emit the given instruction, assuming that 5092 * it is a MIR_BinaryAcc instruction 5093 * and has a ANDPS operator 5094 * 5095 * @param inst the instruction to assemble 5096 */ 5097 private void doANDPS(Instruction inst) { 5098 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 5099 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5100 emitANDPS_Reg_Reg( 5101 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5102 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 5103 5104 } else { 5105 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 5106 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5107 emitANDPS_Reg_Abs( 5108 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5109 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 5110 5111 } else { 5112 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 5113 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5114 emitANDPS_Reg_RegDisp( 5115 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5116 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5117 5118 } else { 5119 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 5120 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5121 emitANDPS_Reg_RegOff( 5122 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5123 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5124 5125 } else { 5126 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 5127 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5128 emitANDPS_Reg_RegIdx( 5129 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5130 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5131 5132 } else { 5133 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5134 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5135 emitANDPS_Reg_RegInd( 5136 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5137 getBase(MIR_BinaryAcc.getValue(inst))); 5138 } 5139 } 5140 } 5141 } 5142 } 5143 } 5144 5145 /** 5146 * Emit the given instruction, assuming that 5147 * it is a MIR_Set instruction 5148 * and has a SET operator 5149 * 5150 * @param inst the instruction to assemble 5151 */ 5152 private void doSET(Instruction inst) { 5153 if (isGPR_Reg(MIR_Set.getResult(inst))) { 5154 if (VM.VerifyAssertions && !isCond(MIR_Set.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5155 if (VM.VerifyAssertions && !isByte(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5156 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Set.getResult(inst)).isValidAs8bitRegister()); 5157 emitSET_Cond_Reg_Byte( 5158 getCond(MIR_Set.getCond(inst)), 5159 getGPR_Reg(MIR_Set.getResult(inst))); 5160 5161 } else { 5162 if (isAbs(MIR_Set.getResult(inst))) { 5163 if (VM.VerifyAssertions && !isCond(MIR_Set.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5164 if (VM.VerifyAssertions && !isByte(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5165 emitSET_Cond_Abs_Byte( 5166 getCond(MIR_Set.getCond(inst)), 5167 getDisp(MIR_Set.getResult(inst)).toWord().toAddress()); 5168 5169 } else { 5170 if (isRegDisp(MIR_Set.getResult(inst))) { 5171 if (VM.VerifyAssertions && !isCond(MIR_Set.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5172 if (VM.VerifyAssertions && !isByte(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5173 emitSET_Cond_RegDisp_Byte( 5174 getCond(MIR_Set.getCond(inst)), 5175 getBase(MIR_Set.getResult(inst)), getDisp(MIR_Set.getResult(inst))); 5176 5177 } else { 5178 if (isRegOff(MIR_Set.getResult(inst))) { 5179 if (VM.VerifyAssertions && !isCond(MIR_Set.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5180 if (VM.VerifyAssertions && !isByte(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5181 emitSET_Cond_RegOff_Byte( 5182 getCond(MIR_Set.getCond(inst)), 5183 getIndex(MIR_Set.getResult(inst)), getScale(MIR_Set.getResult(inst)), getDisp(MIR_Set.getResult(inst))); 5184 5185 } else { 5186 if (isRegIdx(MIR_Set.getResult(inst))) { 5187 if (VM.VerifyAssertions && !isCond(MIR_Set.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5188 if (VM.VerifyAssertions && !isByte(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5189 emitSET_Cond_RegIdx_Byte( 5190 getCond(MIR_Set.getCond(inst)), 5191 getBase(MIR_Set.getResult(inst)), getIndex(MIR_Set.getResult(inst)), getScale(MIR_Set.getResult(inst)), getDisp(MIR_Set.getResult(inst))); 5192 5193 } else { 5194 if (VM.VerifyAssertions && !isCond(MIR_Set.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5195 if (VM.VerifyAssertions && !isRegInd(MIR_Set.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5196 if (VM.VerifyAssertions && !isByte(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5197 emitSET_Cond_RegInd_Byte( 5198 getCond(MIR_Set.getCond(inst)), 5199 getBase(MIR_Set.getResult(inst))); 5200 } 5201 } 5202 } 5203 } 5204 } 5205 } 5206 5207 /** 5208 * Emit the given instruction, assuming that 5209 * it is a MIR_Move instruction 5210 * and has a FIST operator 5211 * 5212 * @param inst the instruction to assemble 5213 */ 5214 private void doFIST(Instruction inst) { 5215 if (isWord(inst)) { 5216 if (isAbs(MIR_Move.getResult(inst))) { 5217 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5218 emitFIST_Abs_Reg_Word( 5219 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 5220 getFPR_Reg(MIR_Move.getValue(inst))); 5221 5222 } else { 5223 if (isRegDisp(MIR_Move.getResult(inst))) { 5224 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5225 emitFIST_RegDisp_Reg_Word( 5226 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 5227 getFPR_Reg(MIR_Move.getValue(inst))); 5228 5229 } else { 5230 if (isRegOff(MIR_Move.getResult(inst))) { 5231 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5232 emitFIST_RegOff_Reg_Word( 5233 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 5234 getFPR_Reg(MIR_Move.getValue(inst))); 5235 5236 } else { 5237 if (isRegIdx(MIR_Move.getResult(inst))) { 5238 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5239 emitFIST_RegIdx_Reg_Word( 5240 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 5241 getFPR_Reg(MIR_Move.getValue(inst))); 5242 5243 } else { 5244 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5245 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5246 emitFIST_RegInd_Reg_Word( 5247 getBase(MIR_Move.getResult(inst)), 5248 getFPR_Reg(MIR_Move.getValue(inst))); 5249 } 5250 } 5251 } 5252 } 5253 5254 } else { 5255 if (isAbs(MIR_Move.getResult(inst))) { 5256 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5257 emitFIST_Abs_Reg( 5258 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 5259 getFPR_Reg(MIR_Move.getValue(inst))); 5260 5261 } else { 5262 if (isRegDisp(MIR_Move.getResult(inst))) { 5263 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5264 emitFIST_RegDisp_Reg( 5265 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 5266 getFPR_Reg(MIR_Move.getValue(inst))); 5267 5268 } else { 5269 if (isRegOff(MIR_Move.getResult(inst))) { 5270 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5271 emitFIST_RegOff_Reg( 5272 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 5273 getFPR_Reg(MIR_Move.getValue(inst))); 5274 5275 } else { 5276 if (isRegIdx(MIR_Move.getResult(inst))) { 5277 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5278 emitFIST_RegIdx_Reg( 5279 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 5280 getFPR_Reg(MIR_Move.getValue(inst))); 5281 5282 } else { 5283 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5284 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5285 emitFIST_RegInd_Reg( 5286 getBase(MIR_Move.getResult(inst)), 5287 getFPR_Reg(MIR_Move.getValue(inst))); 5288 } 5289 } 5290 } 5291 } 5292 } 5293 } 5294 5295 /** 5296 * Emit the given instruction, assuming that 5297 * it is a MIR_Nullary instruction 5298 * and has a FFREE operator 5299 * 5300 * @param inst the instruction to assemble 5301 */ 5302 private void doFFREE(Instruction inst) { 5303 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5304 emitFFREE_Reg( 5305 getFPR_Reg(MIR_Nullary.getResult(inst))); 5306 } 5307 5308 /** 5309 * Emit the given instruction, assuming that 5310 * it is a MIR_Nullary instruction 5311 * and has a FLDPI operator 5312 * 5313 * @param inst the instruction to assemble 5314 */ 5315 private void doFLDPI(Instruction inst) { 5316 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5317 emitFLDPI_Reg( 5318 getFPR_Reg(MIR_Nullary.getResult(inst))); 5319 } 5320 5321 /** 5322 * Emit the given instruction, assuming that 5323 * it is a MIR_BinaryAcc instruction 5324 * and has a CMPORDSS operator 5325 * 5326 * @param inst the instruction to assemble 5327 */ 5328 private void doCMPORDSS(Instruction inst) { 5329 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 5330 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5331 emitCMPORDSS_Reg_Reg( 5332 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5333 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 5334 5335 } else { 5336 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 5337 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5338 emitCMPORDSS_Reg_Abs( 5339 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5340 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 5341 5342 } else { 5343 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 5344 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5345 emitCMPORDSS_Reg_RegDisp( 5346 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5347 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5348 5349 } else { 5350 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 5351 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5352 emitCMPORDSS_Reg_RegOff( 5353 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5354 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5355 5356 } else { 5357 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 5358 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5359 emitCMPORDSS_Reg_RegIdx( 5360 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5361 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5362 5363 } else { 5364 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5365 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5366 emitCMPORDSS_Reg_RegInd( 5367 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5368 getBase(MIR_BinaryAcc.getValue(inst))); 5369 } 5370 } 5371 } 5372 } 5373 } 5374 } 5375 5376 /** 5377 * Emit the given instruction, assuming that 5378 * it is a MIR_BinaryAcc instruction 5379 * and has a FDIV operator 5380 * 5381 * @param inst the instruction to assemble 5382 */ 5383 private void doFDIV(Instruction inst) { 5384 if (isQuad(inst)) { 5385 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 5386 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5387 emitFDIV_Reg_Abs_Quad( 5388 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5389 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 5390 5391 } else { 5392 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 5393 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5394 emitFDIV_Reg_RegDisp_Quad( 5395 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5396 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5397 5398 } else { 5399 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 5400 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5401 emitFDIV_Reg_RegOff_Quad( 5402 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5403 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5404 5405 } else { 5406 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 5407 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5408 emitFDIV_Reg_RegIdx_Quad( 5409 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5410 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5411 5412 } else { 5413 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5414 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5415 emitFDIV_Reg_RegInd_Quad( 5416 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5417 getBase(MIR_BinaryAcc.getValue(inst))); 5418 } 5419 } 5420 } 5421 } 5422 5423 } else { 5424 if (isFPR_Reg(MIR_BinaryAcc.getValue(inst))) { 5425 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5426 emitFDIV_Reg_Reg( 5427 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5428 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 5429 5430 } else { 5431 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 5432 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5433 emitFDIV_Reg_Abs( 5434 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5435 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 5436 5437 } else { 5438 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 5439 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5440 emitFDIV_Reg_RegDisp( 5441 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5442 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5443 5444 } else { 5445 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 5446 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5447 emitFDIV_Reg_RegOff( 5448 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5449 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5450 5451 } else { 5452 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 5453 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5454 emitFDIV_Reg_RegIdx( 5455 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5456 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5457 5458 } else { 5459 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5460 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5461 emitFDIV_Reg_RegInd( 5462 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 5463 getBase(MIR_BinaryAcc.getValue(inst))); 5464 } 5465 } 5466 } 5467 } 5468 } 5469 } 5470 } 5471 5472 /** 5473 * Emit the given instruction, assuming that 5474 * it is a MIR_BinaryAcc instruction 5475 * and has a CMPNESS operator 5476 * 5477 * @param inst the instruction to assemble 5478 */ 5479 private void doCMPNESS(Instruction inst) { 5480 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 5481 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5482 emitCMPNESS_Reg_Reg( 5483 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5484 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 5485 5486 } else { 5487 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 5488 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5489 emitCMPNESS_Reg_Abs( 5490 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5491 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 5492 5493 } else { 5494 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 5495 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5496 emitCMPNESS_Reg_RegDisp( 5497 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5498 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5499 5500 } else { 5501 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 5502 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5503 emitCMPNESS_Reg_RegOff( 5504 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5505 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5506 5507 } else { 5508 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 5509 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5510 emitCMPNESS_Reg_RegIdx( 5511 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5512 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 5513 5514 } else { 5515 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5516 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5517 emitCMPNESS_Reg_RegInd( 5518 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 5519 getBase(MIR_BinaryAcc.getValue(inst))); 5520 } 5521 } 5522 } 5523 } 5524 } 5525 } 5526 5527 /** 5528 * Emit the given instruction, assuming that 5529 * it is a MIR_Unary instruction 5530 * and has a SQRTSD operator 5531 * 5532 * @param inst the instruction to assemble 5533 */ 5534 private void doSQRTSD(Instruction inst) { 5535 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 5536 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5537 emitSQRTSD_Reg_Reg( 5538 getXMM_Reg(MIR_Unary.getResult(inst)), 5539 getXMM_Reg(MIR_Unary.getVal(inst))); 5540 5541 } else { 5542 if (isAbs(MIR_Unary.getVal(inst))) { 5543 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5544 emitSQRTSD_Reg_Abs( 5545 getXMM_Reg(MIR_Unary.getResult(inst)), 5546 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 5547 5548 } else { 5549 if (isRegDisp(MIR_Unary.getVal(inst))) { 5550 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5551 emitSQRTSD_Reg_RegDisp( 5552 getXMM_Reg(MIR_Unary.getResult(inst)), 5553 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5554 5555 } else { 5556 if (isRegOff(MIR_Unary.getVal(inst))) { 5557 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5558 emitSQRTSD_Reg_RegOff( 5559 getXMM_Reg(MIR_Unary.getResult(inst)), 5560 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5561 5562 } else { 5563 if (isRegIdx(MIR_Unary.getVal(inst))) { 5564 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5565 emitSQRTSD_Reg_RegIdx( 5566 getXMM_Reg(MIR_Unary.getResult(inst)), 5567 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5568 5569 } else { 5570 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5571 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5572 emitSQRTSD_Reg_RegInd( 5573 getXMM_Reg(MIR_Unary.getResult(inst)), 5574 getBase(MIR_Unary.getVal(inst))); 5575 } 5576 } 5577 } 5578 } 5579 } 5580 } 5581 5582 /** 5583 * Emit the given instruction, assuming that 5584 * it is a MIR_Empty instruction 5585 * and has a PAUSE operator 5586 * 5587 * @param inst the instruction to assemble 5588 */ 5589 private void doPAUSE(Instruction inst) { 5590 emitPAUSE(); 5591 } 5592 5593 /** 5594 * Emit the given instruction, assuming that 5595 * it is a MIR_Unary instruction 5596 * and has a MOVZX operator 5597 * 5598 * @param inst the instruction to assemble 5599 */ 5600 private void doMOVZX(Instruction inst) { 5601 if (isByte(inst)) { 5602 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 5603 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5604 emitMOVZX_Reg_Reg_Byte( 5605 getGPR_Reg(MIR_Unary.getResult(inst)), 5606 getGPR_Reg(MIR_Unary.getVal(inst))); 5607 5608 } else { 5609 if (isAbs(MIR_Unary.getVal(inst))) { 5610 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5611 emitMOVZX_Reg_Abs_Byte( 5612 getGPR_Reg(MIR_Unary.getResult(inst)), 5613 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 5614 5615 } else { 5616 if (isRegDisp(MIR_Unary.getVal(inst))) { 5617 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5618 emitMOVZX_Reg_RegDisp_Byte( 5619 getGPR_Reg(MIR_Unary.getResult(inst)), 5620 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5621 5622 } else { 5623 if (isRegOff(MIR_Unary.getVal(inst))) { 5624 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5625 emitMOVZX_Reg_RegOff_Byte( 5626 getGPR_Reg(MIR_Unary.getResult(inst)), 5627 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5628 5629 } else { 5630 if (isRegIdx(MIR_Unary.getVal(inst))) { 5631 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5632 emitMOVZX_Reg_RegIdx_Byte( 5633 getGPR_Reg(MIR_Unary.getResult(inst)), 5634 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5635 5636 } else { 5637 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5638 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5639 emitMOVZX_Reg_RegInd_Byte( 5640 getGPR_Reg(MIR_Unary.getResult(inst)), 5641 getBase(MIR_Unary.getVal(inst))); 5642 } 5643 } 5644 } 5645 } 5646 } 5647 5648 } else { 5649 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 5650 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5651 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5652 emitMOVZX_Reg_Reg_Word( 5653 getGPR_Reg(MIR_Unary.getResult(inst)), 5654 getGPR_Reg(MIR_Unary.getVal(inst))); 5655 5656 } else { 5657 if (isAbs(MIR_Unary.getVal(inst))) { 5658 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5659 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5660 emitMOVZX_Reg_Abs_Word( 5661 getGPR_Reg(MIR_Unary.getResult(inst)), 5662 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 5663 5664 } else { 5665 if (isRegDisp(MIR_Unary.getVal(inst))) { 5666 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5667 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5668 emitMOVZX_Reg_RegDisp_Word( 5669 getGPR_Reg(MIR_Unary.getResult(inst)), 5670 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5671 5672 } else { 5673 if (isRegOff(MIR_Unary.getVal(inst))) { 5674 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5675 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5676 emitMOVZX_Reg_RegOff_Word( 5677 getGPR_Reg(MIR_Unary.getResult(inst)), 5678 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5679 5680 } else { 5681 if (isRegIdx(MIR_Unary.getVal(inst))) { 5682 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5683 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5684 emitMOVZX_Reg_RegIdx_Word( 5685 getGPR_Reg(MIR_Unary.getResult(inst)), 5686 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5687 5688 } else { 5689 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5690 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5691 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5692 emitMOVZX_Reg_RegInd_Word( 5693 getGPR_Reg(MIR_Unary.getResult(inst)), 5694 getBase(MIR_Unary.getVal(inst))); 5695 } 5696 } 5697 } 5698 } 5699 } 5700 } 5701 } 5702 5703 /** 5704 * Emit the given instruction, assuming that 5705 * it is a MIR_Test instruction 5706 * and has a BT operator 5707 * 5708 * @param inst the instruction to assemble 5709 */ 5710 private void doBT(Instruction inst) { 5711 if (isQuad(inst)) { 5712 if (isImm(MIR_Test.getVal2(inst))) { 5713 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 5714 emitBT_Reg_Imm_Quad( 5715 getGPR_Reg(MIR_Test.getVal1(inst)), 5716 getImm(MIR_Test.getVal2(inst))); 5717 5718 } else { 5719 if (isAbs(MIR_Test.getVal1(inst))) { 5720 emitBT_Abs_Imm_Quad( 5721 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 5722 getImm(MIR_Test.getVal2(inst))); 5723 5724 } else { 5725 if (isRegDisp(MIR_Test.getVal1(inst))) { 5726 emitBT_RegDisp_Imm_Quad( 5727 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5728 getImm(MIR_Test.getVal2(inst))); 5729 5730 } else { 5731 if (isRegOff(MIR_Test.getVal1(inst))) { 5732 emitBT_RegOff_Imm_Quad( 5733 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5734 getImm(MIR_Test.getVal2(inst))); 5735 5736 } else { 5737 if (isRegIdx(MIR_Test.getVal1(inst))) { 5738 emitBT_RegIdx_Imm_Quad( 5739 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5740 getImm(MIR_Test.getVal2(inst))); 5741 5742 } else { 5743 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5744 emitBT_RegInd_Imm_Quad( 5745 getBase(MIR_Test.getVal1(inst)), 5746 getImm(MIR_Test.getVal2(inst))); 5747 } 5748 } 5749 } 5750 } 5751 } 5752 5753 } else { 5754 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 5755 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5756 emitBT_Reg_Reg_Quad( 5757 getGPR_Reg(MIR_Test.getVal1(inst)), 5758 getGPR_Reg(MIR_Test.getVal2(inst))); 5759 5760 } else { 5761 if (isAbs(MIR_Test.getVal1(inst))) { 5762 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5763 emitBT_Abs_Reg_Quad( 5764 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 5765 getGPR_Reg(MIR_Test.getVal2(inst))); 5766 5767 } else { 5768 if (isRegDisp(MIR_Test.getVal1(inst))) { 5769 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5770 emitBT_RegDisp_Reg_Quad( 5771 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5772 getGPR_Reg(MIR_Test.getVal2(inst))); 5773 5774 } else { 5775 if (isRegOff(MIR_Test.getVal1(inst))) { 5776 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5777 emitBT_RegOff_Reg_Quad( 5778 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5779 getGPR_Reg(MIR_Test.getVal2(inst))); 5780 5781 } else { 5782 if (isRegIdx(MIR_Test.getVal1(inst))) { 5783 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5784 emitBT_RegIdx_Reg_Quad( 5785 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5786 getGPR_Reg(MIR_Test.getVal2(inst))); 5787 5788 } else { 5789 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5790 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5791 emitBT_RegInd_Reg_Quad( 5792 getBase(MIR_Test.getVal1(inst)), 5793 getGPR_Reg(MIR_Test.getVal2(inst))); 5794 } 5795 } 5796 } 5797 } 5798 } 5799 } 5800 5801 } else { 5802 if (isImm(MIR_Test.getVal2(inst))) { 5803 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 5804 emitBT_Reg_Imm( 5805 getGPR_Reg(MIR_Test.getVal1(inst)), 5806 getImm(MIR_Test.getVal2(inst))); 5807 5808 } else { 5809 if (isAbs(MIR_Test.getVal1(inst))) { 5810 emitBT_Abs_Imm( 5811 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 5812 getImm(MIR_Test.getVal2(inst))); 5813 5814 } else { 5815 if (isRegDisp(MIR_Test.getVal1(inst))) { 5816 emitBT_RegDisp_Imm( 5817 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5818 getImm(MIR_Test.getVal2(inst))); 5819 5820 } else { 5821 if (isRegOff(MIR_Test.getVal1(inst))) { 5822 emitBT_RegOff_Imm( 5823 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5824 getImm(MIR_Test.getVal2(inst))); 5825 5826 } else { 5827 if (isRegIdx(MIR_Test.getVal1(inst))) { 5828 emitBT_RegIdx_Imm( 5829 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5830 getImm(MIR_Test.getVal2(inst))); 5831 5832 } else { 5833 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5834 emitBT_RegInd_Imm( 5835 getBase(MIR_Test.getVal1(inst)), 5836 getImm(MIR_Test.getVal2(inst))); 5837 } 5838 } 5839 } 5840 } 5841 } 5842 5843 } else { 5844 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 5845 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5846 emitBT_Reg_Reg( 5847 getGPR_Reg(MIR_Test.getVal1(inst)), 5848 getGPR_Reg(MIR_Test.getVal2(inst))); 5849 5850 } else { 5851 if (isAbs(MIR_Test.getVal1(inst))) { 5852 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5853 emitBT_Abs_Reg( 5854 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 5855 getGPR_Reg(MIR_Test.getVal2(inst))); 5856 5857 } else { 5858 if (isRegDisp(MIR_Test.getVal1(inst))) { 5859 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5860 emitBT_RegDisp_Reg( 5861 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5862 getGPR_Reg(MIR_Test.getVal2(inst))); 5863 5864 } else { 5865 if (isRegOff(MIR_Test.getVal1(inst))) { 5866 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5867 emitBT_RegOff_Reg( 5868 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5869 getGPR_Reg(MIR_Test.getVal2(inst))); 5870 5871 } else { 5872 if (isRegIdx(MIR_Test.getVal1(inst))) { 5873 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5874 emitBT_RegIdx_Reg( 5875 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 5876 getGPR_Reg(MIR_Test.getVal2(inst))); 5877 5878 } else { 5879 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5880 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5881 emitBT_RegInd_Reg( 5882 getBase(MIR_Test.getVal1(inst)), 5883 getGPR_Reg(MIR_Test.getVal2(inst))); 5884 } 5885 } 5886 } 5887 } 5888 } 5889 } 5890 } 5891 } 5892 5893 /** 5894 * Emit the given instruction, assuming that 5895 * it is a MIR_Unary instruction 5896 * and has a CVTSS2SI operator 5897 * 5898 * @param inst the instruction to assemble 5899 */ 5900 private void doCVTSS2SI(Instruction inst) { 5901 if (isQuad(inst)) { 5902 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 5903 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5904 emitCVTSS2SI_Reg_Reg_Quad( 5905 getGPR_Reg(MIR_Unary.getResult(inst)), 5906 getXMM_Reg(MIR_Unary.getVal(inst))); 5907 5908 } else { 5909 if (isAbs(MIR_Unary.getVal(inst))) { 5910 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5911 emitCVTSS2SI_Reg_Abs_Quad( 5912 getGPR_Reg(MIR_Unary.getResult(inst)), 5913 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 5914 5915 } else { 5916 if (isRegDisp(MIR_Unary.getVal(inst))) { 5917 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5918 emitCVTSS2SI_Reg_RegDisp_Quad( 5919 getGPR_Reg(MIR_Unary.getResult(inst)), 5920 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5921 5922 } else { 5923 if (isRegOff(MIR_Unary.getVal(inst))) { 5924 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5925 emitCVTSS2SI_Reg_RegOff_Quad( 5926 getGPR_Reg(MIR_Unary.getResult(inst)), 5927 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5928 5929 } else { 5930 if (isRegIdx(MIR_Unary.getVal(inst))) { 5931 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5932 emitCVTSS2SI_Reg_RegIdx_Quad( 5933 getGPR_Reg(MIR_Unary.getResult(inst)), 5934 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5935 5936 } else { 5937 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5938 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5939 emitCVTSS2SI_Reg_RegInd_Quad( 5940 getGPR_Reg(MIR_Unary.getResult(inst)), 5941 getBase(MIR_Unary.getVal(inst))); 5942 } 5943 } 5944 } 5945 } 5946 } 5947 5948 } else { 5949 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 5950 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5951 emitCVTSS2SI_Reg_Reg( 5952 getGPR_Reg(MIR_Unary.getResult(inst)), 5953 getXMM_Reg(MIR_Unary.getVal(inst))); 5954 5955 } else { 5956 if (isAbs(MIR_Unary.getVal(inst))) { 5957 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5958 emitCVTSS2SI_Reg_Abs( 5959 getGPR_Reg(MIR_Unary.getResult(inst)), 5960 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 5961 5962 } else { 5963 if (isRegDisp(MIR_Unary.getVal(inst))) { 5964 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5965 emitCVTSS2SI_Reg_RegDisp( 5966 getGPR_Reg(MIR_Unary.getResult(inst)), 5967 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5968 5969 } else { 5970 if (isRegOff(MIR_Unary.getVal(inst))) { 5971 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5972 emitCVTSS2SI_Reg_RegOff( 5973 getGPR_Reg(MIR_Unary.getResult(inst)), 5974 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5975 5976 } else { 5977 if (isRegIdx(MIR_Unary.getVal(inst))) { 5978 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5979 emitCVTSS2SI_Reg_RegIdx( 5980 getGPR_Reg(MIR_Unary.getResult(inst)), 5981 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 5982 5983 } else { 5984 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5985 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 5986 emitCVTSS2SI_Reg_RegInd( 5987 getGPR_Reg(MIR_Unary.getResult(inst)), 5988 getBase(MIR_Unary.getVal(inst))); 5989 } 5990 } 5991 } 5992 } 5993 } 5994 } 5995 } 5996 5997 /** 5998 * Emit the given instruction, assuming that 5999 * it is a MIR_BinaryAcc instruction 6000 * and has a CMPNLESD operator 6001 * 6002 * @param inst the instruction to assemble 6003 */ 6004 private void doCMPNLESD(Instruction inst) { 6005 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 6006 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6007 emitCMPNLESD_Reg_Reg( 6008 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6009 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 6010 6011 } else { 6012 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 6013 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6014 emitCMPNLESD_Reg_Abs( 6015 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6016 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 6017 6018 } else { 6019 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 6020 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6021 emitCMPNLESD_Reg_RegDisp( 6022 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6023 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6024 6025 } else { 6026 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 6027 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6028 emitCMPNLESD_Reg_RegOff( 6029 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6030 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6031 6032 } else { 6033 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 6034 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6035 emitCMPNLESD_Reg_RegIdx( 6036 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6037 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6038 6039 } else { 6040 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6041 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6042 emitCMPNLESD_Reg_RegInd( 6043 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6044 getBase(MIR_BinaryAcc.getValue(inst))); 6045 } 6046 } 6047 } 6048 } 6049 } 6050 } 6051 6052 /** 6053 * Emit the given instruction, assuming that 6054 * it is a MIR_BinaryAcc instruction 6055 * and has a ANDPD operator 6056 * 6057 * @param inst the instruction to assemble 6058 */ 6059 private void doANDPD(Instruction inst) { 6060 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 6061 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6062 emitANDPD_Reg_Reg( 6063 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6064 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 6065 6066 } else { 6067 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 6068 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6069 emitANDPD_Reg_Abs( 6070 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6071 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 6072 6073 } else { 6074 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 6075 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6076 emitANDPD_Reg_RegDisp( 6077 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6078 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6079 6080 } else { 6081 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 6082 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6083 emitANDPD_Reg_RegOff( 6084 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6085 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6086 6087 } else { 6088 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 6089 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6090 emitANDPD_Reg_RegIdx( 6091 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6092 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6093 6094 } else { 6095 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6096 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6097 emitANDPD_Reg_RegInd( 6098 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6099 getBase(MIR_BinaryAcc.getValue(inst))); 6100 } 6101 } 6102 } 6103 } 6104 } 6105 } 6106 6107 /** 6108 * Emit the given instruction, assuming that 6109 * it is a MIR_Unary instruction 6110 * and has a MOVSXDQ operator 6111 * 6112 * @param inst the instruction to assemble 6113 */ 6114 private void doMOVSXDQ(Instruction inst) { 6115 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 6116 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6117 emitMOVSXDQ_Reg_Reg( 6118 getGPR_Reg(MIR_Unary.getResult(inst)), 6119 getGPR_Reg(MIR_Unary.getVal(inst))); 6120 6121 } else { 6122 if (isAbs(MIR_Unary.getVal(inst))) { 6123 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6124 emitMOVSXDQ_Reg_Abs( 6125 getGPR_Reg(MIR_Unary.getResult(inst)), 6126 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 6127 6128 } else { 6129 if (isRegDisp(MIR_Unary.getVal(inst))) { 6130 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6131 emitMOVSXDQ_Reg_RegDisp( 6132 getGPR_Reg(MIR_Unary.getResult(inst)), 6133 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 6134 6135 } else { 6136 if (isRegOff(MIR_Unary.getVal(inst))) { 6137 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6138 emitMOVSXDQ_Reg_RegOff( 6139 getGPR_Reg(MIR_Unary.getResult(inst)), 6140 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 6141 6142 } else { 6143 if (isRegIdx(MIR_Unary.getVal(inst))) { 6144 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6145 emitMOVSXDQ_Reg_RegIdx( 6146 getGPR_Reg(MIR_Unary.getResult(inst)), 6147 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 6148 6149 } else { 6150 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6151 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6152 emitMOVSXDQ_Reg_RegInd( 6153 getGPR_Reg(MIR_Unary.getResult(inst)), 6154 getBase(MIR_Unary.getVal(inst))); 6155 } 6156 } 6157 } 6158 } 6159 } 6160 } 6161 6162 /** 6163 * Emit the given instruction, assuming that 6164 * it is a MIR_Unary instruction 6165 * and has a CVTSS2SD operator 6166 * 6167 * @param inst the instruction to assemble 6168 */ 6169 private void doCVTSS2SD(Instruction inst) { 6170 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 6171 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6172 emitCVTSS2SD_Reg_Reg( 6173 getXMM_Reg(MIR_Unary.getResult(inst)), 6174 getXMM_Reg(MIR_Unary.getVal(inst))); 6175 6176 } else { 6177 if (isAbs(MIR_Unary.getVal(inst))) { 6178 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6179 emitCVTSS2SD_Reg_Abs( 6180 getXMM_Reg(MIR_Unary.getResult(inst)), 6181 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 6182 6183 } else { 6184 if (isRegDisp(MIR_Unary.getVal(inst))) { 6185 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6186 emitCVTSS2SD_Reg_RegDisp( 6187 getXMM_Reg(MIR_Unary.getResult(inst)), 6188 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 6189 6190 } else { 6191 if (isRegOff(MIR_Unary.getVal(inst))) { 6192 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6193 emitCVTSS2SD_Reg_RegOff( 6194 getXMM_Reg(MIR_Unary.getResult(inst)), 6195 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 6196 6197 } else { 6198 if (isRegIdx(MIR_Unary.getVal(inst))) { 6199 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6200 emitCVTSS2SD_Reg_RegIdx( 6201 getXMM_Reg(MIR_Unary.getResult(inst)), 6202 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 6203 6204 } else { 6205 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6206 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6207 emitCVTSS2SD_Reg_RegInd( 6208 getXMM_Reg(MIR_Unary.getResult(inst)), 6209 getBase(MIR_Unary.getVal(inst))); 6210 } 6211 } 6212 } 6213 } 6214 } 6215 } 6216 6217 /** 6218 * Emit the given instruction, assuming that 6219 * it is a MIR_CaseLabel instruction 6220 * and has a OFFSET operator 6221 * 6222 * @param inst the instruction to assemble 6223 */ 6224 private void doOFFSET(Instruction inst) { 6225 if (VM.VerifyAssertions && !isImm(MIR_CaseLabel.getIndex(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6226 if (VM.VerifyAssertions && !isImmOrLabel(MIR_CaseLabel.getTarget(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6227 emitOFFSET_Imm_ImmOrLabel( 6228 getImm(MIR_CaseLabel.getIndex(inst)), 6229 getImm(MIR_CaseLabel.getTarget(inst)), getLabel(MIR_CaseLabel.getTarget(inst))); 6230 } 6231 6232 /** 6233 * Emit the given instruction, assuming that 6234 * it is a MIR_BinaryAcc instruction 6235 * and has a FADD operator 6236 * 6237 * @param inst the instruction to assemble 6238 */ 6239 private void doFADD(Instruction inst) { 6240 if (isQuad(inst)) { 6241 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 6242 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6243 emitFADD_Reg_Abs_Quad( 6244 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6245 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 6246 6247 } else { 6248 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 6249 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6250 emitFADD_Reg_RegDisp_Quad( 6251 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6252 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6253 6254 } else { 6255 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 6256 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6257 emitFADD_Reg_RegOff_Quad( 6258 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6259 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6260 6261 } else { 6262 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 6263 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6264 emitFADD_Reg_RegIdx_Quad( 6265 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6266 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6267 6268 } else { 6269 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6270 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6271 emitFADD_Reg_RegInd_Quad( 6272 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6273 getBase(MIR_BinaryAcc.getValue(inst))); 6274 } 6275 } 6276 } 6277 } 6278 6279 } else { 6280 if (isFPR_Reg(MIR_BinaryAcc.getValue(inst))) { 6281 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6282 emitFADD_Reg_Reg( 6283 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6284 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 6285 6286 } else { 6287 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 6288 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6289 emitFADD_Reg_Abs( 6290 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6291 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 6292 6293 } else { 6294 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 6295 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6296 emitFADD_Reg_RegDisp( 6297 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6298 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6299 6300 } else { 6301 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 6302 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6303 emitFADD_Reg_RegOff( 6304 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6305 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6306 6307 } else { 6308 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 6309 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6310 emitFADD_Reg_RegIdx( 6311 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6312 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6313 6314 } else { 6315 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6316 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6317 emitFADD_Reg_RegInd( 6318 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 6319 getBase(MIR_BinaryAcc.getValue(inst))); 6320 } 6321 } 6322 } 6323 } 6324 } 6325 } 6326 } 6327 6328 /** 6329 * Emit the given instruction, assuming that 6330 * it is a MIR_Move instruction 6331 * and has a FILD operator 6332 * 6333 * @param inst the instruction to assemble 6334 */ 6335 private void doFILD(Instruction inst) { 6336 if (isWord(inst)) { 6337 if (isAbs(MIR_Move.getValue(inst))) { 6338 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6339 emitFILD_Reg_Abs_Word( 6340 getFPR_Reg(MIR_Move.getResult(inst)), 6341 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 6342 6343 } else { 6344 if (isRegDisp(MIR_Move.getValue(inst))) { 6345 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6346 emitFILD_Reg_RegDisp_Word( 6347 getFPR_Reg(MIR_Move.getResult(inst)), 6348 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 6349 6350 } else { 6351 if (isRegOff(MIR_Move.getValue(inst))) { 6352 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6353 emitFILD_Reg_RegOff_Word( 6354 getFPR_Reg(MIR_Move.getResult(inst)), 6355 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 6356 6357 } else { 6358 if (isRegIdx(MIR_Move.getValue(inst))) { 6359 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6360 emitFILD_Reg_RegIdx_Word( 6361 getFPR_Reg(MIR_Move.getResult(inst)), 6362 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 6363 6364 } else { 6365 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6366 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6367 emitFILD_Reg_RegInd_Word( 6368 getFPR_Reg(MIR_Move.getResult(inst)), 6369 getBase(MIR_Move.getValue(inst))); 6370 } 6371 } 6372 } 6373 } 6374 6375 } else { 6376 if (isQuad(inst)) { 6377 if (isAbs(MIR_Move.getValue(inst))) { 6378 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6379 emitFILD_Reg_Abs_Quad( 6380 getFPR_Reg(MIR_Move.getResult(inst)), 6381 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 6382 6383 } else { 6384 if (isRegDisp(MIR_Move.getValue(inst))) { 6385 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6386 emitFILD_Reg_RegDisp_Quad( 6387 getFPR_Reg(MIR_Move.getResult(inst)), 6388 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 6389 6390 } else { 6391 if (isRegOff(MIR_Move.getValue(inst))) { 6392 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6393 emitFILD_Reg_RegOff_Quad( 6394 getFPR_Reg(MIR_Move.getResult(inst)), 6395 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 6396 6397 } else { 6398 if (isRegIdx(MIR_Move.getValue(inst))) { 6399 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6400 emitFILD_Reg_RegIdx_Quad( 6401 getFPR_Reg(MIR_Move.getResult(inst)), 6402 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 6403 6404 } else { 6405 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6406 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6407 emitFILD_Reg_RegInd_Quad( 6408 getFPR_Reg(MIR_Move.getResult(inst)), 6409 getBase(MIR_Move.getValue(inst))); 6410 } 6411 } 6412 } 6413 } 6414 6415 } else { 6416 if (isAbs(MIR_Move.getValue(inst))) { 6417 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6418 emitFILD_Reg_Abs( 6419 getFPR_Reg(MIR_Move.getResult(inst)), 6420 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 6421 6422 } else { 6423 if (isRegDisp(MIR_Move.getValue(inst))) { 6424 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6425 emitFILD_Reg_RegDisp( 6426 getFPR_Reg(MIR_Move.getResult(inst)), 6427 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 6428 6429 } else { 6430 if (isRegOff(MIR_Move.getValue(inst))) { 6431 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6432 emitFILD_Reg_RegOff( 6433 getFPR_Reg(MIR_Move.getResult(inst)), 6434 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 6435 6436 } else { 6437 if (isRegIdx(MIR_Move.getValue(inst))) { 6438 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6439 emitFILD_Reg_RegIdx( 6440 getFPR_Reg(MIR_Move.getResult(inst)), 6441 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 6442 6443 } else { 6444 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6445 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6446 emitFILD_Reg_RegInd( 6447 getFPR_Reg(MIR_Move.getResult(inst)), 6448 getBase(MIR_Move.getValue(inst))); 6449 } 6450 } 6451 } 6452 } 6453 } 6454 } 6455 } 6456 6457 /** 6458 * Emit the given instruction, assuming that 6459 * it is a MIR_BinaryAcc instruction 6460 * and has a CMPNESD operator 6461 * 6462 * @param inst the instruction to assemble 6463 */ 6464 private void doCMPNESD(Instruction inst) { 6465 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 6466 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6467 emitCMPNESD_Reg_Reg( 6468 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6469 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 6470 6471 } else { 6472 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 6473 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6474 emitCMPNESD_Reg_Abs( 6475 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6476 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 6477 6478 } else { 6479 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 6480 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6481 emitCMPNESD_Reg_RegDisp( 6482 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6483 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6484 6485 } else { 6486 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 6487 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6488 emitCMPNESD_Reg_RegOff( 6489 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6490 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6491 6492 } else { 6493 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 6494 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6495 emitCMPNESD_Reg_RegIdx( 6496 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6497 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6498 6499 } else { 6500 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6501 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6502 emitCMPNESD_Reg_RegInd( 6503 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6504 getBase(MIR_BinaryAcc.getValue(inst))); 6505 } 6506 } 6507 } 6508 } 6509 } 6510 } 6511 6512 /** 6513 * Emit the given instruction, assuming that 6514 * it is a MIR_Unary instruction 6515 * and has a CVTSI2SDQ operator 6516 * 6517 * @param inst the instruction to assemble 6518 */ 6519 private void doCVTSI2SDQ(Instruction inst) { 6520 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 6521 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6522 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6523 emitCVTSI2SDQ_Reg_Reg_Quad( 6524 getXMM_Reg(MIR_Unary.getResult(inst)), 6525 getGPR_Reg(MIR_Unary.getVal(inst))); 6526 6527 } else { 6528 if (isAbs(MIR_Unary.getVal(inst))) { 6529 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6530 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6531 emitCVTSI2SDQ_Reg_Abs_Quad( 6532 getXMM_Reg(MIR_Unary.getResult(inst)), 6533 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 6534 6535 } else { 6536 if (isRegDisp(MIR_Unary.getVal(inst))) { 6537 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6538 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6539 emitCVTSI2SDQ_Reg_RegDisp_Quad( 6540 getXMM_Reg(MIR_Unary.getResult(inst)), 6541 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 6542 6543 } else { 6544 if (isRegOff(MIR_Unary.getVal(inst))) { 6545 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6546 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6547 emitCVTSI2SDQ_Reg_RegOff_Quad( 6548 getXMM_Reg(MIR_Unary.getResult(inst)), 6549 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 6550 6551 } else { 6552 if (isRegIdx(MIR_Unary.getVal(inst))) { 6553 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6554 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6555 emitCVTSI2SDQ_Reg_RegIdx_Quad( 6556 getXMM_Reg(MIR_Unary.getResult(inst)), 6557 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 6558 6559 } else { 6560 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6561 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6562 if (VM.VerifyAssertions && !isQuad(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6563 emitCVTSI2SDQ_Reg_RegInd_Quad( 6564 getXMM_Reg(MIR_Unary.getResult(inst)), 6565 getBase(MIR_Unary.getVal(inst))); 6566 } 6567 } 6568 } 6569 } 6570 } 6571 } 6572 6573 /** 6574 * Emit the given instruction, assuming that 6575 * it is a MIR_BinaryAcc instruction 6576 * and has a CMPORDSD operator 6577 * 6578 * @param inst the instruction to assemble 6579 */ 6580 private void doCMPORDSD(Instruction inst) { 6581 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 6582 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6583 emitCMPORDSD_Reg_Reg( 6584 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6585 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 6586 6587 } else { 6588 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 6589 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6590 emitCMPORDSD_Reg_Abs( 6591 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6592 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 6593 6594 } else { 6595 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 6596 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6597 emitCMPORDSD_Reg_RegDisp( 6598 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6599 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6600 6601 } else { 6602 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 6603 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6604 emitCMPORDSD_Reg_RegOff( 6605 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6606 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6607 6608 } else { 6609 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 6610 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6611 emitCMPORDSD_Reg_RegIdx( 6612 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6613 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6614 6615 } else { 6616 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6617 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6618 emitCMPORDSD_Reg_RegInd( 6619 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6620 getBase(MIR_BinaryAcc.getValue(inst))); 6621 } 6622 } 6623 } 6624 } 6625 } 6626 } 6627 6628 /** 6629 * Emit the given instruction, assuming that 6630 * it is a MIR_BinaryAcc instruction 6631 * and has a MULSS operator 6632 * 6633 * @param inst the instruction to assemble 6634 */ 6635 private void doMULSS(Instruction inst) { 6636 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 6637 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6638 emitMULSS_Reg_Reg( 6639 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6640 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 6641 6642 } else { 6643 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 6644 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6645 emitMULSS_Reg_Abs( 6646 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6647 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 6648 6649 } else { 6650 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 6651 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6652 emitMULSS_Reg_RegDisp( 6653 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6654 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6655 6656 } else { 6657 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 6658 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6659 emitMULSS_Reg_RegOff( 6660 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6661 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6662 6663 } else { 6664 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 6665 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6666 emitMULSS_Reg_RegIdx( 6667 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6668 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6669 6670 } else { 6671 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6672 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6673 emitMULSS_Reg_RegInd( 6674 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6675 getBase(MIR_BinaryAcc.getValue(inst))); 6676 } 6677 } 6678 } 6679 } 6680 } 6681 } 6682 6683 /** 6684 * Emit the given instruction, assuming that 6685 * it is a MIR_BinaryAcc instruction 6686 * and has a PSLLQ operator 6687 * 6688 * @param inst the instruction to assemble 6689 */ 6690 private void doPSLLQ(Instruction inst) { 6691 if (isMM_Reg(MIR_BinaryAcc.getResult(inst))) { 6692 if (isMM_Reg(MIR_BinaryAcc.getValue(inst))) { 6693 emitPSLLQ_Reg_Reg( 6694 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 6695 getMM_Reg(MIR_BinaryAcc.getValue(inst))); 6696 6697 } else { 6698 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 6699 emitPSLLQ_Reg_Abs( 6700 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 6701 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 6702 6703 } else { 6704 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 6705 emitPSLLQ_Reg_RegDisp( 6706 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 6707 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6708 6709 } else { 6710 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 6711 emitPSLLQ_Reg_RegOff( 6712 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 6713 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6714 6715 } else { 6716 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 6717 emitPSLLQ_Reg_RegIdx( 6718 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 6719 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6720 6721 } else { 6722 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6723 emitPSLLQ_Reg_RegInd( 6724 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 6725 getBase(MIR_BinaryAcc.getValue(inst))); 6726 } 6727 } 6728 } 6729 } 6730 } 6731 6732 } else { 6733 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 6734 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6735 emitPSLLQ_Reg_Reg( 6736 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6737 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 6738 6739 } else { 6740 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 6741 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6742 emitPSLLQ_Reg_Abs( 6743 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6744 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 6745 6746 } else { 6747 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 6748 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6749 emitPSLLQ_Reg_RegDisp( 6750 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6751 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6752 6753 } else { 6754 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 6755 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6756 emitPSLLQ_Reg_RegOff( 6757 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6758 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6759 6760 } else { 6761 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 6762 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6763 emitPSLLQ_Reg_RegIdx( 6764 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6765 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 6766 6767 } else { 6768 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6769 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6770 emitPSLLQ_Reg_RegInd( 6771 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 6772 getBase(MIR_BinaryAcc.getValue(inst))); 6773 } 6774 } 6775 } 6776 } 6777 } 6778 } 6779 } 6780 6781 /** 6782 * Emit the given instruction, assuming that 6783 * it is a MIR_DoubleShift instruction 6784 * and has a SHRD operator 6785 * 6786 * @param inst the instruction to assemble 6787 */ 6788 private void doSHRD(Instruction inst) { 6789 if (isQuad(inst)) { 6790 if (isImm(MIR_DoubleShift.getBitsToShift(inst))) { 6791 if (isGPR_Reg(MIR_DoubleShift.getResult(inst))) { 6792 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6793 emitSHRD_Reg_Reg_Imm_Quad( 6794 getGPR_Reg(MIR_DoubleShift.getResult(inst)), 6795 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6796 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6797 6798 } else { 6799 if (isAbs(MIR_DoubleShift.getResult(inst))) { 6800 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6801 emitSHRD_Abs_Reg_Imm_Quad( 6802 getDisp(MIR_DoubleShift.getResult(inst)).toWord().toAddress(), 6803 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6804 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6805 6806 } else { 6807 if (isRegDisp(MIR_DoubleShift.getResult(inst))) { 6808 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6809 emitSHRD_RegDisp_Reg_Imm_Quad( 6810 getBase(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6811 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6812 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6813 6814 } else { 6815 if (isRegOff(MIR_DoubleShift.getResult(inst))) { 6816 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6817 emitSHRD_RegOff_Reg_Imm_Quad( 6818 getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6819 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6820 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6821 6822 } else { 6823 if (isRegIdx(MIR_DoubleShift.getResult(inst))) { 6824 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6825 emitSHRD_RegIdx_Reg_Imm_Quad( 6826 getBase(MIR_DoubleShift.getResult(inst)), getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6827 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6828 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6829 6830 } else { 6831 if (VM.VerifyAssertions && !isRegInd(MIR_DoubleShift.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6832 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6833 emitSHRD_RegInd_Reg_Imm_Quad( 6834 getBase(MIR_DoubleShift.getResult(inst)), 6835 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6836 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6837 } 6838 } 6839 } 6840 } 6841 } 6842 6843 } else { 6844 if (isGPR_Reg(MIR_DoubleShift.getResult(inst))) { 6845 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6846 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6847 emitSHRD_Reg_Reg_Reg_Quad( 6848 getGPR_Reg(MIR_DoubleShift.getResult(inst)), 6849 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6850 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6851 6852 } else { 6853 if (isAbs(MIR_DoubleShift.getResult(inst))) { 6854 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6855 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6856 emitSHRD_Abs_Reg_Reg_Quad( 6857 getDisp(MIR_DoubleShift.getResult(inst)).toWord().toAddress(), 6858 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6859 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6860 6861 } else { 6862 if (isRegDisp(MIR_DoubleShift.getResult(inst))) { 6863 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6864 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6865 emitSHRD_RegDisp_Reg_Reg_Quad( 6866 getBase(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6867 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6868 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6869 6870 } else { 6871 if (isRegOff(MIR_DoubleShift.getResult(inst))) { 6872 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6873 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6874 emitSHRD_RegOff_Reg_Reg_Quad( 6875 getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6876 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6877 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6878 6879 } else { 6880 if (isRegIdx(MIR_DoubleShift.getResult(inst))) { 6881 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6882 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6883 emitSHRD_RegIdx_Reg_Reg_Quad( 6884 getBase(MIR_DoubleShift.getResult(inst)), getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6885 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6886 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6887 6888 } else { 6889 if (VM.VerifyAssertions && !isRegInd(MIR_DoubleShift.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6890 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6891 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6892 emitSHRD_RegInd_Reg_Reg_Quad( 6893 getBase(MIR_DoubleShift.getResult(inst)), 6894 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6895 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6896 } 6897 } 6898 } 6899 } 6900 } 6901 } 6902 6903 } else { 6904 if (isImm(MIR_DoubleShift.getBitsToShift(inst))) { 6905 if (isGPR_Reg(MIR_DoubleShift.getResult(inst))) { 6906 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6907 emitSHRD_Reg_Reg_Imm( 6908 getGPR_Reg(MIR_DoubleShift.getResult(inst)), 6909 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6910 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6911 6912 } else { 6913 if (isAbs(MIR_DoubleShift.getResult(inst))) { 6914 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6915 emitSHRD_Abs_Reg_Imm( 6916 getDisp(MIR_DoubleShift.getResult(inst)).toWord().toAddress(), 6917 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6918 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6919 6920 } else { 6921 if (isRegDisp(MIR_DoubleShift.getResult(inst))) { 6922 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6923 emitSHRD_RegDisp_Reg_Imm( 6924 getBase(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6925 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6926 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6927 6928 } else { 6929 if (isRegOff(MIR_DoubleShift.getResult(inst))) { 6930 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6931 emitSHRD_RegOff_Reg_Imm( 6932 getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6933 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6934 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6935 6936 } else { 6937 if (isRegIdx(MIR_DoubleShift.getResult(inst))) { 6938 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6939 emitSHRD_RegIdx_Reg_Imm( 6940 getBase(MIR_DoubleShift.getResult(inst)), getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6941 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6942 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6943 6944 } else { 6945 if (VM.VerifyAssertions && !isRegInd(MIR_DoubleShift.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6946 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6947 emitSHRD_RegInd_Reg_Imm( 6948 getBase(MIR_DoubleShift.getResult(inst)), 6949 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6950 getImm(MIR_DoubleShift.getBitsToShift(inst))); 6951 } 6952 } 6953 } 6954 } 6955 } 6956 6957 } else { 6958 if (isGPR_Reg(MIR_DoubleShift.getResult(inst))) { 6959 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6960 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6961 emitSHRD_Reg_Reg_Reg( 6962 getGPR_Reg(MIR_DoubleShift.getResult(inst)), 6963 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6964 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6965 6966 } else { 6967 if (isAbs(MIR_DoubleShift.getResult(inst))) { 6968 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6969 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6970 emitSHRD_Abs_Reg_Reg( 6971 getDisp(MIR_DoubleShift.getResult(inst)).toWord().toAddress(), 6972 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6973 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6974 6975 } else { 6976 if (isRegDisp(MIR_DoubleShift.getResult(inst))) { 6977 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6978 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6979 emitSHRD_RegDisp_Reg_Reg( 6980 getBase(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6981 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6982 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6983 6984 } else { 6985 if (isRegOff(MIR_DoubleShift.getResult(inst))) { 6986 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6987 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6988 emitSHRD_RegOff_Reg_Reg( 6989 getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6990 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 6991 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 6992 6993 } else { 6994 if (isRegIdx(MIR_DoubleShift.getResult(inst))) { 6995 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6996 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 6997 emitSHRD_RegIdx_Reg_Reg( 6998 getBase(MIR_DoubleShift.getResult(inst)), getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 6999 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 7000 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 7001 7002 } else { 7003 if (VM.VerifyAssertions && !isRegInd(MIR_DoubleShift.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7004 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7005 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7006 emitSHRD_RegInd_Reg_Reg( 7007 getBase(MIR_DoubleShift.getResult(inst)), 7008 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 7009 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 7010 } 7011 } 7012 } 7013 } 7014 } 7015 } 7016 } 7017 } 7018 7019 /** 7020 * Emit the given instruction, assuming that 7021 * it is a MIR_BinaryAcc instruction 7022 * and has a DIVSD operator 7023 * 7024 * @param inst the instruction to assemble 7025 */ 7026 private void doDIVSD(Instruction inst) { 7027 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 7028 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7029 emitDIVSD_Reg_Reg( 7030 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7031 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 7032 7033 } else { 7034 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 7035 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7036 emitDIVSD_Reg_Abs( 7037 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7038 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 7039 7040 } else { 7041 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 7042 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7043 emitDIVSD_Reg_RegDisp( 7044 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7045 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7046 7047 } else { 7048 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 7049 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7050 emitDIVSD_Reg_RegOff( 7051 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7052 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7053 7054 } else { 7055 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 7056 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7057 emitDIVSD_Reg_RegIdx( 7058 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7059 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7060 7061 } else { 7062 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7063 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7064 emitDIVSD_Reg_RegInd( 7065 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7066 getBase(MIR_BinaryAcc.getValue(inst))); 7067 } 7068 } 7069 } 7070 } 7071 } 7072 } 7073 7074 /** 7075 * Emit the given instruction, assuming that 7076 * it is a MIR_Nullary instruction 7077 * and has a FLDL2E operator 7078 * 7079 * @param inst the instruction to assemble 7080 */ 7081 private void doFLDL2E(Instruction inst) { 7082 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7083 emitFLDL2E_Reg( 7084 getFPR_Reg(MIR_Nullary.getResult(inst))); 7085 } 7086 7087 /** 7088 * Emit the given instruction, assuming that 7089 * it is a MIR_CompareExchange instruction 7090 * and has a CMPXCHG operator 7091 * 7092 * @param inst the instruction to assemble 7093 */ 7094 private void doCMPXCHG(Instruction inst) { 7095 if (isQuad(inst)) { 7096 if (isGPR_Reg(MIR_CompareExchange.getMemAddr(inst))) { 7097 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7098 emitCMPXCHG_Reg_Reg_Quad( 7099 getGPR_Reg(MIR_CompareExchange.getMemAddr(inst)), 7100 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7101 7102 } else { 7103 if (isAbs(MIR_CompareExchange.getMemAddr(inst))) { 7104 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7105 emitCMPXCHG_Abs_Reg_Quad( 7106 getDisp(MIR_CompareExchange.getMemAddr(inst)).toWord().toAddress(), 7107 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7108 7109 } else { 7110 if (isRegDisp(MIR_CompareExchange.getMemAddr(inst))) { 7111 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7112 emitCMPXCHG_RegDisp_Reg_Quad( 7113 getBase(MIR_CompareExchange.getMemAddr(inst)), getDisp(MIR_CompareExchange.getMemAddr(inst)), 7114 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7115 7116 } else { 7117 if (isRegOff(MIR_CompareExchange.getMemAddr(inst))) { 7118 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7119 emitCMPXCHG_RegOff_Reg_Quad( 7120 getIndex(MIR_CompareExchange.getMemAddr(inst)), getScale(MIR_CompareExchange.getMemAddr(inst)), getDisp(MIR_CompareExchange.getMemAddr(inst)), 7121 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7122 7123 } else { 7124 if (isRegIdx(MIR_CompareExchange.getMemAddr(inst))) { 7125 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7126 emitCMPXCHG_RegIdx_Reg_Quad( 7127 getBase(MIR_CompareExchange.getMemAddr(inst)), getIndex(MIR_CompareExchange.getMemAddr(inst)), getScale(MIR_CompareExchange.getMemAddr(inst)), getDisp(MIR_CompareExchange.getMemAddr(inst)), 7128 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7129 7130 } else { 7131 if (VM.VerifyAssertions && !isRegInd(MIR_CompareExchange.getMemAddr(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7132 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7133 emitCMPXCHG_RegInd_Reg_Quad( 7134 getBase(MIR_CompareExchange.getMemAddr(inst)), 7135 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7136 } 7137 } 7138 } 7139 } 7140 } 7141 7142 } else { 7143 if (isGPR_Reg(MIR_CompareExchange.getMemAddr(inst))) { 7144 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7145 emitCMPXCHG_Reg_Reg( 7146 getGPR_Reg(MIR_CompareExchange.getMemAddr(inst)), 7147 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7148 7149 } else { 7150 if (isAbs(MIR_CompareExchange.getMemAddr(inst))) { 7151 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7152 emitCMPXCHG_Abs_Reg( 7153 getDisp(MIR_CompareExchange.getMemAddr(inst)).toWord().toAddress(), 7154 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7155 7156 } else { 7157 if (isRegDisp(MIR_CompareExchange.getMemAddr(inst))) { 7158 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7159 emitCMPXCHG_RegDisp_Reg( 7160 getBase(MIR_CompareExchange.getMemAddr(inst)), getDisp(MIR_CompareExchange.getMemAddr(inst)), 7161 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7162 7163 } else { 7164 if (isRegOff(MIR_CompareExchange.getMemAddr(inst))) { 7165 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7166 emitCMPXCHG_RegOff_Reg( 7167 getIndex(MIR_CompareExchange.getMemAddr(inst)), getScale(MIR_CompareExchange.getMemAddr(inst)), getDisp(MIR_CompareExchange.getMemAddr(inst)), 7168 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7169 7170 } else { 7171 if (isRegIdx(MIR_CompareExchange.getMemAddr(inst))) { 7172 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7173 emitCMPXCHG_RegIdx_Reg( 7174 getBase(MIR_CompareExchange.getMemAddr(inst)), getIndex(MIR_CompareExchange.getMemAddr(inst)), getScale(MIR_CompareExchange.getMemAddr(inst)), getDisp(MIR_CompareExchange.getMemAddr(inst)), 7175 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7176 7177 } else { 7178 if (VM.VerifyAssertions && !isRegInd(MIR_CompareExchange.getMemAddr(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7179 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CompareExchange.getNewValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7180 emitCMPXCHG_RegInd_Reg( 7181 getBase(MIR_CompareExchange.getMemAddr(inst)), 7182 getGPR_Reg(MIR_CompareExchange.getNewValue(inst))); 7183 } 7184 } 7185 } 7186 } 7187 } 7188 } 7189 } 7190 7191 /** 7192 * Emit the given instruction, assuming that 7193 * it is a MIR_Move instruction 7194 * and has a MOVAPD operator 7195 * 7196 * @param inst the instruction to assemble 7197 */ 7198 private void doMOVAPD(Instruction inst) { 7199 if (isXMM_Reg(MIR_Move.getResult(inst))) { 7200 if (isXMM_Reg(MIR_Move.getValue(inst))) { 7201 emitMOVAPD_Reg_Reg( 7202 getXMM_Reg(MIR_Move.getResult(inst)), 7203 getXMM_Reg(MIR_Move.getValue(inst))); 7204 7205 } else { 7206 if (isAbs(MIR_Move.getValue(inst))) { 7207 emitMOVAPD_Reg_Abs( 7208 getXMM_Reg(MIR_Move.getResult(inst)), 7209 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 7210 7211 } else { 7212 if (isRegDisp(MIR_Move.getValue(inst))) { 7213 emitMOVAPD_Reg_RegDisp( 7214 getXMM_Reg(MIR_Move.getResult(inst)), 7215 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 7216 7217 } else { 7218 if (isRegOff(MIR_Move.getValue(inst))) { 7219 emitMOVAPD_Reg_RegOff( 7220 getXMM_Reg(MIR_Move.getResult(inst)), 7221 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 7222 7223 } else { 7224 if (isRegIdx(MIR_Move.getValue(inst))) { 7225 emitMOVAPD_Reg_RegIdx( 7226 getXMM_Reg(MIR_Move.getResult(inst)), 7227 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 7228 7229 } else { 7230 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7231 emitMOVAPD_Reg_RegInd( 7232 getXMM_Reg(MIR_Move.getResult(inst)), 7233 getBase(MIR_Move.getValue(inst))); 7234 } 7235 } 7236 } 7237 } 7238 } 7239 7240 } else { 7241 if (isAbs(MIR_Move.getResult(inst))) { 7242 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7243 emitMOVAPD_Abs_Reg( 7244 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 7245 getXMM_Reg(MIR_Move.getValue(inst))); 7246 7247 } else { 7248 if (isRegDisp(MIR_Move.getResult(inst))) { 7249 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7250 emitMOVAPD_RegDisp_Reg( 7251 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 7252 getXMM_Reg(MIR_Move.getValue(inst))); 7253 7254 } else { 7255 if (isRegOff(MIR_Move.getResult(inst))) { 7256 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7257 emitMOVAPD_RegOff_Reg( 7258 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 7259 getXMM_Reg(MIR_Move.getValue(inst))); 7260 7261 } else { 7262 if (isRegIdx(MIR_Move.getResult(inst))) { 7263 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7264 emitMOVAPD_RegIdx_Reg( 7265 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 7266 getXMM_Reg(MIR_Move.getValue(inst))); 7267 7268 } else { 7269 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7270 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7271 emitMOVAPD_RegInd_Reg( 7272 getBase(MIR_Move.getResult(inst)), 7273 getXMM_Reg(MIR_Move.getValue(inst))); 7274 } 7275 } 7276 } 7277 } 7278 } 7279 } 7280 7281 /** 7282 * Emit the given instruction, assuming that 7283 * it is a MIR_BinaryAcc instruction 7284 * and has a FPREM operator 7285 * 7286 * @param inst the instruction to assemble 7287 */ 7288 private void doFPREM(Instruction inst) { 7289 emitFPREM(); 7290 } 7291 7292 /** 7293 * Emit the given instruction, assuming that 7294 * it is a MIR_Divide instruction 7295 * and has a DIV operator 7296 * 7297 * @param inst the instruction to assemble 7298 */ 7299 private void doDIV(Instruction inst) { 7300 if (isQuad(inst)) { 7301 if (isGPR_Reg(MIR_Divide.getValue(inst))) { 7302 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7303 emitDIV_Reg_Reg_Quad( 7304 getGPR_Reg(MIR_Divide.getResult2(inst)), 7305 getGPR_Reg(MIR_Divide.getValue(inst))); 7306 7307 } else { 7308 if (isAbs(MIR_Divide.getValue(inst))) { 7309 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7310 emitDIV_Reg_Abs_Quad( 7311 getGPR_Reg(MIR_Divide.getResult2(inst)), 7312 getDisp(MIR_Divide.getValue(inst)).toWord().toAddress()); 7313 7314 } else { 7315 if (isRegDisp(MIR_Divide.getValue(inst))) { 7316 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7317 emitDIV_Reg_RegDisp_Quad( 7318 getGPR_Reg(MIR_Divide.getResult2(inst)), 7319 getBase(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 7320 7321 } else { 7322 if (isRegOff(MIR_Divide.getValue(inst))) { 7323 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7324 emitDIV_Reg_RegOff_Quad( 7325 getGPR_Reg(MIR_Divide.getResult2(inst)), 7326 getIndex(MIR_Divide.getValue(inst)), getScale(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 7327 7328 } else { 7329 if (isRegIdx(MIR_Divide.getValue(inst))) { 7330 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7331 emitDIV_Reg_RegIdx_Quad( 7332 getGPR_Reg(MIR_Divide.getResult2(inst)), 7333 getBase(MIR_Divide.getValue(inst)), getIndex(MIR_Divide.getValue(inst)), getScale(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 7334 7335 } else { 7336 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7337 if (VM.VerifyAssertions && !isRegInd(MIR_Divide.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7338 emitDIV_Reg_RegInd_Quad( 7339 getGPR_Reg(MIR_Divide.getResult2(inst)), 7340 getBase(MIR_Divide.getValue(inst))); 7341 } 7342 } 7343 } 7344 } 7345 } 7346 7347 } else { 7348 if (isGPR_Reg(MIR_Divide.getValue(inst))) { 7349 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7350 emitDIV_Reg_Reg( 7351 getGPR_Reg(MIR_Divide.getResult2(inst)), 7352 getGPR_Reg(MIR_Divide.getValue(inst))); 7353 7354 } else { 7355 if (isAbs(MIR_Divide.getValue(inst))) { 7356 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7357 emitDIV_Reg_Abs( 7358 getGPR_Reg(MIR_Divide.getResult2(inst)), 7359 getDisp(MIR_Divide.getValue(inst)).toWord().toAddress()); 7360 7361 } else { 7362 if (isRegDisp(MIR_Divide.getValue(inst))) { 7363 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7364 emitDIV_Reg_RegDisp( 7365 getGPR_Reg(MIR_Divide.getResult2(inst)), 7366 getBase(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 7367 7368 } else { 7369 if (isRegOff(MIR_Divide.getValue(inst))) { 7370 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7371 emitDIV_Reg_RegOff( 7372 getGPR_Reg(MIR_Divide.getResult2(inst)), 7373 getIndex(MIR_Divide.getValue(inst)), getScale(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 7374 7375 } else { 7376 if (isRegIdx(MIR_Divide.getValue(inst))) { 7377 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7378 emitDIV_Reg_RegIdx( 7379 getGPR_Reg(MIR_Divide.getResult2(inst)), 7380 getBase(MIR_Divide.getValue(inst)), getIndex(MIR_Divide.getValue(inst)), getScale(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 7381 7382 } else { 7383 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7384 if (VM.VerifyAssertions && !isRegInd(MIR_Divide.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7385 emitDIV_Reg_RegInd( 7386 getGPR_Reg(MIR_Divide.getResult2(inst)), 7387 getBase(MIR_Divide.getValue(inst))); 7388 } 7389 } 7390 } 7391 } 7392 } 7393 } 7394 } 7395 7396 /** 7397 * Emit the given instruction, assuming that 7398 * it is a MIR_UnaryAcc instruction 7399 * and has a NEG operator 7400 * 7401 * @param inst the instruction to assemble 7402 */ 7403 private void doNEG(Instruction inst) { 7404 if (isByte(inst)) { 7405 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 7406 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_UnaryAcc.getResult(inst)).isValidAs8bitRegister()); 7407 emitNEG_Reg_Byte( 7408 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 7409 7410 } else { 7411 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 7412 emitNEG_Abs_Byte( 7413 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 7414 7415 } else { 7416 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 7417 emitNEG_RegDisp_Byte( 7418 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7419 7420 } else { 7421 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 7422 emitNEG_RegOff_Byte( 7423 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7424 7425 } else { 7426 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 7427 emitNEG_RegIdx_Byte( 7428 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7429 7430 } else { 7431 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7432 emitNEG_RegInd_Byte( 7433 getBase(MIR_UnaryAcc.getResult(inst))); 7434 } 7435 } 7436 } 7437 } 7438 } 7439 7440 } else { 7441 if (isWord(inst)) { 7442 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 7443 emitNEG_Reg_Word( 7444 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 7445 7446 } else { 7447 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 7448 emitNEG_Abs_Word( 7449 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 7450 7451 } else { 7452 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 7453 emitNEG_RegDisp_Word( 7454 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7455 7456 } else { 7457 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 7458 emitNEG_RegOff_Word( 7459 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7460 7461 } else { 7462 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 7463 emitNEG_RegIdx_Word( 7464 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7465 7466 } else { 7467 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7468 emitNEG_RegInd_Word( 7469 getBase(MIR_UnaryAcc.getResult(inst))); 7470 } 7471 } 7472 } 7473 } 7474 } 7475 7476 } else { 7477 if (isQuad(inst)) { 7478 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 7479 emitNEG_Reg_Quad( 7480 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 7481 7482 } else { 7483 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 7484 emitNEG_Abs_Quad( 7485 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 7486 7487 } else { 7488 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 7489 emitNEG_RegDisp_Quad( 7490 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7491 7492 } else { 7493 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 7494 emitNEG_RegOff_Quad( 7495 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7496 7497 } else { 7498 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 7499 emitNEG_RegIdx_Quad( 7500 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7501 7502 } else { 7503 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7504 emitNEG_RegInd_Quad( 7505 getBase(MIR_UnaryAcc.getResult(inst))); 7506 } 7507 } 7508 } 7509 } 7510 } 7511 7512 } else { 7513 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 7514 emitNEG_Reg( 7515 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 7516 7517 } else { 7518 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 7519 emitNEG_Abs( 7520 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 7521 7522 } else { 7523 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 7524 emitNEG_RegDisp( 7525 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7526 7527 } else { 7528 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 7529 emitNEG_RegOff( 7530 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7531 7532 } else { 7533 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 7534 emitNEG_RegIdx( 7535 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 7536 7537 } else { 7538 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7539 emitNEG_RegInd( 7540 getBase(MIR_UnaryAcc.getResult(inst))); 7541 } 7542 } 7543 } 7544 } 7545 } 7546 } 7547 } 7548 } 7549 } 7550 7551 /** 7552 * Emit the given instruction, assuming that 7553 * it is a MIR_BinaryAcc instruction 7554 * and has a DIVSS operator 7555 * 7556 * @param inst the instruction to assemble 7557 */ 7558 private void doDIVSS(Instruction inst) { 7559 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 7560 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7561 emitDIVSS_Reg_Reg( 7562 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7563 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 7564 7565 } else { 7566 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 7567 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7568 emitDIVSS_Reg_Abs( 7569 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7570 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 7571 7572 } else { 7573 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 7574 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7575 emitDIVSS_Reg_RegDisp( 7576 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7577 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7578 7579 } else { 7580 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 7581 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7582 emitDIVSS_Reg_RegOff( 7583 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7584 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7585 7586 } else { 7587 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 7588 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7589 emitDIVSS_Reg_RegIdx( 7590 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7591 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7592 7593 } else { 7594 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7595 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7596 emitDIVSS_Reg_RegInd( 7597 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 7598 getBase(MIR_BinaryAcc.getValue(inst))); 7599 } 7600 } 7601 } 7602 } 7603 } 7604 } 7605 7606 /** 7607 * Emit the given instruction, assuming that 7608 * it is a MIR_Nullary instruction 7609 * and has a FLDL2T operator 7610 * 7611 * @param inst the instruction to assemble 7612 */ 7613 private void doFLDL2T(Instruction inst) { 7614 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7615 emitFLDL2T_Reg( 7616 getFPR_Reg(MIR_Nullary.getResult(inst))); 7617 } 7618 7619 /** 7620 * Emit the given instruction, assuming that 7621 * it is a MIR_Move instruction 7622 * and has a MOVAPS operator 7623 * 7624 * @param inst the instruction to assemble 7625 */ 7626 private void doMOVAPS(Instruction inst) { 7627 if (isXMM_Reg(MIR_Move.getResult(inst))) { 7628 if (isXMM_Reg(MIR_Move.getValue(inst))) { 7629 emitMOVAPS_Reg_Reg( 7630 getXMM_Reg(MIR_Move.getResult(inst)), 7631 getXMM_Reg(MIR_Move.getValue(inst))); 7632 7633 } else { 7634 if (isAbs(MIR_Move.getValue(inst))) { 7635 emitMOVAPS_Reg_Abs( 7636 getXMM_Reg(MIR_Move.getResult(inst)), 7637 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 7638 7639 } else { 7640 if (isRegDisp(MIR_Move.getValue(inst))) { 7641 emitMOVAPS_Reg_RegDisp( 7642 getXMM_Reg(MIR_Move.getResult(inst)), 7643 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 7644 7645 } else { 7646 if (isRegOff(MIR_Move.getValue(inst))) { 7647 emitMOVAPS_Reg_RegOff( 7648 getXMM_Reg(MIR_Move.getResult(inst)), 7649 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 7650 7651 } else { 7652 if (isRegIdx(MIR_Move.getValue(inst))) { 7653 emitMOVAPS_Reg_RegIdx( 7654 getXMM_Reg(MIR_Move.getResult(inst)), 7655 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 7656 7657 } else { 7658 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7659 emitMOVAPS_Reg_RegInd( 7660 getXMM_Reg(MIR_Move.getResult(inst)), 7661 getBase(MIR_Move.getValue(inst))); 7662 } 7663 } 7664 } 7665 } 7666 } 7667 7668 } else { 7669 if (isAbs(MIR_Move.getResult(inst))) { 7670 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7671 emitMOVAPS_Abs_Reg( 7672 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 7673 getXMM_Reg(MIR_Move.getValue(inst))); 7674 7675 } else { 7676 if (isRegDisp(MIR_Move.getResult(inst))) { 7677 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7678 emitMOVAPS_RegDisp_Reg( 7679 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 7680 getXMM_Reg(MIR_Move.getValue(inst))); 7681 7682 } else { 7683 if (isRegOff(MIR_Move.getResult(inst))) { 7684 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7685 emitMOVAPS_RegOff_Reg( 7686 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 7687 getXMM_Reg(MIR_Move.getValue(inst))); 7688 7689 } else { 7690 if (isRegIdx(MIR_Move.getResult(inst))) { 7691 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7692 emitMOVAPS_RegIdx_Reg( 7693 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 7694 getXMM_Reg(MIR_Move.getValue(inst))); 7695 7696 } else { 7697 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7698 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7699 emitMOVAPS_RegInd_Reg( 7700 getBase(MIR_Move.getResult(inst)), 7701 getXMM_Reg(MIR_Move.getValue(inst))); 7702 } 7703 } 7704 } 7705 } 7706 } 7707 } 7708 7709 /** 7710 * Emit the given instruction, assuming that 7711 * it is a MIR_BinaryAcc instruction 7712 * and has a FSUBP operator 7713 * 7714 * @param inst the instruction to assemble 7715 */ 7716 private void doFSUBP(Instruction inst) { 7717 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7718 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7719 emitFSUBP_Reg_Reg( 7720 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7721 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 7722 } 7723 7724 /** 7725 * Emit the given instruction, assuming that 7726 * it is a MIR_BinaryAcc instruction 7727 * and has a FSUBR operator 7728 * 7729 * @param inst the instruction to assemble 7730 */ 7731 private void doFSUBR(Instruction inst) { 7732 if (isQuad(inst)) { 7733 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 7734 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7735 emitFSUBR_Reg_Abs_Quad( 7736 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7737 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 7738 7739 } else { 7740 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 7741 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7742 emitFSUBR_Reg_RegDisp_Quad( 7743 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7744 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7745 7746 } else { 7747 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 7748 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7749 emitFSUBR_Reg_RegOff_Quad( 7750 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7751 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7752 7753 } else { 7754 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 7755 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7756 emitFSUBR_Reg_RegIdx_Quad( 7757 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7758 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7759 7760 } else { 7761 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7762 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7763 emitFSUBR_Reg_RegInd_Quad( 7764 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7765 getBase(MIR_BinaryAcc.getValue(inst))); 7766 } 7767 } 7768 } 7769 } 7770 7771 } else { 7772 if (isFPR_Reg(MIR_BinaryAcc.getValue(inst))) { 7773 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7774 emitFSUBR_Reg_Reg( 7775 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7776 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 7777 7778 } else { 7779 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 7780 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7781 emitFSUBR_Reg_Abs( 7782 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7783 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 7784 7785 } else { 7786 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 7787 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7788 emitFSUBR_Reg_RegDisp( 7789 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7790 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7791 7792 } else { 7793 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 7794 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7795 emitFSUBR_Reg_RegOff( 7796 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7797 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7798 7799 } else { 7800 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 7801 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7802 emitFSUBR_Reg_RegIdx( 7803 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7804 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7805 7806 } else { 7807 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7808 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7809 emitFSUBR_Reg_RegInd( 7810 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 7811 getBase(MIR_BinaryAcc.getValue(inst))); 7812 } 7813 } 7814 } 7815 } 7816 } 7817 } 7818 } 7819 7820 /** 7821 * Emit the given instruction, assuming that 7822 * it is a MIR_Unary instruction 7823 * and has a CVTTSS2SI operator 7824 * 7825 * @param inst the instruction to assemble 7826 */ 7827 private void doCVTTSS2SI(Instruction inst) { 7828 if (isQuad(inst)) { 7829 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 7830 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7831 emitCVTTSS2SI_Reg_Reg_Quad( 7832 getGPR_Reg(MIR_Unary.getResult(inst)), 7833 getXMM_Reg(MIR_Unary.getVal(inst))); 7834 7835 } else { 7836 if (isAbs(MIR_Unary.getVal(inst))) { 7837 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7838 emitCVTTSS2SI_Reg_Abs_Quad( 7839 getGPR_Reg(MIR_Unary.getResult(inst)), 7840 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 7841 7842 } else { 7843 if (isRegDisp(MIR_Unary.getVal(inst))) { 7844 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7845 emitCVTTSS2SI_Reg_RegDisp_Quad( 7846 getGPR_Reg(MIR_Unary.getResult(inst)), 7847 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 7848 7849 } else { 7850 if (isRegOff(MIR_Unary.getVal(inst))) { 7851 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7852 emitCVTTSS2SI_Reg_RegOff_Quad( 7853 getGPR_Reg(MIR_Unary.getResult(inst)), 7854 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 7855 7856 } else { 7857 if (isRegIdx(MIR_Unary.getVal(inst))) { 7858 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7859 emitCVTTSS2SI_Reg_RegIdx_Quad( 7860 getGPR_Reg(MIR_Unary.getResult(inst)), 7861 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 7862 7863 } else { 7864 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7865 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7866 emitCVTTSS2SI_Reg_RegInd_Quad( 7867 getGPR_Reg(MIR_Unary.getResult(inst)), 7868 getBase(MIR_Unary.getVal(inst))); 7869 } 7870 } 7871 } 7872 } 7873 } 7874 7875 } else { 7876 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 7877 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7878 emitCVTTSS2SI_Reg_Reg( 7879 getGPR_Reg(MIR_Unary.getResult(inst)), 7880 getXMM_Reg(MIR_Unary.getVal(inst))); 7881 7882 } else { 7883 if (isAbs(MIR_Unary.getVal(inst))) { 7884 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7885 emitCVTTSS2SI_Reg_Abs( 7886 getGPR_Reg(MIR_Unary.getResult(inst)), 7887 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 7888 7889 } else { 7890 if (isRegDisp(MIR_Unary.getVal(inst))) { 7891 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7892 emitCVTTSS2SI_Reg_RegDisp( 7893 getGPR_Reg(MIR_Unary.getResult(inst)), 7894 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 7895 7896 } else { 7897 if (isRegOff(MIR_Unary.getVal(inst))) { 7898 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7899 emitCVTTSS2SI_Reg_RegOff( 7900 getGPR_Reg(MIR_Unary.getResult(inst)), 7901 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 7902 7903 } else { 7904 if (isRegIdx(MIR_Unary.getVal(inst))) { 7905 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7906 emitCVTTSS2SI_Reg_RegIdx( 7907 getGPR_Reg(MIR_Unary.getResult(inst)), 7908 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 7909 7910 } else { 7911 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7912 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7913 emitCVTTSS2SI_Reg_RegInd( 7914 getGPR_Reg(MIR_Unary.getResult(inst)), 7915 getBase(MIR_Unary.getVal(inst))); 7916 } 7917 } 7918 } 7919 } 7920 } 7921 } 7922 } 7923 7924 /** 7925 * Emit the given instruction, assuming that 7926 * it is a MIR_Return instruction 7927 * and has a RET operator 7928 * 7929 * @param inst the instruction to assemble 7930 */ 7931 private void doRET(Instruction inst) { 7932 if (isImm(MIR_Return.getPopBytes(inst))) { 7933 emitRET_Imm( 7934 getImm(MIR_Return.getPopBytes(inst))); 7935 7936 } else { 7937 emitRET(); 7938 } 7939 } 7940 7941 /** 7942 * Emit the given instruction, assuming that 7943 * it is a MIR_BinaryAcc instruction 7944 * and has a ADC operator 7945 * 7946 * @param inst the instruction to assemble 7947 */ 7948 private void doADC(Instruction inst) { 7949 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 7950 if (isByte(inst)) { 7951 if (isImm(MIR_BinaryAcc.getValue(inst))) { 7952 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 7953 emitADC_Reg_Imm_Byte( 7954 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 7955 getImm(MIR_BinaryAcc.getValue(inst))); 7956 7957 } else { 7958 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 7959 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 7960 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 7961 emitADC_Reg_Reg_Byte( 7962 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 7963 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 7964 7965 } else { 7966 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 7967 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 7968 emitADC_Reg_Abs_Byte( 7969 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 7970 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 7971 7972 } else { 7973 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 7974 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 7975 emitADC_Reg_RegDisp_Byte( 7976 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 7977 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7978 7979 } else { 7980 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 7981 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 7982 emitADC_Reg_RegOff_Byte( 7983 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 7984 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7985 7986 } else { 7987 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 7988 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 7989 emitADC_Reg_RegIdx_Byte( 7990 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 7991 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 7992 7993 } else { 7994 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 7995 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 7996 emitADC_Reg_RegInd_Byte( 7997 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 7998 getBase(MIR_BinaryAcc.getValue(inst))); 7999 } 8000 } 8001 } 8002 } 8003 } 8004 } 8005 8006 } else { 8007 if (isWord(inst)) { 8008 if (isImm(MIR_BinaryAcc.getValue(inst))) { 8009 emitADC_Reg_Imm_Word( 8010 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8011 getImm(MIR_BinaryAcc.getValue(inst))); 8012 8013 } else { 8014 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 8015 emitADC_Reg_Reg_Word( 8016 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8017 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8018 8019 } else { 8020 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 8021 emitADC_Reg_Abs_Word( 8022 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8023 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 8024 8025 } else { 8026 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 8027 emitADC_Reg_RegDisp_Word( 8028 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8029 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8030 8031 } else { 8032 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 8033 emitADC_Reg_RegOff_Word( 8034 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8035 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8036 8037 } else { 8038 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 8039 emitADC_Reg_RegIdx_Word( 8040 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8041 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8042 8043 } else { 8044 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8045 emitADC_Reg_RegInd_Word( 8046 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8047 getBase(MIR_BinaryAcc.getValue(inst))); 8048 } 8049 } 8050 } 8051 } 8052 } 8053 } 8054 8055 } else { 8056 if (isQuad(inst)) { 8057 if (isImm(MIR_BinaryAcc.getValue(inst))) { 8058 emitADC_Reg_Imm_Quad( 8059 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8060 getImm(MIR_BinaryAcc.getValue(inst))); 8061 8062 } else { 8063 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 8064 emitADC_Reg_Reg_Quad( 8065 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8066 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8067 8068 } else { 8069 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 8070 emitADC_Reg_Abs_Quad( 8071 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8072 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 8073 8074 } else { 8075 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 8076 emitADC_Reg_RegDisp_Quad( 8077 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8078 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8079 8080 } else { 8081 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 8082 emitADC_Reg_RegOff_Quad( 8083 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8084 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8085 8086 } else { 8087 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 8088 emitADC_Reg_RegIdx_Quad( 8089 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8090 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8091 8092 } else { 8093 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8094 emitADC_Reg_RegInd_Quad( 8095 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8096 getBase(MIR_BinaryAcc.getValue(inst))); 8097 } 8098 } 8099 } 8100 } 8101 } 8102 } 8103 8104 } else { 8105 if (isImm(MIR_BinaryAcc.getValue(inst))) { 8106 emitADC_Reg_Imm( 8107 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8108 getImm(MIR_BinaryAcc.getValue(inst))); 8109 8110 } else { 8111 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 8112 emitADC_Reg_Reg( 8113 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8114 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8115 8116 } else { 8117 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 8118 emitADC_Reg_Abs( 8119 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8120 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 8121 8122 } else { 8123 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 8124 emitADC_Reg_RegDisp( 8125 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8126 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8127 8128 } else { 8129 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 8130 emitADC_Reg_RegOff( 8131 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8132 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8133 8134 } else { 8135 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 8136 emitADC_Reg_RegIdx( 8137 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8138 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8139 8140 } else { 8141 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8142 emitADC_Reg_RegInd( 8143 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8144 getBase(MIR_BinaryAcc.getValue(inst))); 8145 } 8146 } 8147 } 8148 } 8149 } 8150 } 8151 } 8152 } 8153 } 8154 8155 } else { 8156 if (isImm(MIR_BinaryAcc.getValue(inst))) { 8157 if (isByte(inst)) { 8158 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8159 emitADC_Abs_Imm_Byte( 8160 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8161 getImm(MIR_BinaryAcc.getValue(inst))); 8162 8163 } else { 8164 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8165 emitADC_RegDisp_Imm_Byte( 8166 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8167 getImm(MIR_BinaryAcc.getValue(inst))); 8168 8169 } else { 8170 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8171 emitADC_RegOff_Imm_Byte( 8172 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8173 getImm(MIR_BinaryAcc.getValue(inst))); 8174 8175 } else { 8176 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8177 emitADC_RegIdx_Imm_Byte( 8178 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8179 getImm(MIR_BinaryAcc.getValue(inst))); 8180 8181 } else { 8182 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8183 emitADC_RegInd_Imm_Byte( 8184 getBase(MIR_BinaryAcc.getResult(inst)), 8185 getImm(MIR_BinaryAcc.getValue(inst))); 8186 } 8187 } 8188 } 8189 } 8190 8191 } else { 8192 if (isWord(inst)) { 8193 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8194 emitADC_Abs_Imm_Word( 8195 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8196 getImm(MIR_BinaryAcc.getValue(inst))); 8197 8198 } else { 8199 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8200 emitADC_RegDisp_Imm_Word( 8201 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8202 getImm(MIR_BinaryAcc.getValue(inst))); 8203 8204 } else { 8205 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8206 emitADC_RegOff_Imm_Word( 8207 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8208 getImm(MIR_BinaryAcc.getValue(inst))); 8209 8210 } else { 8211 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8212 emitADC_RegIdx_Imm_Word( 8213 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8214 getImm(MIR_BinaryAcc.getValue(inst))); 8215 8216 } else { 8217 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8218 emitADC_RegInd_Imm_Word( 8219 getBase(MIR_BinaryAcc.getResult(inst)), 8220 getImm(MIR_BinaryAcc.getValue(inst))); 8221 } 8222 } 8223 } 8224 } 8225 8226 } else { 8227 if (isQuad(inst)) { 8228 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8229 emitADC_Abs_Imm_Quad( 8230 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8231 getImm(MIR_BinaryAcc.getValue(inst))); 8232 8233 } else { 8234 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8235 emitADC_RegDisp_Imm_Quad( 8236 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8237 getImm(MIR_BinaryAcc.getValue(inst))); 8238 8239 } else { 8240 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8241 emitADC_RegOff_Imm_Quad( 8242 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8243 getImm(MIR_BinaryAcc.getValue(inst))); 8244 8245 } else { 8246 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8247 emitADC_RegIdx_Imm_Quad( 8248 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8249 getImm(MIR_BinaryAcc.getValue(inst))); 8250 8251 } else { 8252 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8253 emitADC_RegInd_Imm_Quad( 8254 getBase(MIR_BinaryAcc.getResult(inst)), 8255 getImm(MIR_BinaryAcc.getValue(inst))); 8256 } 8257 } 8258 } 8259 } 8260 8261 } else { 8262 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8263 emitADC_Abs_Imm( 8264 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8265 getImm(MIR_BinaryAcc.getValue(inst))); 8266 8267 } else { 8268 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8269 emitADC_RegDisp_Imm( 8270 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8271 getImm(MIR_BinaryAcc.getValue(inst))); 8272 8273 } else { 8274 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8275 emitADC_RegOff_Imm( 8276 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8277 getImm(MIR_BinaryAcc.getValue(inst))); 8278 8279 } else { 8280 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8281 emitADC_RegIdx_Imm( 8282 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8283 getImm(MIR_BinaryAcc.getValue(inst))); 8284 8285 } else { 8286 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8287 emitADC_RegInd_Imm( 8288 getBase(MIR_BinaryAcc.getResult(inst)), 8289 getImm(MIR_BinaryAcc.getValue(inst))); 8290 } 8291 } 8292 } 8293 } 8294 } 8295 } 8296 } 8297 8298 } else { 8299 if (isByte(inst)) { 8300 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8301 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8302 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8303 emitADC_Abs_Reg_Byte( 8304 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8305 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8306 8307 } else { 8308 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8309 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8310 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8311 emitADC_RegDisp_Reg_Byte( 8312 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8313 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8314 8315 } else { 8316 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8317 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8318 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8319 emitADC_RegOff_Reg_Byte( 8320 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8321 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8322 8323 } else { 8324 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8325 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8326 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8327 emitADC_RegIdx_Reg_Byte( 8328 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8329 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8330 8331 } else { 8332 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8333 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8334 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8335 emitADC_RegInd_Reg_Byte( 8336 getBase(MIR_BinaryAcc.getResult(inst)), 8337 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8338 } 8339 } 8340 } 8341 } 8342 8343 } else { 8344 if (isWord(inst)) { 8345 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8346 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8347 emitADC_Abs_Reg_Word( 8348 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8349 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8350 8351 } else { 8352 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8353 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8354 emitADC_RegDisp_Reg_Word( 8355 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8356 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8357 8358 } else { 8359 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8360 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8361 emitADC_RegOff_Reg_Word( 8362 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8363 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8364 8365 } else { 8366 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8367 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8368 emitADC_RegIdx_Reg_Word( 8369 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8370 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8371 8372 } else { 8373 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8374 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8375 emitADC_RegInd_Reg_Word( 8376 getBase(MIR_BinaryAcc.getResult(inst)), 8377 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8378 } 8379 } 8380 } 8381 } 8382 8383 } else { 8384 if (isQuad(inst)) { 8385 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8386 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8387 emitADC_Abs_Reg_Quad( 8388 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8389 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8390 8391 } else { 8392 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8393 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8394 emitADC_RegDisp_Reg_Quad( 8395 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8396 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8397 8398 } else { 8399 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8400 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8401 emitADC_RegOff_Reg_Quad( 8402 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8403 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8404 8405 } else { 8406 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8407 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8408 emitADC_RegIdx_Reg_Quad( 8409 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8410 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8411 8412 } else { 8413 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8414 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8415 emitADC_RegInd_Reg_Quad( 8416 getBase(MIR_BinaryAcc.getResult(inst)), 8417 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8418 } 8419 } 8420 } 8421 } 8422 8423 } else { 8424 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8425 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8426 emitADC_Abs_Reg( 8427 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8428 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8429 8430 } else { 8431 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8432 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8433 emitADC_RegDisp_Reg( 8434 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8435 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8436 8437 } else { 8438 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8439 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8440 emitADC_RegOff_Reg( 8441 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8442 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8443 8444 } else { 8445 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8446 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8447 emitADC_RegIdx_Reg( 8448 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8449 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8450 8451 } else { 8452 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8453 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8454 emitADC_RegInd_Reg( 8455 getBase(MIR_BinaryAcc.getResult(inst)), 8456 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8457 } 8458 } 8459 } 8460 } 8461 } 8462 } 8463 } 8464 } 8465 } 8466 } 8467 8468 /** 8469 * Emit the given instruction, assuming that 8470 * it is a MIR_BinaryAcc instruction 8471 * and has a ADD operator 8472 * 8473 * @param inst the instruction to assemble 8474 */ 8475 private void doADD(Instruction inst) { 8476 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 8477 if (isByte(inst)) { 8478 if (isImm(MIR_BinaryAcc.getValue(inst))) { 8479 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 8480 emitADD_Reg_Imm_Byte( 8481 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8482 getImm(MIR_BinaryAcc.getValue(inst))); 8483 8484 } else { 8485 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 8486 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 8487 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8488 emitADD_Reg_Reg_Byte( 8489 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8490 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8491 8492 } else { 8493 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 8494 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 8495 emitADD_Reg_Abs_Byte( 8496 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8497 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 8498 8499 } else { 8500 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 8501 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 8502 emitADD_Reg_RegDisp_Byte( 8503 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8504 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8505 8506 } else { 8507 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 8508 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 8509 emitADD_Reg_RegOff_Byte( 8510 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8511 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8512 8513 } else { 8514 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 8515 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 8516 emitADD_Reg_RegIdx_Byte( 8517 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8518 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8519 8520 } else { 8521 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8522 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 8523 emitADD_Reg_RegInd_Byte( 8524 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8525 getBase(MIR_BinaryAcc.getValue(inst))); 8526 } 8527 } 8528 } 8529 } 8530 } 8531 } 8532 8533 } else { 8534 if (isWord(inst)) { 8535 if (isImm(MIR_BinaryAcc.getValue(inst))) { 8536 emitADD_Reg_Imm_Word( 8537 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8538 getImm(MIR_BinaryAcc.getValue(inst))); 8539 8540 } else { 8541 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 8542 emitADD_Reg_Reg_Word( 8543 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8544 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8545 8546 } else { 8547 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 8548 emitADD_Reg_Abs_Word( 8549 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8550 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 8551 8552 } else { 8553 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 8554 emitADD_Reg_RegDisp_Word( 8555 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8556 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8557 8558 } else { 8559 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 8560 emitADD_Reg_RegOff_Word( 8561 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8562 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8563 8564 } else { 8565 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 8566 emitADD_Reg_RegIdx_Word( 8567 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8568 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8569 8570 } else { 8571 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8572 emitADD_Reg_RegInd_Word( 8573 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8574 getBase(MIR_BinaryAcc.getValue(inst))); 8575 } 8576 } 8577 } 8578 } 8579 } 8580 } 8581 8582 } else { 8583 if (isQuad(inst)) { 8584 if (isImm(MIR_BinaryAcc.getValue(inst))) { 8585 emitADD_Reg_Imm_Quad( 8586 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8587 getImm(MIR_BinaryAcc.getValue(inst))); 8588 8589 } else { 8590 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 8591 emitADD_Reg_Reg_Quad( 8592 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8593 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8594 8595 } else { 8596 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 8597 emitADD_Reg_Abs_Quad( 8598 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8599 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 8600 8601 } else { 8602 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 8603 emitADD_Reg_RegDisp_Quad( 8604 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8605 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8606 8607 } else { 8608 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 8609 emitADD_Reg_RegOff_Quad( 8610 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8611 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8612 8613 } else { 8614 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 8615 emitADD_Reg_RegIdx_Quad( 8616 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8617 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8618 8619 } else { 8620 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8621 emitADD_Reg_RegInd_Quad( 8622 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8623 getBase(MIR_BinaryAcc.getValue(inst))); 8624 } 8625 } 8626 } 8627 } 8628 } 8629 } 8630 8631 } else { 8632 if (isImm(MIR_BinaryAcc.getValue(inst))) { 8633 emitADD_Reg_Imm( 8634 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8635 getImm(MIR_BinaryAcc.getValue(inst))); 8636 8637 } else { 8638 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 8639 emitADD_Reg_Reg( 8640 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8641 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8642 8643 } else { 8644 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 8645 emitADD_Reg_Abs( 8646 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8647 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 8648 8649 } else { 8650 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 8651 emitADD_Reg_RegDisp( 8652 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8653 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8654 8655 } else { 8656 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 8657 emitADD_Reg_RegOff( 8658 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8659 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8660 8661 } else { 8662 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 8663 emitADD_Reg_RegIdx( 8664 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8665 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 8666 8667 } else { 8668 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8669 emitADD_Reg_RegInd( 8670 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 8671 getBase(MIR_BinaryAcc.getValue(inst))); 8672 } 8673 } 8674 } 8675 } 8676 } 8677 } 8678 } 8679 } 8680 } 8681 8682 } else { 8683 if (isImm(MIR_BinaryAcc.getValue(inst))) { 8684 if (isByte(inst)) { 8685 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8686 emitADD_Abs_Imm_Byte( 8687 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8688 getImm(MIR_BinaryAcc.getValue(inst))); 8689 8690 } else { 8691 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8692 emitADD_RegDisp_Imm_Byte( 8693 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8694 getImm(MIR_BinaryAcc.getValue(inst))); 8695 8696 } else { 8697 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8698 emitADD_RegOff_Imm_Byte( 8699 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8700 getImm(MIR_BinaryAcc.getValue(inst))); 8701 8702 } else { 8703 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8704 emitADD_RegIdx_Imm_Byte( 8705 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8706 getImm(MIR_BinaryAcc.getValue(inst))); 8707 8708 } else { 8709 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8710 emitADD_RegInd_Imm_Byte( 8711 getBase(MIR_BinaryAcc.getResult(inst)), 8712 getImm(MIR_BinaryAcc.getValue(inst))); 8713 } 8714 } 8715 } 8716 } 8717 8718 } else { 8719 if (isWord(inst)) { 8720 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8721 emitADD_Abs_Imm_Word( 8722 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8723 getImm(MIR_BinaryAcc.getValue(inst))); 8724 8725 } else { 8726 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8727 emitADD_RegDisp_Imm_Word( 8728 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8729 getImm(MIR_BinaryAcc.getValue(inst))); 8730 8731 } else { 8732 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8733 emitADD_RegOff_Imm_Word( 8734 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8735 getImm(MIR_BinaryAcc.getValue(inst))); 8736 8737 } else { 8738 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8739 emitADD_RegIdx_Imm_Word( 8740 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8741 getImm(MIR_BinaryAcc.getValue(inst))); 8742 8743 } else { 8744 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8745 emitADD_RegInd_Imm_Word( 8746 getBase(MIR_BinaryAcc.getResult(inst)), 8747 getImm(MIR_BinaryAcc.getValue(inst))); 8748 } 8749 } 8750 } 8751 } 8752 8753 } else { 8754 if (isQuad(inst)) { 8755 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8756 emitADD_Abs_Imm_Quad( 8757 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8758 getImm(MIR_BinaryAcc.getValue(inst))); 8759 8760 } else { 8761 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8762 emitADD_RegDisp_Imm_Quad( 8763 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8764 getImm(MIR_BinaryAcc.getValue(inst))); 8765 8766 } else { 8767 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8768 emitADD_RegOff_Imm_Quad( 8769 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8770 getImm(MIR_BinaryAcc.getValue(inst))); 8771 8772 } else { 8773 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8774 emitADD_RegIdx_Imm_Quad( 8775 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8776 getImm(MIR_BinaryAcc.getValue(inst))); 8777 8778 } else { 8779 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8780 emitADD_RegInd_Imm_Quad( 8781 getBase(MIR_BinaryAcc.getResult(inst)), 8782 getImm(MIR_BinaryAcc.getValue(inst))); 8783 } 8784 } 8785 } 8786 } 8787 8788 } else { 8789 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8790 emitADD_Abs_Imm( 8791 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8792 getImm(MIR_BinaryAcc.getValue(inst))); 8793 8794 } else { 8795 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8796 emitADD_RegDisp_Imm( 8797 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8798 getImm(MIR_BinaryAcc.getValue(inst))); 8799 8800 } else { 8801 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8802 emitADD_RegOff_Imm( 8803 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8804 getImm(MIR_BinaryAcc.getValue(inst))); 8805 8806 } else { 8807 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8808 emitADD_RegIdx_Imm( 8809 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8810 getImm(MIR_BinaryAcc.getValue(inst))); 8811 8812 } else { 8813 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8814 emitADD_RegInd_Imm( 8815 getBase(MIR_BinaryAcc.getResult(inst)), 8816 getImm(MIR_BinaryAcc.getValue(inst))); 8817 } 8818 } 8819 } 8820 } 8821 } 8822 } 8823 } 8824 8825 } else { 8826 if (isByte(inst)) { 8827 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8828 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8829 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8830 emitADD_Abs_Reg_Byte( 8831 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8832 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8833 8834 } else { 8835 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8836 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8837 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8838 emitADD_RegDisp_Reg_Byte( 8839 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8840 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8841 8842 } else { 8843 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8844 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8845 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8846 emitADD_RegOff_Reg_Byte( 8847 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8848 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8849 8850 } else { 8851 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8852 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8853 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8854 emitADD_RegIdx_Reg_Byte( 8855 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8856 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8857 8858 } else { 8859 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8860 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8861 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 8862 emitADD_RegInd_Reg_Byte( 8863 getBase(MIR_BinaryAcc.getResult(inst)), 8864 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8865 } 8866 } 8867 } 8868 } 8869 8870 } else { 8871 if (isWord(inst)) { 8872 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8873 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8874 emitADD_Abs_Reg_Word( 8875 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8876 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8877 8878 } else { 8879 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8880 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8881 emitADD_RegDisp_Reg_Word( 8882 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8883 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8884 8885 } else { 8886 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8887 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8888 emitADD_RegOff_Reg_Word( 8889 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8890 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8891 8892 } else { 8893 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8894 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8895 emitADD_RegIdx_Reg_Word( 8896 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8897 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8898 8899 } else { 8900 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8901 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8902 emitADD_RegInd_Reg_Word( 8903 getBase(MIR_BinaryAcc.getResult(inst)), 8904 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8905 } 8906 } 8907 } 8908 } 8909 8910 } else { 8911 if (isQuad(inst)) { 8912 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8913 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8914 emitADD_Abs_Reg_Quad( 8915 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8916 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8917 8918 } else { 8919 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8920 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8921 emitADD_RegDisp_Reg_Quad( 8922 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8923 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8924 8925 } else { 8926 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8927 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8928 emitADD_RegOff_Reg_Quad( 8929 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8930 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8931 8932 } else { 8933 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8934 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8935 emitADD_RegIdx_Reg_Quad( 8936 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8937 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8938 8939 } else { 8940 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8941 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8942 emitADD_RegInd_Reg_Quad( 8943 getBase(MIR_BinaryAcc.getResult(inst)), 8944 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8945 } 8946 } 8947 } 8948 } 8949 8950 } else { 8951 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 8952 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8953 emitADD_Abs_Reg( 8954 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 8955 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8956 8957 } else { 8958 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 8959 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8960 emitADD_RegDisp_Reg( 8961 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8962 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8963 8964 } else { 8965 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 8966 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8967 emitADD_RegOff_Reg( 8968 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8969 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8970 8971 } else { 8972 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 8973 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8974 emitADD_RegIdx_Reg( 8975 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 8976 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8977 8978 } else { 8979 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8980 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 8981 emitADD_RegInd_Reg( 8982 getBase(MIR_BinaryAcc.getResult(inst)), 8983 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 8984 } 8985 } 8986 } 8987 } 8988 } 8989 } 8990 } 8991 } 8992 } 8993 } 8994 8995 /** 8996 * Emit the given instruction, assuming that 8997 * it is a MIR_BinaryAcc instruction 8998 * and has a CMPLESD operator 8999 * 9000 * @param inst the instruction to assemble 9001 */ 9002 private void doCMPLESD(Instruction inst) { 9003 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 9004 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9005 emitCMPLESD_Reg_Reg( 9006 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9007 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 9008 9009 } else { 9010 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 9011 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9012 emitCMPLESD_Reg_Abs( 9013 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9014 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 9015 9016 } else { 9017 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 9018 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9019 emitCMPLESD_Reg_RegDisp( 9020 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9021 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9022 9023 } else { 9024 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 9025 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9026 emitCMPLESD_Reg_RegOff( 9027 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9028 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9029 9030 } else { 9031 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 9032 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9033 emitCMPLESD_Reg_RegIdx( 9034 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9035 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9036 9037 } else { 9038 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9039 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9040 emitCMPLESD_Reg_RegInd( 9041 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9042 getBase(MIR_BinaryAcc.getValue(inst))); 9043 } 9044 } 9045 } 9046 } 9047 } 9048 } 9049 9050 /** 9051 * Emit the given instruction, assuming that 9052 * it is a MIR_BinaryAcc instruction 9053 * and has a FISUB operator 9054 * 9055 * @param inst the instruction to assemble 9056 */ 9057 private void doFISUB(Instruction inst) { 9058 if (isWord(inst)) { 9059 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 9060 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9061 emitFISUB_Reg_Abs_Word( 9062 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9063 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 9064 9065 } else { 9066 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 9067 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9068 emitFISUB_Reg_RegDisp_Word( 9069 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9070 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9071 9072 } else { 9073 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 9074 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9075 emitFISUB_Reg_RegOff_Word( 9076 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9077 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9078 9079 } else { 9080 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 9081 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9082 emitFISUB_Reg_RegIdx_Word( 9083 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9084 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9085 9086 } else { 9087 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9088 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9089 emitFISUB_Reg_RegInd_Word( 9090 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9091 getBase(MIR_BinaryAcc.getValue(inst))); 9092 } 9093 } 9094 } 9095 } 9096 9097 } else { 9098 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 9099 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9100 emitFISUB_Reg_Abs( 9101 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9102 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 9103 9104 } else { 9105 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 9106 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9107 emitFISUB_Reg_RegDisp( 9108 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9109 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9110 9111 } else { 9112 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 9113 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9114 emitFISUB_Reg_RegOff( 9115 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9116 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9117 9118 } else { 9119 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 9120 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9121 emitFISUB_Reg_RegIdx( 9122 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9123 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9124 9125 } else { 9126 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9127 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9128 emitFISUB_Reg_RegInd( 9129 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9130 getBase(MIR_BinaryAcc.getValue(inst))); 9131 } 9132 } 9133 } 9134 } 9135 } 9136 } 9137 9138 /** 9139 * Emit the given instruction, assuming that 9140 * it is a MIR_BinaryAcc instruction 9141 * and has a XORPS operator 9142 * 9143 * @param inst the instruction to assemble 9144 */ 9145 private void doXORPS(Instruction inst) { 9146 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 9147 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9148 emitXORPS_Reg_Reg( 9149 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9150 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 9151 9152 } else { 9153 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 9154 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9155 emitXORPS_Reg_Abs( 9156 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9157 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 9158 9159 } else { 9160 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 9161 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9162 emitXORPS_Reg_RegDisp( 9163 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9164 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9165 9166 } else { 9167 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 9168 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9169 emitXORPS_Reg_RegOff( 9170 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9171 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9172 9173 } else { 9174 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 9175 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9176 emitXORPS_Reg_RegIdx( 9177 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9178 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9179 9180 } else { 9181 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9182 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9183 emitXORPS_Reg_RegInd( 9184 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9185 getBase(MIR_BinaryAcc.getValue(inst))); 9186 } 9187 } 9188 } 9189 } 9190 } 9191 } 9192 9193 /** 9194 * Emit the given instruction, assuming that 9195 * it is a MIR_Empty instruction 9196 * and has a MFENCE operator 9197 * 9198 * @param inst the instruction to assemble 9199 */ 9200 private void doMFENCE(Instruction inst) { 9201 emitMFENCE(); 9202 } 9203 9204 /** 9205 * Emit the given instruction, assuming that 9206 * it is a MIR_Compare instruction 9207 * and has a FCOMIP operator 9208 * 9209 * @param inst the instruction to assemble 9210 */ 9211 private void doFCOMIP(Instruction inst) { 9212 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9213 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9214 emitFCOMIP_Reg_Reg( 9215 getFPR_Reg(MIR_Compare.getVal1(inst)), 9216 getFPR_Reg(MIR_Compare.getVal2(inst))); 9217 } 9218 9219 /** 9220 * Emit the given instruction, assuming that 9221 * it is a MIR_BinaryAcc instruction 9222 * and has a FMULP operator 9223 * 9224 * @param inst the instruction to assemble 9225 */ 9226 private void doFMULP(Instruction inst) { 9227 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9228 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9229 emitFMULP_Reg_Reg( 9230 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 9231 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 9232 } 9233 9234 /** 9235 * Emit the given instruction, assuming that 9236 * it is a MIR_BinaryAcc instruction 9237 * and has a CMPLESS operator 9238 * 9239 * @param inst the instruction to assemble 9240 */ 9241 private void doCMPLESS(Instruction inst) { 9242 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 9243 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9244 emitCMPLESS_Reg_Reg( 9245 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9246 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 9247 9248 } else { 9249 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 9250 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9251 emitCMPLESS_Reg_Abs( 9252 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9253 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 9254 9255 } else { 9256 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 9257 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9258 emitCMPLESS_Reg_RegDisp( 9259 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9260 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9261 9262 } else { 9263 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 9264 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9265 emitCMPLESS_Reg_RegOff( 9266 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9267 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9268 9269 } else { 9270 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 9271 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9272 emitCMPLESS_Reg_RegIdx( 9273 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9274 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9275 9276 } else { 9277 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9278 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9279 emitCMPLESS_Reg_RegInd( 9280 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9281 getBase(MIR_BinaryAcc.getValue(inst))); 9282 } 9283 } 9284 } 9285 } 9286 } 9287 } 9288 9289 /** 9290 * Emit the given instruction, assuming that 9291 * it is a MIR_Move instruction 9292 * and has a FISTP operator 9293 * 9294 * @param inst the instruction to assemble 9295 */ 9296 private void doFISTP(Instruction inst) { 9297 if (isWord(inst)) { 9298 if (isAbs(MIR_Move.getResult(inst))) { 9299 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9300 emitFISTP_Abs_Reg_Word( 9301 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 9302 getFPR_Reg(MIR_Move.getValue(inst))); 9303 9304 } else { 9305 if (isRegDisp(MIR_Move.getResult(inst))) { 9306 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9307 emitFISTP_RegDisp_Reg_Word( 9308 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 9309 getFPR_Reg(MIR_Move.getValue(inst))); 9310 9311 } else { 9312 if (isRegOff(MIR_Move.getResult(inst))) { 9313 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9314 emitFISTP_RegOff_Reg_Word( 9315 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 9316 getFPR_Reg(MIR_Move.getValue(inst))); 9317 9318 } else { 9319 if (isRegIdx(MIR_Move.getResult(inst))) { 9320 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9321 emitFISTP_RegIdx_Reg_Word( 9322 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 9323 getFPR_Reg(MIR_Move.getValue(inst))); 9324 9325 } else { 9326 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9327 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9328 emitFISTP_RegInd_Reg_Word( 9329 getBase(MIR_Move.getResult(inst)), 9330 getFPR_Reg(MIR_Move.getValue(inst))); 9331 } 9332 } 9333 } 9334 } 9335 9336 } else { 9337 if (isQuad(inst)) { 9338 if (isAbs(MIR_Move.getResult(inst))) { 9339 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9340 emitFISTP_Abs_Reg_Quad( 9341 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 9342 getFPR_Reg(MIR_Move.getValue(inst))); 9343 9344 } else { 9345 if (isRegDisp(MIR_Move.getResult(inst))) { 9346 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9347 emitFISTP_RegDisp_Reg_Quad( 9348 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 9349 getFPR_Reg(MIR_Move.getValue(inst))); 9350 9351 } else { 9352 if (isRegOff(MIR_Move.getResult(inst))) { 9353 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9354 emitFISTP_RegOff_Reg_Quad( 9355 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 9356 getFPR_Reg(MIR_Move.getValue(inst))); 9357 9358 } else { 9359 if (isRegIdx(MIR_Move.getResult(inst))) { 9360 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9361 emitFISTP_RegIdx_Reg_Quad( 9362 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 9363 getFPR_Reg(MIR_Move.getValue(inst))); 9364 9365 } else { 9366 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9367 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9368 emitFISTP_RegInd_Reg_Quad( 9369 getBase(MIR_Move.getResult(inst)), 9370 getFPR_Reg(MIR_Move.getValue(inst))); 9371 } 9372 } 9373 } 9374 } 9375 9376 } else { 9377 if (isAbs(MIR_Move.getResult(inst))) { 9378 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9379 emitFISTP_Abs_Reg( 9380 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 9381 getFPR_Reg(MIR_Move.getValue(inst))); 9382 9383 } else { 9384 if (isRegDisp(MIR_Move.getResult(inst))) { 9385 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9386 emitFISTP_RegDisp_Reg( 9387 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 9388 getFPR_Reg(MIR_Move.getValue(inst))); 9389 9390 } else { 9391 if (isRegOff(MIR_Move.getResult(inst))) { 9392 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9393 emitFISTP_RegOff_Reg( 9394 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 9395 getFPR_Reg(MIR_Move.getValue(inst))); 9396 9397 } else { 9398 if (isRegIdx(MIR_Move.getResult(inst))) { 9399 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9400 emitFISTP_RegIdx_Reg( 9401 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 9402 getFPR_Reg(MIR_Move.getValue(inst))); 9403 9404 } else { 9405 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9406 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9407 emitFISTP_RegInd_Reg( 9408 getBase(MIR_Move.getResult(inst)), 9409 getFPR_Reg(MIR_Move.getValue(inst))); 9410 } 9411 } 9412 } 9413 } 9414 } 9415 } 9416 } 9417 9418 /** 9419 * Emit the given instruction, assuming that 9420 * it is a MIR_RDTSC instruction 9421 * and has a RDTSC operator 9422 * 9423 * @param inst the instruction to assemble 9424 */ 9425 private void doRDTSC(Instruction inst) { 9426 emitRDTSC(); 9427 } 9428 9429 /** 9430 * Emit the given instruction, assuming that 9431 * it is a MIR_BinaryAcc instruction 9432 * and has a MULSD operator 9433 * 9434 * @param inst the instruction to assemble 9435 */ 9436 private void doMULSD(Instruction inst) { 9437 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 9438 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9439 emitMULSD_Reg_Reg( 9440 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9441 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 9442 9443 } else { 9444 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 9445 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9446 emitMULSD_Reg_Abs( 9447 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9448 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 9449 9450 } else { 9451 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 9452 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9453 emitMULSD_Reg_RegDisp( 9454 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9455 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9456 9457 } else { 9458 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 9459 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9460 emitMULSD_Reg_RegOff( 9461 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9462 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9463 9464 } else { 9465 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 9466 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9467 emitMULSD_Reg_RegIdx( 9468 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9469 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9470 9471 } else { 9472 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9473 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9474 emitMULSD_Reg_RegInd( 9475 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9476 getBase(MIR_BinaryAcc.getValue(inst))); 9477 } 9478 } 9479 } 9480 } 9481 } 9482 } 9483 9484 /** 9485 * Emit the given instruction, assuming that 9486 * it is a MIR_BinaryAcc instruction 9487 * and has a XORPD operator 9488 * 9489 * @param inst the instruction to assemble 9490 */ 9491 private void doXORPD(Instruction inst) { 9492 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 9493 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9494 emitXORPD_Reg_Reg( 9495 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9496 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 9497 9498 } else { 9499 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 9500 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9501 emitXORPD_Reg_Abs( 9502 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9503 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 9504 9505 } else { 9506 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 9507 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9508 emitXORPD_Reg_RegDisp( 9509 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9510 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9511 9512 } else { 9513 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 9514 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9515 emitXORPD_Reg_RegOff( 9516 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9517 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9518 9519 } else { 9520 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 9521 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9522 emitXORPD_Reg_RegIdx( 9523 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9524 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 9525 9526 } else { 9527 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9528 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9529 emitXORPD_Reg_RegInd( 9530 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 9531 getBase(MIR_BinaryAcc.getValue(inst))); 9532 } 9533 } 9534 } 9535 } 9536 } 9537 } 9538 9539 /** 9540 * Emit the given instruction, assuming that 9541 * it is a MIR_Nullary instruction 9542 * and has a FLD1 operator 9543 * 9544 * @param inst the instruction to assemble 9545 */ 9546 private void doFLD1(Instruction inst) { 9547 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9548 emitFLD1_Reg( 9549 getFPR_Reg(MIR_Nullary.getResult(inst))); 9550 } 9551 9552 /** 9553 * Emit the given instruction, assuming that 9554 * it is a MIR_XChng instruction 9555 * and has a FXCH operator 9556 * 9557 * @param inst the instruction to assemble 9558 */ 9559 private void doFXCH(Instruction inst) { 9560 if (VM.VerifyAssertions && !isFPR_Reg(MIR_XChng.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9561 if (VM.VerifyAssertions && !isFPR_Reg(MIR_XChng.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9562 emitFXCH_Reg_Reg( 9563 getFPR_Reg(MIR_XChng.getVal1(inst)), 9564 getFPR_Reg(MIR_XChng.getVal2(inst))); 9565 } 9566 9567 /** 9568 * Emit the given instruction, assuming that 9569 * it is a MIR_BinaryAcc instruction 9570 * and has a SHL operator 9571 * 9572 * @param inst the instruction to assemble 9573 */ 9574 private void doSHL(Instruction inst) { 9575 if (isImm(MIR_BinaryAcc.getValue(inst))) { 9576 if (isByte(inst)) { 9577 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 9578 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 9579 emitSHL_Reg_Imm_Byte( 9580 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 9581 getImm(MIR_BinaryAcc.getValue(inst))); 9582 9583 } else { 9584 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 9585 emitSHL_Abs_Imm_Byte( 9586 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 9587 getImm(MIR_BinaryAcc.getValue(inst))); 9588 9589 } else { 9590 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 9591 emitSHL_RegDisp_Imm_Byte( 9592 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9593 getImm(MIR_BinaryAcc.getValue(inst))); 9594 9595 } else { 9596 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 9597 emitSHL_RegOff_Imm_Byte( 9598 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9599 getImm(MIR_BinaryAcc.getValue(inst))); 9600 9601 } else { 9602 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 9603 emitSHL_RegIdx_Imm_Byte( 9604 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9605 getImm(MIR_BinaryAcc.getValue(inst))); 9606 9607 } else { 9608 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9609 emitSHL_RegInd_Imm_Byte( 9610 getBase(MIR_BinaryAcc.getResult(inst)), 9611 getImm(MIR_BinaryAcc.getValue(inst))); 9612 } 9613 } 9614 } 9615 } 9616 } 9617 9618 } else { 9619 if (isWord(inst)) { 9620 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 9621 emitSHL_Reg_Imm_Word( 9622 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 9623 getImm(MIR_BinaryAcc.getValue(inst))); 9624 9625 } else { 9626 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 9627 emitSHL_Abs_Imm_Word( 9628 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 9629 getImm(MIR_BinaryAcc.getValue(inst))); 9630 9631 } else { 9632 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 9633 emitSHL_RegDisp_Imm_Word( 9634 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9635 getImm(MIR_BinaryAcc.getValue(inst))); 9636 9637 } else { 9638 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 9639 emitSHL_RegOff_Imm_Word( 9640 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9641 getImm(MIR_BinaryAcc.getValue(inst))); 9642 9643 } else { 9644 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 9645 emitSHL_RegIdx_Imm_Word( 9646 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9647 getImm(MIR_BinaryAcc.getValue(inst))); 9648 9649 } else { 9650 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9651 emitSHL_RegInd_Imm_Word( 9652 getBase(MIR_BinaryAcc.getResult(inst)), 9653 getImm(MIR_BinaryAcc.getValue(inst))); 9654 } 9655 } 9656 } 9657 } 9658 } 9659 9660 } else { 9661 if (isQuad(inst)) { 9662 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 9663 emitSHL_Reg_Imm_Quad( 9664 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 9665 getImm(MIR_BinaryAcc.getValue(inst))); 9666 9667 } else { 9668 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 9669 emitSHL_Abs_Imm_Quad( 9670 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 9671 getImm(MIR_BinaryAcc.getValue(inst))); 9672 9673 } else { 9674 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 9675 emitSHL_RegDisp_Imm_Quad( 9676 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9677 getImm(MIR_BinaryAcc.getValue(inst))); 9678 9679 } else { 9680 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 9681 emitSHL_RegOff_Imm_Quad( 9682 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9683 getImm(MIR_BinaryAcc.getValue(inst))); 9684 9685 } else { 9686 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 9687 emitSHL_RegIdx_Imm_Quad( 9688 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9689 getImm(MIR_BinaryAcc.getValue(inst))); 9690 9691 } else { 9692 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9693 emitSHL_RegInd_Imm_Quad( 9694 getBase(MIR_BinaryAcc.getResult(inst)), 9695 getImm(MIR_BinaryAcc.getValue(inst))); 9696 } 9697 } 9698 } 9699 } 9700 } 9701 9702 } else { 9703 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 9704 emitSHL_Reg_Imm( 9705 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 9706 getImm(MIR_BinaryAcc.getValue(inst))); 9707 9708 } else { 9709 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 9710 emitSHL_Abs_Imm( 9711 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 9712 getImm(MIR_BinaryAcc.getValue(inst))); 9713 9714 } else { 9715 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 9716 emitSHL_RegDisp_Imm( 9717 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9718 getImm(MIR_BinaryAcc.getValue(inst))); 9719 9720 } else { 9721 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 9722 emitSHL_RegOff_Imm( 9723 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9724 getImm(MIR_BinaryAcc.getValue(inst))); 9725 9726 } else { 9727 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 9728 emitSHL_RegIdx_Imm( 9729 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9730 getImm(MIR_BinaryAcc.getValue(inst))); 9731 9732 } else { 9733 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9734 emitSHL_RegInd_Imm( 9735 getBase(MIR_BinaryAcc.getResult(inst)), 9736 getImm(MIR_BinaryAcc.getValue(inst))); 9737 } 9738 } 9739 } 9740 } 9741 } 9742 } 9743 } 9744 } 9745 9746 } else { 9747 if (isByte(inst)) { 9748 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 9749 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9750 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 9751 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 9752 emitSHL_Reg_Reg_Byte( 9753 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 9754 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9755 9756 } else { 9757 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 9758 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9759 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 9760 emitSHL_Abs_Reg_Byte( 9761 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 9762 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9763 9764 } else { 9765 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 9766 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9767 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 9768 emitSHL_RegDisp_Reg_Byte( 9769 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9770 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9771 9772 } else { 9773 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 9774 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9775 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 9776 emitSHL_RegOff_Reg_Byte( 9777 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9778 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9779 9780 } else { 9781 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 9782 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9783 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 9784 emitSHL_RegIdx_Reg_Byte( 9785 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9786 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9787 9788 } else { 9789 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9790 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9791 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 9792 emitSHL_RegInd_Reg_Byte( 9793 getBase(MIR_BinaryAcc.getResult(inst)), 9794 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9795 } 9796 } 9797 } 9798 } 9799 } 9800 9801 } else { 9802 if (isWord(inst)) { 9803 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 9804 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9805 emitSHL_Reg_Reg_Word( 9806 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 9807 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9808 9809 } else { 9810 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 9811 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9812 emitSHL_Abs_Reg_Word( 9813 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 9814 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9815 9816 } else { 9817 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 9818 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9819 emitSHL_RegDisp_Reg_Word( 9820 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9821 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9822 9823 } else { 9824 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 9825 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9826 emitSHL_RegOff_Reg_Word( 9827 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9828 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9829 9830 } else { 9831 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 9832 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9833 emitSHL_RegIdx_Reg_Word( 9834 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9835 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9836 9837 } else { 9838 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9839 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9840 emitSHL_RegInd_Reg_Word( 9841 getBase(MIR_BinaryAcc.getResult(inst)), 9842 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9843 } 9844 } 9845 } 9846 } 9847 } 9848 9849 } else { 9850 if (isQuad(inst)) { 9851 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 9852 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9853 emitSHL_Reg_Reg_Quad( 9854 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 9855 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9856 9857 } else { 9858 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 9859 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9860 emitSHL_Abs_Reg_Quad( 9861 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 9862 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9863 9864 } else { 9865 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 9866 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9867 emitSHL_RegDisp_Reg_Quad( 9868 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9869 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9870 9871 } else { 9872 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 9873 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9874 emitSHL_RegOff_Reg_Quad( 9875 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9876 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9877 9878 } else { 9879 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 9880 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9881 emitSHL_RegIdx_Reg_Quad( 9882 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9883 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9884 9885 } else { 9886 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9887 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9888 emitSHL_RegInd_Reg_Quad( 9889 getBase(MIR_BinaryAcc.getResult(inst)), 9890 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9891 } 9892 } 9893 } 9894 } 9895 } 9896 9897 } else { 9898 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 9899 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9900 emitSHL_Reg_Reg( 9901 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 9902 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9903 9904 } else { 9905 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 9906 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9907 emitSHL_Abs_Reg( 9908 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 9909 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9910 9911 } else { 9912 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 9913 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9914 emitSHL_RegDisp_Reg( 9915 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9916 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9917 9918 } else { 9919 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 9920 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9921 emitSHL_RegOff_Reg( 9922 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9923 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9924 9925 } else { 9926 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 9927 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9928 emitSHL_RegIdx_Reg( 9929 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9930 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9931 9932 } else { 9933 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9934 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9935 emitSHL_RegInd_Reg( 9936 getBase(MIR_BinaryAcc.getResult(inst)), 9937 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 9938 } 9939 } 9940 } 9941 } 9942 } 9943 } 9944 } 9945 } 9946 } 9947 } 9948 9949 /** 9950 * Emit the given instruction, assuming that 9951 * it is a MIR_BinaryAcc instruction 9952 * and has a SHR operator 9953 * 9954 * @param inst the instruction to assemble 9955 */ 9956 private void doSHR(Instruction inst) { 9957 if (isImm(MIR_BinaryAcc.getValue(inst))) { 9958 if (isByte(inst)) { 9959 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 9960 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 9961 emitSHR_Reg_Imm_Byte( 9962 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 9963 getImm(MIR_BinaryAcc.getValue(inst))); 9964 9965 } else { 9966 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 9967 emitSHR_Abs_Imm_Byte( 9968 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 9969 getImm(MIR_BinaryAcc.getValue(inst))); 9970 9971 } else { 9972 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 9973 emitSHR_RegDisp_Imm_Byte( 9974 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9975 getImm(MIR_BinaryAcc.getValue(inst))); 9976 9977 } else { 9978 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 9979 emitSHR_RegOff_Imm_Byte( 9980 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9981 getImm(MIR_BinaryAcc.getValue(inst))); 9982 9983 } else { 9984 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 9985 emitSHR_RegIdx_Imm_Byte( 9986 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 9987 getImm(MIR_BinaryAcc.getValue(inst))); 9988 9989 } else { 9990 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 9991 emitSHR_RegInd_Imm_Byte( 9992 getBase(MIR_BinaryAcc.getResult(inst)), 9993 getImm(MIR_BinaryAcc.getValue(inst))); 9994 } 9995 } 9996 } 9997 } 9998 } 9999 10000 } else { 10001 if (isWord(inst)) { 10002 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 10003 emitSHR_Reg_Imm_Word( 10004 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 10005 getImm(MIR_BinaryAcc.getValue(inst))); 10006 10007 } else { 10008 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 10009 emitSHR_Abs_Imm_Word( 10010 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 10011 getImm(MIR_BinaryAcc.getValue(inst))); 10012 10013 } else { 10014 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 10015 emitSHR_RegDisp_Imm_Word( 10016 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10017 getImm(MIR_BinaryAcc.getValue(inst))); 10018 10019 } else { 10020 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 10021 emitSHR_RegOff_Imm_Word( 10022 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10023 getImm(MIR_BinaryAcc.getValue(inst))); 10024 10025 } else { 10026 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 10027 emitSHR_RegIdx_Imm_Word( 10028 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10029 getImm(MIR_BinaryAcc.getValue(inst))); 10030 10031 } else { 10032 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10033 emitSHR_RegInd_Imm_Word( 10034 getBase(MIR_BinaryAcc.getResult(inst)), 10035 getImm(MIR_BinaryAcc.getValue(inst))); 10036 } 10037 } 10038 } 10039 } 10040 } 10041 10042 } else { 10043 if (isQuad(inst)) { 10044 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 10045 emitSHR_Reg_Imm_Quad( 10046 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 10047 getImm(MIR_BinaryAcc.getValue(inst))); 10048 10049 } else { 10050 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 10051 emitSHR_Abs_Imm_Quad( 10052 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 10053 getImm(MIR_BinaryAcc.getValue(inst))); 10054 10055 } else { 10056 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 10057 emitSHR_RegDisp_Imm_Quad( 10058 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10059 getImm(MIR_BinaryAcc.getValue(inst))); 10060 10061 } else { 10062 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 10063 emitSHR_RegOff_Imm_Quad( 10064 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10065 getImm(MIR_BinaryAcc.getValue(inst))); 10066 10067 } else { 10068 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 10069 emitSHR_RegIdx_Imm_Quad( 10070 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10071 getImm(MIR_BinaryAcc.getValue(inst))); 10072 10073 } else { 10074 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10075 emitSHR_RegInd_Imm_Quad( 10076 getBase(MIR_BinaryAcc.getResult(inst)), 10077 getImm(MIR_BinaryAcc.getValue(inst))); 10078 } 10079 } 10080 } 10081 } 10082 } 10083 10084 } else { 10085 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 10086 emitSHR_Reg_Imm( 10087 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 10088 getImm(MIR_BinaryAcc.getValue(inst))); 10089 10090 } else { 10091 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 10092 emitSHR_Abs_Imm( 10093 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 10094 getImm(MIR_BinaryAcc.getValue(inst))); 10095 10096 } else { 10097 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 10098 emitSHR_RegDisp_Imm( 10099 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10100 getImm(MIR_BinaryAcc.getValue(inst))); 10101 10102 } else { 10103 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 10104 emitSHR_RegOff_Imm( 10105 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10106 getImm(MIR_BinaryAcc.getValue(inst))); 10107 10108 } else { 10109 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 10110 emitSHR_RegIdx_Imm( 10111 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10112 getImm(MIR_BinaryAcc.getValue(inst))); 10113 10114 } else { 10115 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10116 emitSHR_RegInd_Imm( 10117 getBase(MIR_BinaryAcc.getResult(inst)), 10118 getImm(MIR_BinaryAcc.getValue(inst))); 10119 } 10120 } 10121 } 10122 } 10123 } 10124 } 10125 } 10126 } 10127 10128 } else { 10129 if (isByte(inst)) { 10130 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 10131 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10132 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 10133 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 10134 emitSHR_Reg_Reg_Byte( 10135 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 10136 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10137 10138 } else { 10139 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 10140 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10141 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 10142 emitSHR_Abs_Reg_Byte( 10143 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 10144 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10145 10146 } else { 10147 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 10148 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10149 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 10150 emitSHR_RegDisp_Reg_Byte( 10151 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10152 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10153 10154 } else { 10155 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 10156 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10157 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 10158 emitSHR_RegOff_Reg_Byte( 10159 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10160 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10161 10162 } else { 10163 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 10164 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10165 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 10166 emitSHR_RegIdx_Reg_Byte( 10167 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10168 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10169 10170 } else { 10171 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10172 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10173 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 10174 emitSHR_RegInd_Reg_Byte( 10175 getBase(MIR_BinaryAcc.getResult(inst)), 10176 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10177 } 10178 } 10179 } 10180 } 10181 } 10182 10183 } else { 10184 if (isWord(inst)) { 10185 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 10186 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10187 emitSHR_Reg_Reg_Word( 10188 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 10189 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10190 10191 } else { 10192 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 10193 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10194 emitSHR_Abs_Reg_Word( 10195 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 10196 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10197 10198 } else { 10199 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 10200 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10201 emitSHR_RegDisp_Reg_Word( 10202 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10203 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10204 10205 } else { 10206 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 10207 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10208 emitSHR_RegOff_Reg_Word( 10209 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10210 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10211 10212 } else { 10213 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 10214 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10215 emitSHR_RegIdx_Reg_Word( 10216 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10217 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10218 10219 } else { 10220 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10221 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10222 emitSHR_RegInd_Reg_Word( 10223 getBase(MIR_BinaryAcc.getResult(inst)), 10224 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10225 } 10226 } 10227 } 10228 } 10229 } 10230 10231 } else { 10232 if (isQuad(inst)) { 10233 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 10234 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10235 emitSHR_Reg_Reg_Quad( 10236 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 10237 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10238 10239 } else { 10240 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 10241 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10242 emitSHR_Abs_Reg_Quad( 10243 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 10244 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10245 10246 } else { 10247 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 10248 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10249 emitSHR_RegDisp_Reg_Quad( 10250 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10251 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10252 10253 } else { 10254 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 10255 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10256 emitSHR_RegOff_Reg_Quad( 10257 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10258 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10259 10260 } else { 10261 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 10262 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10263 emitSHR_RegIdx_Reg_Quad( 10264 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10265 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10266 10267 } else { 10268 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10269 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10270 emitSHR_RegInd_Reg_Quad( 10271 getBase(MIR_BinaryAcc.getResult(inst)), 10272 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10273 } 10274 } 10275 } 10276 } 10277 } 10278 10279 } else { 10280 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 10281 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10282 emitSHR_Reg_Reg( 10283 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 10284 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10285 10286 } else { 10287 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 10288 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10289 emitSHR_Abs_Reg( 10290 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 10291 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10292 10293 } else { 10294 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 10295 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10296 emitSHR_RegDisp_Reg( 10297 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10298 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10299 10300 } else { 10301 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 10302 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10303 emitSHR_RegOff_Reg( 10304 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10305 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10306 10307 } else { 10308 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 10309 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10310 emitSHR_RegIdx_Reg( 10311 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10312 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10313 10314 } else { 10315 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10316 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10317 emitSHR_RegInd_Reg( 10318 getBase(MIR_BinaryAcc.getResult(inst)), 10319 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 10320 } 10321 } 10322 } 10323 } 10324 } 10325 } 10326 } 10327 } 10328 } 10329 } 10330 10331 /** 10332 * Emit the given instruction, assuming that 10333 * it is a MIR_BinaryAcc instruction 10334 * and has a CMPNLESS operator 10335 * 10336 * @param inst the instruction to assemble 10337 */ 10338 private void doCMPNLESS(Instruction inst) { 10339 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 10340 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10341 emitCMPNLESS_Reg_Reg( 10342 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 10343 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 10344 10345 } else { 10346 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 10347 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10348 emitCMPNLESS_Reg_Abs( 10349 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 10350 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 10351 10352 } else { 10353 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 10354 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10355 emitCMPNLESS_Reg_RegDisp( 10356 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 10357 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 10358 10359 } else { 10360 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 10361 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10362 emitCMPNLESS_Reg_RegOff( 10363 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 10364 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 10365 10366 } else { 10367 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 10368 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10369 emitCMPNLESS_Reg_RegIdx( 10370 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 10371 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 10372 10373 } else { 10374 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10375 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10376 emitCMPNLESS_Reg_RegInd( 10377 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 10378 getBase(MIR_BinaryAcc.getValue(inst))); 10379 } 10380 } 10381 } 10382 } 10383 } 10384 } 10385 10386 /** 10387 * Emit the given instruction, assuming that 10388 * it is a MIR_FSave instruction 10389 * and has a FNSAVE operator 10390 * 10391 * @param inst the instruction to assemble 10392 */ 10393 private void doFNSAVE(Instruction inst) { 10394 if (isAbs(MIR_FSave.getDestination(inst))) { 10395 emitFNSAVE_Abs( 10396 getDisp(MIR_FSave.getDestination(inst)).toWord().toAddress()); 10397 10398 } else { 10399 if (isRegDisp(MIR_FSave.getDestination(inst))) { 10400 emitFNSAVE_RegDisp( 10401 getBase(MIR_FSave.getDestination(inst)), getDisp(MIR_FSave.getDestination(inst))); 10402 10403 } else { 10404 if (isRegOff(MIR_FSave.getDestination(inst))) { 10405 emitFNSAVE_RegOff( 10406 getIndex(MIR_FSave.getDestination(inst)), getScale(MIR_FSave.getDestination(inst)), getDisp(MIR_FSave.getDestination(inst))); 10407 10408 } else { 10409 if (isRegIdx(MIR_FSave.getDestination(inst))) { 10410 emitFNSAVE_RegIdx( 10411 getBase(MIR_FSave.getDestination(inst)), getIndex(MIR_FSave.getDestination(inst)), getScale(MIR_FSave.getDestination(inst)), getDisp(MIR_FSave.getDestination(inst))); 10412 10413 } else { 10414 if (VM.VerifyAssertions && !isRegInd(MIR_FSave.getDestination(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10415 emitFNSAVE_RegInd( 10416 getBase(MIR_FSave.getDestination(inst))); 10417 } 10418 } 10419 } 10420 } 10421 } 10422 10423 /** 10424 * Emit the given instruction, assuming that 10425 * it is a MIR_Multiply instruction 10426 * and has a MUL operator 10427 * 10428 * @param inst the instruction to assemble 10429 */ 10430 private void doMUL(Instruction inst) { 10431 if (isQuad(inst)) { 10432 if (isGPR_Reg(MIR_Multiply.getValue(inst))) { 10433 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10434 emitMUL_Reg_Reg_Quad( 10435 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10436 getGPR_Reg(MIR_Multiply.getValue(inst))); 10437 10438 } else { 10439 if (isAbs(MIR_Multiply.getValue(inst))) { 10440 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10441 emitMUL_Reg_Abs_Quad( 10442 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10443 getDisp(MIR_Multiply.getValue(inst)).toWord().toAddress()); 10444 10445 } else { 10446 if (isRegDisp(MIR_Multiply.getValue(inst))) { 10447 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10448 emitMUL_Reg_RegDisp_Quad( 10449 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10450 getBase(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 10451 10452 } else { 10453 if (isRegOff(MIR_Multiply.getValue(inst))) { 10454 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10455 emitMUL_Reg_RegOff_Quad( 10456 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10457 getIndex(MIR_Multiply.getValue(inst)), getScale(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 10458 10459 } else { 10460 if (isRegIdx(MIR_Multiply.getValue(inst))) { 10461 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10462 emitMUL_Reg_RegIdx_Quad( 10463 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10464 getBase(MIR_Multiply.getValue(inst)), getIndex(MIR_Multiply.getValue(inst)), getScale(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 10465 10466 } else { 10467 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10468 if (VM.VerifyAssertions && !isRegInd(MIR_Multiply.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10469 emitMUL_Reg_RegInd_Quad( 10470 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10471 getBase(MIR_Multiply.getValue(inst))); 10472 } 10473 } 10474 } 10475 } 10476 } 10477 10478 } else { 10479 if (isGPR_Reg(MIR_Multiply.getValue(inst))) { 10480 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10481 emitMUL_Reg_Reg( 10482 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10483 getGPR_Reg(MIR_Multiply.getValue(inst))); 10484 10485 } else { 10486 if (isAbs(MIR_Multiply.getValue(inst))) { 10487 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10488 emitMUL_Reg_Abs( 10489 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10490 getDisp(MIR_Multiply.getValue(inst)).toWord().toAddress()); 10491 10492 } else { 10493 if (isRegDisp(MIR_Multiply.getValue(inst))) { 10494 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10495 emitMUL_Reg_RegDisp( 10496 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10497 getBase(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 10498 10499 } else { 10500 if (isRegOff(MIR_Multiply.getValue(inst))) { 10501 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10502 emitMUL_Reg_RegOff( 10503 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10504 getIndex(MIR_Multiply.getValue(inst)), getScale(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 10505 10506 } else { 10507 if (isRegIdx(MIR_Multiply.getValue(inst))) { 10508 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10509 emitMUL_Reg_RegIdx( 10510 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10511 getBase(MIR_Multiply.getValue(inst)), getIndex(MIR_Multiply.getValue(inst)), getScale(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 10512 10513 } else { 10514 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10515 if (VM.VerifyAssertions && !isRegInd(MIR_Multiply.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10516 emitMUL_Reg_RegInd( 10517 getGPR_Reg(MIR_Multiply.getResult2(inst)), 10518 getBase(MIR_Multiply.getValue(inst))); 10519 } 10520 } 10521 } 10522 } 10523 } 10524 } 10525 } 10526 10527 /** 10528 * Emit the given instruction, assuming that 10529 * it is a MIR_UnaryAcc instruction 10530 * and has a FCHS operator 10531 * 10532 * @param inst the instruction to assemble 10533 */ 10534 private void doFCHS(Instruction inst) { 10535 emitFCHS(); 10536 } 10537 10538 /** 10539 * Emit the given instruction, assuming that 10540 * it is a MIR_Empty instruction 10541 * and has a FINIT operator 10542 * 10543 * @param inst the instruction to assemble 10544 */ 10545 private void doFINIT(Instruction inst) { 10546 emitFINIT(); 10547 } 10548 10549 /** 10550 * Emit the given instruction, assuming that 10551 * it is a MIR_Divide instruction 10552 * and has a IDIV operator 10553 * 10554 * @param inst the instruction to assemble 10555 */ 10556 private void doIDIV(Instruction inst) { 10557 if (isQuad(inst)) { 10558 if (isGPR_Reg(MIR_Divide.getValue(inst))) { 10559 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10560 emitIDIV_Reg_Reg_Quad( 10561 getGPR_Reg(MIR_Divide.getResult2(inst)), 10562 getGPR_Reg(MIR_Divide.getValue(inst))); 10563 10564 } else { 10565 if (isAbs(MIR_Divide.getValue(inst))) { 10566 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10567 emitIDIV_Reg_Abs_Quad( 10568 getGPR_Reg(MIR_Divide.getResult2(inst)), 10569 getDisp(MIR_Divide.getValue(inst)).toWord().toAddress()); 10570 10571 } else { 10572 if (isRegDisp(MIR_Divide.getValue(inst))) { 10573 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10574 emitIDIV_Reg_RegDisp_Quad( 10575 getGPR_Reg(MIR_Divide.getResult2(inst)), 10576 getBase(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 10577 10578 } else { 10579 if (isRegOff(MIR_Divide.getValue(inst))) { 10580 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10581 emitIDIV_Reg_RegOff_Quad( 10582 getGPR_Reg(MIR_Divide.getResult2(inst)), 10583 getIndex(MIR_Divide.getValue(inst)), getScale(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 10584 10585 } else { 10586 if (isRegIdx(MIR_Divide.getValue(inst))) { 10587 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10588 emitIDIV_Reg_RegIdx_Quad( 10589 getGPR_Reg(MIR_Divide.getResult2(inst)), 10590 getBase(MIR_Divide.getValue(inst)), getIndex(MIR_Divide.getValue(inst)), getScale(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 10591 10592 } else { 10593 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10594 if (VM.VerifyAssertions && !isRegInd(MIR_Divide.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10595 emitIDIV_Reg_RegInd_Quad( 10596 getGPR_Reg(MIR_Divide.getResult2(inst)), 10597 getBase(MIR_Divide.getValue(inst))); 10598 } 10599 } 10600 } 10601 } 10602 } 10603 10604 } else { 10605 if (isGPR_Reg(MIR_Divide.getValue(inst))) { 10606 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10607 emitIDIV_Reg_Reg( 10608 getGPR_Reg(MIR_Divide.getResult2(inst)), 10609 getGPR_Reg(MIR_Divide.getValue(inst))); 10610 10611 } else { 10612 if (isAbs(MIR_Divide.getValue(inst))) { 10613 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10614 emitIDIV_Reg_Abs( 10615 getGPR_Reg(MIR_Divide.getResult2(inst)), 10616 getDisp(MIR_Divide.getValue(inst)).toWord().toAddress()); 10617 10618 } else { 10619 if (isRegDisp(MIR_Divide.getValue(inst))) { 10620 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10621 emitIDIV_Reg_RegDisp( 10622 getGPR_Reg(MIR_Divide.getResult2(inst)), 10623 getBase(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 10624 10625 } else { 10626 if (isRegOff(MIR_Divide.getValue(inst))) { 10627 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10628 emitIDIV_Reg_RegOff( 10629 getGPR_Reg(MIR_Divide.getResult2(inst)), 10630 getIndex(MIR_Divide.getValue(inst)), getScale(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 10631 10632 } else { 10633 if (isRegIdx(MIR_Divide.getValue(inst))) { 10634 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10635 emitIDIV_Reg_RegIdx( 10636 getGPR_Reg(MIR_Divide.getResult2(inst)), 10637 getBase(MIR_Divide.getValue(inst)), getIndex(MIR_Divide.getValue(inst)), getScale(MIR_Divide.getValue(inst)), getDisp(MIR_Divide.getValue(inst))); 10638 10639 } else { 10640 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Divide.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10641 if (VM.VerifyAssertions && !isRegInd(MIR_Divide.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10642 emitIDIV_Reg_RegInd( 10643 getGPR_Reg(MIR_Divide.getResult2(inst)), 10644 getBase(MIR_Divide.getValue(inst))); 10645 } 10646 } 10647 } 10648 } 10649 } 10650 } 10651 } 10652 10653 /** 10654 * Emit the given instruction, assuming that 10655 * it is a MIR_DoubleShift instruction 10656 * and has a SHLD operator 10657 * 10658 * @param inst the instruction to assemble 10659 */ 10660 private void doSHLD(Instruction inst) { 10661 if (isQuad(inst)) { 10662 if (isImm(MIR_DoubleShift.getBitsToShift(inst))) { 10663 if (isGPR_Reg(MIR_DoubleShift.getResult(inst))) { 10664 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10665 emitSHLD_Reg_Reg_Imm_Quad( 10666 getGPR_Reg(MIR_DoubleShift.getResult(inst)), 10667 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10668 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10669 10670 } else { 10671 if (isAbs(MIR_DoubleShift.getResult(inst))) { 10672 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10673 emitSHLD_Abs_Reg_Imm_Quad( 10674 getDisp(MIR_DoubleShift.getResult(inst)).toWord().toAddress(), 10675 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10676 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10677 10678 } else { 10679 if (isRegDisp(MIR_DoubleShift.getResult(inst))) { 10680 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10681 emitSHLD_RegDisp_Reg_Imm_Quad( 10682 getBase(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10683 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10684 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10685 10686 } else { 10687 if (isRegOff(MIR_DoubleShift.getResult(inst))) { 10688 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10689 emitSHLD_RegOff_Reg_Imm_Quad( 10690 getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10691 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10692 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10693 10694 } else { 10695 if (isRegIdx(MIR_DoubleShift.getResult(inst))) { 10696 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10697 emitSHLD_RegIdx_Reg_Imm_Quad( 10698 getBase(MIR_DoubleShift.getResult(inst)), getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10699 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10700 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10701 10702 } else { 10703 if (VM.VerifyAssertions && !isRegInd(MIR_DoubleShift.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10704 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10705 emitSHLD_RegInd_Reg_Imm_Quad( 10706 getBase(MIR_DoubleShift.getResult(inst)), 10707 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10708 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10709 } 10710 } 10711 } 10712 } 10713 } 10714 10715 } else { 10716 if (isGPR_Reg(MIR_DoubleShift.getResult(inst))) { 10717 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10718 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10719 emitSHLD_Reg_Reg_Reg_Quad( 10720 getGPR_Reg(MIR_DoubleShift.getResult(inst)), 10721 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10722 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10723 10724 } else { 10725 if (isAbs(MIR_DoubleShift.getResult(inst))) { 10726 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10727 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10728 emitSHLD_Abs_Reg_Reg_Quad( 10729 getDisp(MIR_DoubleShift.getResult(inst)).toWord().toAddress(), 10730 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10731 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10732 10733 } else { 10734 if (isRegDisp(MIR_DoubleShift.getResult(inst))) { 10735 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10736 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10737 emitSHLD_RegDisp_Reg_Reg_Quad( 10738 getBase(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10739 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10740 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10741 10742 } else { 10743 if (isRegOff(MIR_DoubleShift.getResult(inst))) { 10744 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10745 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10746 emitSHLD_RegOff_Reg_Reg_Quad( 10747 getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10748 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10749 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10750 10751 } else { 10752 if (isRegIdx(MIR_DoubleShift.getResult(inst))) { 10753 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10754 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10755 emitSHLD_RegIdx_Reg_Reg_Quad( 10756 getBase(MIR_DoubleShift.getResult(inst)), getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10757 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10758 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10759 10760 } else { 10761 if (VM.VerifyAssertions && !isRegInd(MIR_DoubleShift.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10762 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10763 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10764 emitSHLD_RegInd_Reg_Reg_Quad( 10765 getBase(MIR_DoubleShift.getResult(inst)), 10766 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10767 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10768 } 10769 } 10770 } 10771 } 10772 } 10773 } 10774 10775 } else { 10776 if (isImm(MIR_DoubleShift.getBitsToShift(inst))) { 10777 if (isGPR_Reg(MIR_DoubleShift.getResult(inst))) { 10778 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10779 emitSHLD_Reg_Reg_Imm( 10780 getGPR_Reg(MIR_DoubleShift.getResult(inst)), 10781 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10782 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10783 10784 } else { 10785 if (isAbs(MIR_DoubleShift.getResult(inst))) { 10786 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10787 emitSHLD_Abs_Reg_Imm( 10788 getDisp(MIR_DoubleShift.getResult(inst)).toWord().toAddress(), 10789 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10790 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10791 10792 } else { 10793 if (isRegDisp(MIR_DoubleShift.getResult(inst))) { 10794 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10795 emitSHLD_RegDisp_Reg_Imm( 10796 getBase(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10797 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10798 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10799 10800 } else { 10801 if (isRegOff(MIR_DoubleShift.getResult(inst))) { 10802 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10803 emitSHLD_RegOff_Reg_Imm( 10804 getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10805 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10806 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10807 10808 } else { 10809 if (isRegIdx(MIR_DoubleShift.getResult(inst))) { 10810 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10811 emitSHLD_RegIdx_Reg_Imm( 10812 getBase(MIR_DoubleShift.getResult(inst)), getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10813 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10814 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10815 10816 } else { 10817 if (VM.VerifyAssertions && !isRegInd(MIR_DoubleShift.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10818 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10819 emitSHLD_RegInd_Reg_Imm( 10820 getBase(MIR_DoubleShift.getResult(inst)), 10821 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10822 getImm(MIR_DoubleShift.getBitsToShift(inst))); 10823 } 10824 } 10825 } 10826 } 10827 } 10828 10829 } else { 10830 if (isGPR_Reg(MIR_DoubleShift.getResult(inst))) { 10831 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10832 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10833 emitSHLD_Reg_Reg_Reg( 10834 getGPR_Reg(MIR_DoubleShift.getResult(inst)), 10835 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10836 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10837 10838 } else { 10839 if (isAbs(MIR_DoubleShift.getResult(inst))) { 10840 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10841 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10842 emitSHLD_Abs_Reg_Reg( 10843 getDisp(MIR_DoubleShift.getResult(inst)).toWord().toAddress(), 10844 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10845 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10846 10847 } else { 10848 if (isRegDisp(MIR_DoubleShift.getResult(inst))) { 10849 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10850 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10851 emitSHLD_RegDisp_Reg_Reg( 10852 getBase(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10853 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10854 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10855 10856 } else { 10857 if (isRegOff(MIR_DoubleShift.getResult(inst))) { 10858 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10859 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10860 emitSHLD_RegOff_Reg_Reg( 10861 getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10862 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10863 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10864 10865 } else { 10866 if (isRegIdx(MIR_DoubleShift.getResult(inst))) { 10867 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10868 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10869 emitSHLD_RegIdx_Reg_Reg( 10870 getBase(MIR_DoubleShift.getResult(inst)), getIndex(MIR_DoubleShift.getResult(inst)), getScale(MIR_DoubleShift.getResult(inst)), getDisp(MIR_DoubleShift.getResult(inst)), 10871 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10872 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10873 10874 } else { 10875 if (VM.VerifyAssertions && !isRegInd(MIR_DoubleShift.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10876 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getSource(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10877 if (VM.VerifyAssertions && !isGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10878 emitSHLD_RegInd_Reg_Reg( 10879 getBase(MIR_DoubleShift.getResult(inst)), 10880 getGPR_Reg(MIR_DoubleShift.getSource(inst)), 10881 getGPR_Reg(MIR_DoubleShift.getBitsToShift(inst))); 10882 } 10883 } 10884 } 10885 } 10886 } 10887 } 10888 } 10889 } 10890 10891 /** 10892 * Emit the given instruction, assuming that 10893 * it is a MIR_Nullary instruction 10894 * and has a FFREEP operator 10895 * 10896 * @param inst the instruction to assemble 10897 */ 10898 private void doFFREEP(Instruction inst) { 10899 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10900 emitFFREEP_Reg( 10901 getFPR_Reg(MIR_Nullary.getResult(inst))); 10902 } 10903 10904 /** 10905 * Emit the given instruction, assuming that 10906 * it is a MIR_Compare instruction 10907 * and has a UCOMISD operator 10908 * 10909 * @param inst the instruction to assemble 10910 */ 10911 private void doUCOMISD(Instruction inst) { 10912 if (isXMM_Reg(MIR_Compare.getVal2(inst))) { 10913 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10914 emitUCOMISD_Reg_Reg( 10915 getXMM_Reg(MIR_Compare.getVal1(inst)), 10916 getXMM_Reg(MIR_Compare.getVal2(inst))); 10917 10918 } else { 10919 if (isAbs(MIR_Compare.getVal2(inst))) { 10920 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10921 emitUCOMISD_Reg_Abs( 10922 getXMM_Reg(MIR_Compare.getVal1(inst)), 10923 getDisp(MIR_Compare.getVal2(inst)).toWord().toAddress()); 10924 10925 } else { 10926 if (isRegDisp(MIR_Compare.getVal2(inst))) { 10927 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10928 emitUCOMISD_Reg_RegDisp( 10929 getXMM_Reg(MIR_Compare.getVal1(inst)), 10930 getBase(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 10931 10932 } else { 10933 if (isRegOff(MIR_Compare.getVal2(inst))) { 10934 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10935 emitUCOMISD_Reg_RegOff( 10936 getXMM_Reg(MIR_Compare.getVal1(inst)), 10937 getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 10938 10939 } else { 10940 if (isRegIdx(MIR_Compare.getVal2(inst))) { 10941 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10942 emitUCOMISD_Reg_RegIdx( 10943 getXMM_Reg(MIR_Compare.getVal1(inst)), 10944 getBase(MIR_Compare.getVal2(inst)), getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 10945 10946 } else { 10947 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10948 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 10949 emitUCOMISD_Reg_RegInd( 10950 getXMM_Reg(MIR_Compare.getVal1(inst)), 10951 getBase(MIR_Compare.getVal2(inst))); 10952 } 10953 } 10954 } 10955 } 10956 } 10957 } 10958 10959 /** 10960 * Emit the given instruction, assuming that 10961 * it is a MIR_BinaryAcc instruction 10962 * and has a ROL operator 10963 * 10964 * @param inst the instruction to assemble 10965 */ 10966 private void doROL(Instruction inst) { 10967 if (isImm(MIR_BinaryAcc.getValue(inst))) { 10968 if (isByte(inst)) { 10969 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 10970 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 10971 emitROL_Reg_Imm_Byte( 10972 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 10973 getImm(MIR_BinaryAcc.getValue(inst))); 10974 10975 } else { 10976 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 10977 emitROL_Abs_Imm_Byte( 10978 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 10979 getImm(MIR_BinaryAcc.getValue(inst))); 10980 10981 } else { 10982 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 10983 emitROL_RegDisp_Imm_Byte( 10984 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10985 getImm(MIR_BinaryAcc.getValue(inst))); 10986 10987 } else { 10988 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 10989 emitROL_RegOff_Imm_Byte( 10990 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10991 getImm(MIR_BinaryAcc.getValue(inst))); 10992 10993 } else { 10994 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 10995 emitROL_RegIdx_Imm_Byte( 10996 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 10997 getImm(MIR_BinaryAcc.getValue(inst))); 10998 10999 } else { 11000 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11001 emitROL_RegInd_Imm_Byte( 11002 getBase(MIR_BinaryAcc.getResult(inst)), 11003 getImm(MIR_BinaryAcc.getValue(inst))); 11004 } 11005 } 11006 } 11007 } 11008 } 11009 11010 } else { 11011 if (isWord(inst)) { 11012 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11013 emitROL_Reg_Imm_Word( 11014 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11015 getImm(MIR_BinaryAcc.getValue(inst))); 11016 11017 } else { 11018 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11019 emitROL_Abs_Imm_Word( 11020 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11021 getImm(MIR_BinaryAcc.getValue(inst))); 11022 11023 } else { 11024 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11025 emitROL_RegDisp_Imm_Word( 11026 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11027 getImm(MIR_BinaryAcc.getValue(inst))); 11028 11029 } else { 11030 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11031 emitROL_RegOff_Imm_Word( 11032 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11033 getImm(MIR_BinaryAcc.getValue(inst))); 11034 11035 } else { 11036 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11037 emitROL_RegIdx_Imm_Word( 11038 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11039 getImm(MIR_BinaryAcc.getValue(inst))); 11040 11041 } else { 11042 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11043 emitROL_RegInd_Imm_Word( 11044 getBase(MIR_BinaryAcc.getResult(inst)), 11045 getImm(MIR_BinaryAcc.getValue(inst))); 11046 } 11047 } 11048 } 11049 } 11050 } 11051 11052 } else { 11053 if (isQuad(inst)) { 11054 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11055 emitROL_Reg_Imm_Quad( 11056 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11057 getImm(MIR_BinaryAcc.getValue(inst))); 11058 11059 } else { 11060 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11061 emitROL_Abs_Imm_Quad( 11062 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11063 getImm(MIR_BinaryAcc.getValue(inst))); 11064 11065 } else { 11066 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11067 emitROL_RegDisp_Imm_Quad( 11068 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11069 getImm(MIR_BinaryAcc.getValue(inst))); 11070 11071 } else { 11072 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11073 emitROL_RegOff_Imm_Quad( 11074 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11075 getImm(MIR_BinaryAcc.getValue(inst))); 11076 11077 } else { 11078 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11079 emitROL_RegIdx_Imm_Quad( 11080 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11081 getImm(MIR_BinaryAcc.getValue(inst))); 11082 11083 } else { 11084 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11085 emitROL_RegInd_Imm_Quad( 11086 getBase(MIR_BinaryAcc.getResult(inst)), 11087 getImm(MIR_BinaryAcc.getValue(inst))); 11088 } 11089 } 11090 } 11091 } 11092 } 11093 11094 } else { 11095 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11096 emitROL_Reg_Imm( 11097 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11098 getImm(MIR_BinaryAcc.getValue(inst))); 11099 11100 } else { 11101 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11102 emitROL_Abs_Imm( 11103 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11104 getImm(MIR_BinaryAcc.getValue(inst))); 11105 11106 } else { 11107 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11108 emitROL_RegDisp_Imm( 11109 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11110 getImm(MIR_BinaryAcc.getValue(inst))); 11111 11112 } else { 11113 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11114 emitROL_RegOff_Imm( 11115 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11116 getImm(MIR_BinaryAcc.getValue(inst))); 11117 11118 } else { 11119 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11120 emitROL_RegIdx_Imm( 11121 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11122 getImm(MIR_BinaryAcc.getValue(inst))); 11123 11124 } else { 11125 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11126 emitROL_RegInd_Imm( 11127 getBase(MIR_BinaryAcc.getResult(inst)), 11128 getImm(MIR_BinaryAcc.getValue(inst))); 11129 } 11130 } 11131 } 11132 } 11133 } 11134 } 11135 } 11136 } 11137 11138 } else { 11139 if (isByte(inst)) { 11140 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11141 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11142 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 11143 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11144 emitROL_Reg_Reg_Byte( 11145 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11146 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11147 11148 } else { 11149 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11150 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11151 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11152 emitROL_Abs_Reg_Byte( 11153 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11154 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11155 11156 } else { 11157 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11158 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11159 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11160 emitROL_RegDisp_Reg_Byte( 11161 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11162 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11163 11164 } else { 11165 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11166 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11167 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11168 emitROL_RegOff_Reg_Byte( 11169 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11170 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11171 11172 } else { 11173 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11174 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11175 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11176 emitROL_RegIdx_Reg_Byte( 11177 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11178 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11179 11180 } else { 11181 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11182 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11183 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11184 emitROL_RegInd_Reg_Byte( 11185 getBase(MIR_BinaryAcc.getResult(inst)), 11186 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11187 } 11188 } 11189 } 11190 } 11191 } 11192 11193 } else { 11194 if (isWord(inst)) { 11195 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11196 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11197 emitROL_Reg_Reg_Word( 11198 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11199 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11200 11201 } else { 11202 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11203 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11204 emitROL_Abs_Reg_Word( 11205 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11206 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11207 11208 } else { 11209 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11210 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11211 emitROL_RegDisp_Reg_Word( 11212 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11213 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11214 11215 } else { 11216 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11217 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11218 emitROL_RegOff_Reg_Word( 11219 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11220 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11221 11222 } else { 11223 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11224 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11225 emitROL_RegIdx_Reg_Word( 11226 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11227 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11228 11229 } else { 11230 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11231 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11232 emitROL_RegInd_Reg_Word( 11233 getBase(MIR_BinaryAcc.getResult(inst)), 11234 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11235 } 11236 } 11237 } 11238 } 11239 } 11240 11241 } else { 11242 if (isQuad(inst)) { 11243 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11244 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11245 emitROL_Reg_Reg_Quad( 11246 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11247 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11248 11249 } else { 11250 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11251 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11252 emitROL_Abs_Reg_Quad( 11253 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11254 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11255 11256 } else { 11257 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11258 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11259 emitROL_RegDisp_Reg_Quad( 11260 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11261 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11262 11263 } else { 11264 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11265 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11266 emitROL_RegOff_Reg_Quad( 11267 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11268 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11269 11270 } else { 11271 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11272 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11273 emitROL_RegIdx_Reg_Quad( 11274 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11275 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11276 11277 } else { 11278 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11279 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11280 emitROL_RegInd_Reg_Quad( 11281 getBase(MIR_BinaryAcc.getResult(inst)), 11282 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11283 } 11284 } 11285 } 11286 } 11287 } 11288 11289 } else { 11290 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11291 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11292 emitROL_Reg_Reg( 11293 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11294 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11295 11296 } else { 11297 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11298 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11299 emitROL_Abs_Reg( 11300 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11301 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11302 11303 } else { 11304 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11305 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11306 emitROL_RegDisp_Reg( 11307 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11308 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11309 11310 } else { 11311 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11312 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11313 emitROL_RegOff_Reg( 11314 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11315 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11316 11317 } else { 11318 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11319 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11320 emitROL_RegIdx_Reg( 11321 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11322 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11323 11324 } else { 11325 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11326 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11327 emitROL_RegInd_Reg( 11328 getBase(MIR_BinaryAcc.getResult(inst)), 11329 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11330 } 11331 } 11332 } 11333 } 11334 } 11335 } 11336 } 11337 } 11338 } 11339 } 11340 11341 /** 11342 * Emit the given instruction, assuming that 11343 * it is a MIR_UnaryAcc instruction 11344 * and has a NOT operator 11345 * 11346 * @param inst the instruction to assemble 11347 */ 11348 private void doNOT(Instruction inst) { 11349 if (isByte(inst)) { 11350 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 11351 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_UnaryAcc.getResult(inst)).isValidAs8bitRegister()); 11352 emitNOT_Reg_Byte( 11353 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 11354 11355 } else { 11356 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 11357 emitNOT_Abs_Byte( 11358 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 11359 11360 } else { 11361 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 11362 emitNOT_RegDisp_Byte( 11363 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11364 11365 } else { 11366 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 11367 emitNOT_RegOff_Byte( 11368 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11369 11370 } else { 11371 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 11372 emitNOT_RegIdx_Byte( 11373 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11374 11375 } else { 11376 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11377 emitNOT_RegInd_Byte( 11378 getBase(MIR_UnaryAcc.getResult(inst))); 11379 } 11380 } 11381 } 11382 } 11383 } 11384 11385 } else { 11386 if (isWord(inst)) { 11387 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 11388 emitNOT_Reg_Word( 11389 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 11390 11391 } else { 11392 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 11393 emitNOT_Abs_Word( 11394 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 11395 11396 } else { 11397 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 11398 emitNOT_RegDisp_Word( 11399 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11400 11401 } else { 11402 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 11403 emitNOT_RegOff_Word( 11404 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11405 11406 } else { 11407 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 11408 emitNOT_RegIdx_Word( 11409 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11410 11411 } else { 11412 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11413 emitNOT_RegInd_Word( 11414 getBase(MIR_UnaryAcc.getResult(inst))); 11415 } 11416 } 11417 } 11418 } 11419 } 11420 11421 } else { 11422 if (isQuad(inst)) { 11423 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 11424 emitNOT_Reg_Quad( 11425 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 11426 11427 } else { 11428 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 11429 emitNOT_Abs_Quad( 11430 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 11431 11432 } else { 11433 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 11434 emitNOT_RegDisp_Quad( 11435 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11436 11437 } else { 11438 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 11439 emitNOT_RegOff_Quad( 11440 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11441 11442 } else { 11443 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 11444 emitNOT_RegIdx_Quad( 11445 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11446 11447 } else { 11448 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11449 emitNOT_RegInd_Quad( 11450 getBase(MIR_UnaryAcc.getResult(inst))); 11451 } 11452 } 11453 } 11454 } 11455 } 11456 11457 } else { 11458 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 11459 emitNOT_Reg( 11460 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 11461 11462 } else { 11463 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 11464 emitNOT_Abs( 11465 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 11466 11467 } else { 11468 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 11469 emitNOT_RegDisp( 11470 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11471 11472 } else { 11473 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 11474 emitNOT_RegOff( 11475 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11476 11477 } else { 11478 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 11479 emitNOT_RegIdx( 11480 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 11481 11482 } else { 11483 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11484 emitNOT_RegInd( 11485 getBase(MIR_UnaryAcc.getResult(inst))); 11486 } 11487 } 11488 } 11489 } 11490 } 11491 } 11492 } 11493 } 11494 } 11495 11496 /** 11497 * Emit the given instruction, assuming that 11498 * it is a MIR_BinaryAcc instruction 11499 * and has a ROR operator 11500 * 11501 * @param inst the instruction to assemble 11502 */ 11503 private void doROR(Instruction inst) { 11504 if (isImm(MIR_BinaryAcc.getValue(inst))) { 11505 if (isByte(inst)) { 11506 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11507 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 11508 emitROR_Reg_Imm_Byte( 11509 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11510 getImm(MIR_BinaryAcc.getValue(inst))); 11511 11512 } else { 11513 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11514 emitROR_Abs_Imm_Byte( 11515 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11516 getImm(MIR_BinaryAcc.getValue(inst))); 11517 11518 } else { 11519 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11520 emitROR_RegDisp_Imm_Byte( 11521 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11522 getImm(MIR_BinaryAcc.getValue(inst))); 11523 11524 } else { 11525 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11526 emitROR_RegOff_Imm_Byte( 11527 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11528 getImm(MIR_BinaryAcc.getValue(inst))); 11529 11530 } else { 11531 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11532 emitROR_RegIdx_Imm_Byte( 11533 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11534 getImm(MIR_BinaryAcc.getValue(inst))); 11535 11536 } else { 11537 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11538 emitROR_RegInd_Imm_Byte( 11539 getBase(MIR_BinaryAcc.getResult(inst)), 11540 getImm(MIR_BinaryAcc.getValue(inst))); 11541 } 11542 } 11543 } 11544 } 11545 } 11546 11547 } else { 11548 if (isWord(inst)) { 11549 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11550 emitROR_Reg_Imm_Word( 11551 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11552 getImm(MIR_BinaryAcc.getValue(inst))); 11553 11554 } else { 11555 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11556 emitROR_Abs_Imm_Word( 11557 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11558 getImm(MIR_BinaryAcc.getValue(inst))); 11559 11560 } else { 11561 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11562 emitROR_RegDisp_Imm_Word( 11563 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11564 getImm(MIR_BinaryAcc.getValue(inst))); 11565 11566 } else { 11567 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11568 emitROR_RegOff_Imm_Word( 11569 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11570 getImm(MIR_BinaryAcc.getValue(inst))); 11571 11572 } else { 11573 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11574 emitROR_RegIdx_Imm_Word( 11575 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11576 getImm(MIR_BinaryAcc.getValue(inst))); 11577 11578 } else { 11579 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11580 emitROR_RegInd_Imm_Word( 11581 getBase(MIR_BinaryAcc.getResult(inst)), 11582 getImm(MIR_BinaryAcc.getValue(inst))); 11583 } 11584 } 11585 } 11586 } 11587 } 11588 11589 } else { 11590 if (isQuad(inst)) { 11591 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11592 emitROR_Reg_Imm_Quad( 11593 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11594 getImm(MIR_BinaryAcc.getValue(inst))); 11595 11596 } else { 11597 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11598 emitROR_Abs_Imm_Quad( 11599 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11600 getImm(MIR_BinaryAcc.getValue(inst))); 11601 11602 } else { 11603 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11604 emitROR_RegDisp_Imm_Quad( 11605 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11606 getImm(MIR_BinaryAcc.getValue(inst))); 11607 11608 } else { 11609 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11610 emitROR_RegOff_Imm_Quad( 11611 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11612 getImm(MIR_BinaryAcc.getValue(inst))); 11613 11614 } else { 11615 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11616 emitROR_RegIdx_Imm_Quad( 11617 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11618 getImm(MIR_BinaryAcc.getValue(inst))); 11619 11620 } else { 11621 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11622 emitROR_RegInd_Imm_Quad( 11623 getBase(MIR_BinaryAcc.getResult(inst)), 11624 getImm(MIR_BinaryAcc.getValue(inst))); 11625 } 11626 } 11627 } 11628 } 11629 } 11630 11631 } else { 11632 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11633 emitROR_Reg_Imm( 11634 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11635 getImm(MIR_BinaryAcc.getValue(inst))); 11636 11637 } else { 11638 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11639 emitROR_Abs_Imm( 11640 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11641 getImm(MIR_BinaryAcc.getValue(inst))); 11642 11643 } else { 11644 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11645 emitROR_RegDisp_Imm( 11646 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11647 getImm(MIR_BinaryAcc.getValue(inst))); 11648 11649 } else { 11650 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11651 emitROR_RegOff_Imm( 11652 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11653 getImm(MIR_BinaryAcc.getValue(inst))); 11654 11655 } else { 11656 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11657 emitROR_RegIdx_Imm( 11658 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11659 getImm(MIR_BinaryAcc.getValue(inst))); 11660 11661 } else { 11662 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11663 emitROR_RegInd_Imm( 11664 getBase(MIR_BinaryAcc.getResult(inst)), 11665 getImm(MIR_BinaryAcc.getValue(inst))); 11666 } 11667 } 11668 } 11669 } 11670 } 11671 } 11672 } 11673 } 11674 11675 } else { 11676 if (isByte(inst)) { 11677 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11678 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11679 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 11680 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11681 emitROR_Reg_Reg_Byte( 11682 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11683 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11684 11685 } else { 11686 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11687 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11688 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11689 emitROR_Abs_Reg_Byte( 11690 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11691 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11692 11693 } else { 11694 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11695 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11696 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11697 emitROR_RegDisp_Reg_Byte( 11698 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11699 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11700 11701 } else { 11702 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11703 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11704 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11705 emitROR_RegOff_Reg_Byte( 11706 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11707 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11708 11709 } else { 11710 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11711 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11712 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11713 emitROR_RegIdx_Reg_Byte( 11714 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11715 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11716 11717 } else { 11718 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11719 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11720 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 11721 emitROR_RegInd_Reg_Byte( 11722 getBase(MIR_BinaryAcc.getResult(inst)), 11723 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11724 } 11725 } 11726 } 11727 } 11728 } 11729 11730 } else { 11731 if (isWord(inst)) { 11732 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11733 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11734 emitROR_Reg_Reg_Word( 11735 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11736 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11737 11738 } else { 11739 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11740 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11741 emitROR_Abs_Reg_Word( 11742 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11743 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11744 11745 } else { 11746 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11747 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11748 emitROR_RegDisp_Reg_Word( 11749 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11750 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11751 11752 } else { 11753 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11754 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11755 emitROR_RegOff_Reg_Word( 11756 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11757 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11758 11759 } else { 11760 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11761 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11762 emitROR_RegIdx_Reg_Word( 11763 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11764 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11765 11766 } else { 11767 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11768 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11769 emitROR_RegInd_Reg_Word( 11770 getBase(MIR_BinaryAcc.getResult(inst)), 11771 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11772 } 11773 } 11774 } 11775 } 11776 } 11777 11778 } else { 11779 if (isQuad(inst)) { 11780 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11781 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11782 emitROR_Reg_Reg_Quad( 11783 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11784 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11785 11786 } else { 11787 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11788 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11789 emitROR_Abs_Reg_Quad( 11790 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11791 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11792 11793 } else { 11794 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11795 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11796 emitROR_RegDisp_Reg_Quad( 11797 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11798 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11799 11800 } else { 11801 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11802 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11803 emitROR_RegOff_Reg_Quad( 11804 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11805 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11806 11807 } else { 11808 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11809 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11810 emitROR_RegIdx_Reg_Quad( 11811 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11812 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11813 11814 } else { 11815 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11816 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11817 emitROR_RegInd_Reg_Quad( 11818 getBase(MIR_BinaryAcc.getResult(inst)), 11819 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11820 } 11821 } 11822 } 11823 } 11824 } 11825 11826 } else { 11827 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 11828 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11829 emitROR_Reg_Reg( 11830 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 11831 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11832 11833 } else { 11834 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 11835 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11836 emitROR_Abs_Reg( 11837 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 11838 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11839 11840 } else { 11841 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 11842 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11843 emitROR_RegDisp_Reg( 11844 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11845 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11846 11847 } else { 11848 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 11849 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11850 emitROR_RegOff_Reg( 11851 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11852 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11853 11854 } else { 11855 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 11856 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11857 emitROR_RegIdx_Reg( 11858 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 11859 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11860 11861 } else { 11862 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11863 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11864 emitROR_RegInd_Reg( 11865 getBase(MIR_BinaryAcc.getResult(inst)), 11866 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 11867 } 11868 } 11869 } 11870 } 11871 } 11872 } 11873 } 11874 } 11875 } 11876 } 11877 11878 /** 11879 * Emit the given instruction, assuming that 11880 * it is a MIR_Compare instruction 11881 * and has a FCOMI operator 11882 * 11883 * @param inst the instruction to assemble 11884 */ 11885 private void doFCOMI(Instruction inst) { 11886 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11887 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11888 emitFCOMI_Reg_Reg( 11889 getFPR_Reg(MIR_Compare.getVal1(inst)), 11890 getFPR_Reg(MIR_Compare.getVal2(inst))); 11891 } 11892 11893 /** 11894 * Emit the given instruction, assuming that 11895 * it is a MIR_Test instruction 11896 * and has a TEST operator 11897 * 11898 * @param inst the instruction to assemble 11899 */ 11900 private void doTEST(Instruction inst) { 11901 if (isImm(MIR_Test.getVal2(inst))) { 11902 if (isByte(inst)) { 11903 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 11904 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Test.getVal1(inst)).isValidAs8bitRegister()); 11905 emitTEST_Reg_Imm_Byte( 11906 getGPR_Reg(MIR_Test.getVal1(inst)), 11907 getImm(MIR_Test.getVal2(inst))); 11908 11909 } else { 11910 if (isAbs(MIR_Test.getVal1(inst))) { 11911 emitTEST_Abs_Imm_Byte( 11912 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 11913 getImm(MIR_Test.getVal2(inst))); 11914 11915 } else { 11916 if (isRegDisp(MIR_Test.getVal1(inst))) { 11917 emitTEST_RegDisp_Imm_Byte( 11918 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 11919 getImm(MIR_Test.getVal2(inst))); 11920 11921 } else { 11922 if (isRegOff(MIR_Test.getVal1(inst))) { 11923 emitTEST_RegOff_Imm_Byte( 11924 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 11925 getImm(MIR_Test.getVal2(inst))); 11926 11927 } else { 11928 if (isRegIdx(MIR_Test.getVal1(inst))) { 11929 emitTEST_RegIdx_Imm_Byte( 11930 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 11931 getImm(MIR_Test.getVal2(inst))); 11932 11933 } else { 11934 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11935 emitTEST_RegInd_Imm_Byte( 11936 getBase(MIR_Test.getVal1(inst)), 11937 getImm(MIR_Test.getVal2(inst))); 11938 } 11939 } 11940 } 11941 } 11942 } 11943 11944 } else { 11945 if (isWord(inst)) { 11946 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 11947 emitTEST_Reg_Imm_Word( 11948 getGPR_Reg(MIR_Test.getVal1(inst)), 11949 getImm(MIR_Test.getVal2(inst))); 11950 11951 } else { 11952 if (isAbs(MIR_Test.getVal1(inst))) { 11953 emitTEST_Abs_Imm_Word( 11954 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 11955 getImm(MIR_Test.getVal2(inst))); 11956 11957 } else { 11958 if (isRegDisp(MIR_Test.getVal1(inst))) { 11959 emitTEST_RegDisp_Imm_Word( 11960 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 11961 getImm(MIR_Test.getVal2(inst))); 11962 11963 } else { 11964 if (isRegOff(MIR_Test.getVal1(inst))) { 11965 emitTEST_RegOff_Imm_Word( 11966 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 11967 getImm(MIR_Test.getVal2(inst))); 11968 11969 } else { 11970 if (isRegIdx(MIR_Test.getVal1(inst))) { 11971 emitTEST_RegIdx_Imm_Word( 11972 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 11973 getImm(MIR_Test.getVal2(inst))); 11974 11975 } else { 11976 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 11977 emitTEST_RegInd_Imm_Word( 11978 getBase(MIR_Test.getVal1(inst)), 11979 getImm(MIR_Test.getVal2(inst))); 11980 } 11981 } 11982 } 11983 } 11984 } 11985 11986 } else { 11987 if (isQuad(inst)) { 11988 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 11989 emitTEST_Reg_Imm_Quad( 11990 getGPR_Reg(MIR_Test.getVal1(inst)), 11991 getImm(MIR_Test.getVal2(inst))); 11992 11993 } else { 11994 if (isAbs(MIR_Test.getVal1(inst))) { 11995 emitTEST_Abs_Imm_Quad( 11996 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 11997 getImm(MIR_Test.getVal2(inst))); 11998 11999 } else { 12000 if (isRegDisp(MIR_Test.getVal1(inst))) { 12001 emitTEST_RegDisp_Imm_Quad( 12002 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12003 getImm(MIR_Test.getVal2(inst))); 12004 12005 } else { 12006 if (isRegOff(MIR_Test.getVal1(inst))) { 12007 emitTEST_RegOff_Imm_Quad( 12008 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12009 getImm(MIR_Test.getVal2(inst))); 12010 12011 } else { 12012 if (isRegIdx(MIR_Test.getVal1(inst))) { 12013 emitTEST_RegIdx_Imm_Quad( 12014 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12015 getImm(MIR_Test.getVal2(inst))); 12016 12017 } else { 12018 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12019 emitTEST_RegInd_Imm_Quad( 12020 getBase(MIR_Test.getVal1(inst)), 12021 getImm(MIR_Test.getVal2(inst))); 12022 } 12023 } 12024 } 12025 } 12026 } 12027 12028 } else { 12029 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 12030 emitTEST_Reg_Imm( 12031 getGPR_Reg(MIR_Test.getVal1(inst)), 12032 getImm(MIR_Test.getVal2(inst))); 12033 12034 } else { 12035 if (isAbs(MIR_Test.getVal1(inst))) { 12036 emitTEST_Abs_Imm( 12037 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 12038 getImm(MIR_Test.getVal2(inst))); 12039 12040 } else { 12041 if (isRegDisp(MIR_Test.getVal1(inst))) { 12042 emitTEST_RegDisp_Imm( 12043 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12044 getImm(MIR_Test.getVal2(inst))); 12045 12046 } else { 12047 if (isRegOff(MIR_Test.getVal1(inst))) { 12048 emitTEST_RegOff_Imm( 12049 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12050 getImm(MIR_Test.getVal2(inst))); 12051 12052 } else { 12053 if (isRegIdx(MIR_Test.getVal1(inst))) { 12054 emitTEST_RegIdx_Imm( 12055 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12056 getImm(MIR_Test.getVal2(inst))); 12057 12058 } else { 12059 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12060 emitTEST_RegInd_Imm( 12061 getBase(MIR_Test.getVal1(inst)), 12062 getImm(MIR_Test.getVal2(inst))); 12063 } 12064 } 12065 } 12066 } 12067 } 12068 } 12069 } 12070 } 12071 12072 } else { 12073 if (isByte(inst)) { 12074 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 12075 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12076 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Test.getVal1(inst)).isValidAs8bitRegister()); 12077 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Test.getVal2(inst)).isValidAs8bitRegister()); 12078 emitTEST_Reg_Reg_Byte( 12079 getGPR_Reg(MIR_Test.getVal1(inst)), 12080 getGPR_Reg(MIR_Test.getVal2(inst))); 12081 12082 } else { 12083 if (isAbs(MIR_Test.getVal1(inst))) { 12084 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12085 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Test.getVal2(inst)).isValidAs8bitRegister()); 12086 emitTEST_Abs_Reg_Byte( 12087 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 12088 getGPR_Reg(MIR_Test.getVal2(inst))); 12089 12090 } else { 12091 if (isRegDisp(MIR_Test.getVal1(inst))) { 12092 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12093 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Test.getVal2(inst)).isValidAs8bitRegister()); 12094 emitTEST_RegDisp_Reg_Byte( 12095 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12096 getGPR_Reg(MIR_Test.getVal2(inst))); 12097 12098 } else { 12099 if (isRegOff(MIR_Test.getVal1(inst))) { 12100 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12101 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Test.getVal2(inst)).isValidAs8bitRegister()); 12102 emitTEST_RegOff_Reg_Byte( 12103 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12104 getGPR_Reg(MIR_Test.getVal2(inst))); 12105 12106 } else { 12107 if (isRegIdx(MIR_Test.getVal1(inst))) { 12108 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12109 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Test.getVal2(inst)).isValidAs8bitRegister()); 12110 emitTEST_RegIdx_Reg_Byte( 12111 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12112 getGPR_Reg(MIR_Test.getVal2(inst))); 12113 12114 } else { 12115 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12116 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12117 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Test.getVal2(inst)).isValidAs8bitRegister()); 12118 emitTEST_RegInd_Reg_Byte( 12119 getBase(MIR_Test.getVal1(inst)), 12120 getGPR_Reg(MIR_Test.getVal2(inst))); 12121 } 12122 } 12123 } 12124 } 12125 } 12126 12127 } else { 12128 if (isWord(inst)) { 12129 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 12130 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12131 emitTEST_Reg_Reg_Word( 12132 getGPR_Reg(MIR_Test.getVal1(inst)), 12133 getGPR_Reg(MIR_Test.getVal2(inst))); 12134 12135 } else { 12136 if (isAbs(MIR_Test.getVal1(inst))) { 12137 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12138 emitTEST_Abs_Reg_Word( 12139 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 12140 getGPR_Reg(MIR_Test.getVal2(inst))); 12141 12142 } else { 12143 if (isRegDisp(MIR_Test.getVal1(inst))) { 12144 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12145 emitTEST_RegDisp_Reg_Word( 12146 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12147 getGPR_Reg(MIR_Test.getVal2(inst))); 12148 12149 } else { 12150 if (isRegOff(MIR_Test.getVal1(inst))) { 12151 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12152 emitTEST_RegOff_Reg_Word( 12153 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12154 getGPR_Reg(MIR_Test.getVal2(inst))); 12155 12156 } else { 12157 if (isRegIdx(MIR_Test.getVal1(inst))) { 12158 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12159 emitTEST_RegIdx_Reg_Word( 12160 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12161 getGPR_Reg(MIR_Test.getVal2(inst))); 12162 12163 } else { 12164 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12165 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12166 emitTEST_RegInd_Reg_Word( 12167 getBase(MIR_Test.getVal1(inst)), 12168 getGPR_Reg(MIR_Test.getVal2(inst))); 12169 } 12170 } 12171 } 12172 } 12173 } 12174 12175 } else { 12176 if (isQuad(inst)) { 12177 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 12178 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12179 emitTEST_Reg_Reg_Quad( 12180 getGPR_Reg(MIR_Test.getVal1(inst)), 12181 getGPR_Reg(MIR_Test.getVal2(inst))); 12182 12183 } else { 12184 if (isAbs(MIR_Test.getVal1(inst))) { 12185 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12186 emitTEST_Abs_Reg_Quad( 12187 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 12188 getGPR_Reg(MIR_Test.getVal2(inst))); 12189 12190 } else { 12191 if (isRegDisp(MIR_Test.getVal1(inst))) { 12192 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12193 emitTEST_RegDisp_Reg_Quad( 12194 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12195 getGPR_Reg(MIR_Test.getVal2(inst))); 12196 12197 } else { 12198 if (isRegOff(MIR_Test.getVal1(inst))) { 12199 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12200 emitTEST_RegOff_Reg_Quad( 12201 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12202 getGPR_Reg(MIR_Test.getVal2(inst))); 12203 12204 } else { 12205 if (isRegIdx(MIR_Test.getVal1(inst))) { 12206 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12207 emitTEST_RegIdx_Reg_Quad( 12208 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12209 getGPR_Reg(MIR_Test.getVal2(inst))); 12210 12211 } else { 12212 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12213 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12214 emitTEST_RegInd_Reg_Quad( 12215 getBase(MIR_Test.getVal1(inst)), 12216 getGPR_Reg(MIR_Test.getVal2(inst))); 12217 } 12218 } 12219 } 12220 } 12221 } 12222 12223 } else { 12224 if (isGPR_Reg(MIR_Test.getVal1(inst))) { 12225 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12226 emitTEST_Reg_Reg( 12227 getGPR_Reg(MIR_Test.getVal1(inst)), 12228 getGPR_Reg(MIR_Test.getVal2(inst))); 12229 12230 } else { 12231 if (isAbs(MIR_Test.getVal1(inst))) { 12232 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12233 emitTEST_Abs_Reg( 12234 getDisp(MIR_Test.getVal1(inst)).toWord().toAddress(), 12235 getGPR_Reg(MIR_Test.getVal2(inst))); 12236 12237 } else { 12238 if (isRegDisp(MIR_Test.getVal1(inst))) { 12239 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12240 emitTEST_RegDisp_Reg( 12241 getBase(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12242 getGPR_Reg(MIR_Test.getVal2(inst))); 12243 12244 } else { 12245 if (isRegOff(MIR_Test.getVal1(inst))) { 12246 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12247 emitTEST_RegOff_Reg( 12248 getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12249 getGPR_Reg(MIR_Test.getVal2(inst))); 12250 12251 } else { 12252 if (isRegIdx(MIR_Test.getVal1(inst))) { 12253 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12254 emitTEST_RegIdx_Reg( 12255 getBase(MIR_Test.getVal1(inst)), getIndex(MIR_Test.getVal1(inst)), getScale(MIR_Test.getVal1(inst)), getDisp(MIR_Test.getVal1(inst)), 12256 getGPR_Reg(MIR_Test.getVal2(inst))); 12257 12258 } else { 12259 if (VM.VerifyAssertions && !isRegInd(MIR_Test.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12260 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Test.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12261 emitTEST_RegInd_Reg( 12262 getBase(MIR_Test.getVal1(inst)), 12263 getGPR_Reg(MIR_Test.getVal2(inst))); 12264 } 12265 } 12266 } 12267 } 12268 } 12269 } 12270 } 12271 } 12272 } 12273 } 12274 12275 /** 12276 * Emit the given instruction, assuming that 12277 * it is a MIR_BinaryAcc instruction 12278 * and has a AND operator 12279 * 12280 * @param inst the instruction to assemble 12281 */ 12282 private void doAND(Instruction inst) { 12283 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 12284 if (isByte(inst)) { 12285 if (isImm(MIR_BinaryAcc.getValue(inst))) { 12286 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 12287 emitAND_Reg_Imm_Byte( 12288 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12289 getImm(MIR_BinaryAcc.getValue(inst))); 12290 12291 } else { 12292 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 12293 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 12294 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 12295 emitAND_Reg_Reg_Byte( 12296 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12297 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12298 12299 } else { 12300 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 12301 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 12302 emitAND_Reg_Abs_Byte( 12303 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12304 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 12305 12306 } else { 12307 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 12308 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 12309 emitAND_Reg_RegDisp_Byte( 12310 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12311 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12312 12313 } else { 12314 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 12315 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 12316 emitAND_Reg_RegOff_Byte( 12317 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12318 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12319 12320 } else { 12321 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 12322 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 12323 emitAND_Reg_RegIdx_Byte( 12324 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12325 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12326 12327 } else { 12328 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12329 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 12330 emitAND_Reg_RegInd_Byte( 12331 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12332 getBase(MIR_BinaryAcc.getValue(inst))); 12333 } 12334 } 12335 } 12336 } 12337 } 12338 } 12339 12340 } else { 12341 if (isWord(inst)) { 12342 if (isImm(MIR_BinaryAcc.getValue(inst))) { 12343 emitAND_Reg_Imm_Word( 12344 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12345 getImm(MIR_BinaryAcc.getValue(inst))); 12346 12347 } else { 12348 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 12349 emitAND_Reg_Reg_Word( 12350 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12351 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12352 12353 } else { 12354 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 12355 emitAND_Reg_Abs_Word( 12356 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12357 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 12358 12359 } else { 12360 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 12361 emitAND_Reg_RegDisp_Word( 12362 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12363 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12364 12365 } else { 12366 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 12367 emitAND_Reg_RegOff_Word( 12368 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12369 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12370 12371 } else { 12372 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 12373 emitAND_Reg_RegIdx_Word( 12374 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12375 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12376 12377 } else { 12378 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12379 emitAND_Reg_RegInd_Word( 12380 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12381 getBase(MIR_BinaryAcc.getValue(inst))); 12382 } 12383 } 12384 } 12385 } 12386 } 12387 } 12388 12389 } else { 12390 if (isQuad(inst)) { 12391 if (isImm(MIR_BinaryAcc.getValue(inst))) { 12392 emitAND_Reg_Imm_Quad( 12393 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12394 getImm(MIR_BinaryAcc.getValue(inst))); 12395 12396 } else { 12397 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 12398 emitAND_Reg_Reg_Quad( 12399 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12400 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12401 12402 } else { 12403 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 12404 emitAND_Reg_Abs_Quad( 12405 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12406 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 12407 12408 } else { 12409 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 12410 emitAND_Reg_RegDisp_Quad( 12411 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12412 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12413 12414 } else { 12415 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 12416 emitAND_Reg_RegOff_Quad( 12417 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12418 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12419 12420 } else { 12421 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 12422 emitAND_Reg_RegIdx_Quad( 12423 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12424 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12425 12426 } else { 12427 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12428 emitAND_Reg_RegInd_Quad( 12429 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12430 getBase(MIR_BinaryAcc.getValue(inst))); 12431 } 12432 } 12433 } 12434 } 12435 } 12436 } 12437 12438 } else { 12439 if (isImm(MIR_BinaryAcc.getValue(inst))) { 12440 emitAND_Reg_Imm( 12441 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12442 getImm(MIR_BinaryAcc.getValue(inst))); 12443 12444 } else { 12445 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 12446 emitAND_Reg_Reg( 12447 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12448 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12449 12450 } else { 12451 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 12452 emitAND_Reg_Abs( 12453 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12454 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 12455 12456 } else { 12457 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 12458 emitAND_Reg_RegDisp( 12459 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12460 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12461 12462 } else { 12463 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 12464 emitAND_Reg_RegOff( 12465 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12466 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12467 12468 } else { 12469 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 12470 emitAND_Reg_RegIdx( 12471 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12472 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12473 12474 } else { 12475 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12476 emitAND_Reg_RegInd( 12477 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 12478 getBase(MIR_BinaryAcc.getValue(inst))); 12479 } 12480 } 12481 } 12482 } 12483 } 12484 } 12485 } 12486 } 12487 } 12488 12489 } else { 12490 if (isImm(MIR_BinaryAcc.getValue(inst))) { 12491 if (isByte(inst)) { 12492 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 12493 emitAND_Abs_Imm_Byte( 12494 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 12495 getImm(MIR_BinaryAcc.getValue(inst))); 12496 12497 } else { 12498 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 12499 emitAND_RegDisp_Imm_Byte( 12500 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12501 getImm(MIR_BinaryAcc.getValue(inst))); 12502 12503 } else { 12504 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 12505 emitAND_RegOff_Imm_Byte( 12506 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12507 getImm(MIR_BinaryAcc.getValue(inst))); 12508 12509 } else { 12510 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 12511 emitAND_RegIdx_Imm_Byte( 12512 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12513 getImm(MIR_BinaryAcc.getValue(inst))); 12514 12515 } else { 12516 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12517 emitAND_RegInd_Imm_Byte( 12518 getBase(MIR_BinaryAcc.getResult(inst)), 12519 getImm(MIR_BinaryAcc.getValue(inst))); 12520 } 12521 } 12522 } 12523 } 12524 12525 } else { 12526 if (isWord(inst)) { 12527 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 12528 emitAND_Abs_Imm_Word( 12529 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 12530 getImm(MIR_BinaryAcc.getValue(inst))); 12531 12532 } else { 12533 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 12534 emitAND_RegDisp_Imm_Word( 12535 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12536 getImm(MIR_BinaryAcc.getValue(inst))); 12537 12538 } else { 12539 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 12540 emitAND_RegOff_Imm_Word( 12541 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12542 getImm(MIR_BinaryAcc.getValue(inst))); 12543 12544 } else { 12545 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 12546 emitAND_RegIdx_Imm_Word( 12547 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12548 getImm(MIR_BinaryAcc.getValue(inst))); 12549 12550 } else { 12551 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12552 emitAND_RegInd_Imm_Word( 12553 getBase(MIR_BinaryAcc.getResult(inst)), 12554 getImm(MIR_BinaryAcc.getValue(inst))); 12555 } 12556 } 12557 } 12558 } 12559 12560 } else { 12561 if (isQuad(inst)) { 12562 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 12563 emitAND_Abs_Imm_Quad( 12564 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 12565 getImm(MIR_BinaryAcc.getValue(inst))); 12566 12567 } else { 12568 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 12569 emitAND_RegDisp_Imm_Quad( 12570 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12571 getImm(MIR_BinaryAcc.getValue(inst))); 12572 12573 } else { 12574 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 12575 emitAND_RegOff_Imm_Quad( 12576 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12577 getImm(MIR_BinaryAcc.getValue(inst))); 12578 12579 } else { 12580 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 12581 emitAND_RegIdx_Imm_Quad( 12582 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12583 getImm(MIR_BinaryAcc.getValue(inst))); 12584 12585 } else { 12586 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12587 emitAND_RegInd_Imm_Quad( 12588 getBase(MIR_BinaryAcc.getResult(inst)), 12589 getImm(MIR_BinaryAcc.getValue(inst))); 12590 } 12591 } 12592 } 12593 } 12594 12595 } else { 12596 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 12597 emitAND_Abs_Imm( 12598 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 12599 getImm(MIR_BinaryAcc.getValue(inst))); 12600 12601 } else { 12602 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 12603 emitAND_RegDisp_Imm( 12604 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12605 getImm(MIR_BinaryAcc.getValue(inst))); 12606 12607 } else { 12608 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 12609 emitAND_RegOff_Imm( 12610 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12611 getImm(MIR_BinaryAcc.getValue(inst))); 12612 12613 } else { 12614 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 12615 emitAND_RegIdx_Imm( 12616 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12617 getImm(MIR_BinaryAcc.getValue(inst))); 12618 12619 } else { 12620 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12621 emitAND_RegInd_Imm( 12622 getBase(MIR_BinaryAcc.getResult(inst)), 12623 getImm(MIR_BinaryAcc.getValue(inst))); 12624 } 12625 } 12626 } 12627 } 12628 } 12629 } 12630 } 12631 12632 } else { 12633 if (isByte(inst)) { 12634 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 12635 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12636 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 12637 emitAND_Abs_Reg_Byte( 12638 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 12639 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12640 12641 } else { 12642 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 12643 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12644 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 12645 emitAND_RegDisp_Reg_Byte( 12646 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12647 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12648 12649 } else { 12650 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 12651 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12652 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 12653 emitAND_RegOff_Reg_Byte( 12654 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12655 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12656 12657 } else { 12658 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 12659 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12660 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 12661 emitAND_RegIdx_Reg_Byte( 12662 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12663 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12664 12665 } else { 12666 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12667 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12668 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 12669 emitAND_RegInd_Reg_Byte( 12670 getBase(MIR_BinaryAcc.getResult(inst)), 12671 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12672 } 12673 } 12674 } 12675 } 12676 12677 } else { 12678 if (isWord(inst)) { 12679 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 12680 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12681 emitAND_Abs_Reg_Word( 12682 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 12683 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12684 12685 } else { 12686 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 12687 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12688 emitAND_RegDisp_Reg_Word( 12689 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12690 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12691 12692 } else { 12693 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 12694 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12695 emitAND_RegOff_Reg_Word( 12696 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12697 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12698 12699 } else { 12700 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 12701 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12702 emitAND_RegIdx_Reg_Word( 12703 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12704 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12705 12706 } else { 12707 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12708 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12709 emitAND_RegInd_Reg_Word( 12710 getBase(MIR_BinaryAcc.getResult(inst)), 12711 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12712 } 12713 } 12714 } 12715 } 12716 12717 } else { 12718 if (isQuad(inst)) { 12719 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 12720 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12721 emitAND_Abs_Reg_Quad( 12722 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 12723 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12724 12725 } else { 12726 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 12727 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12728 emitAND_RegDisp_Reg_Quad( 12729 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12730 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12731 12732 } else { 12733 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 12734 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12735 emitAND_RegOff_Reg_Quad( 12736 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12737 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12738 12739 } else { 12740 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 12741 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12742 emitAND_RegIdx_Reg_Quad( 12743 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12744 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12745 12746 } else { 12747 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12748 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12749 emitAND_RegInd_Reg_Quad( 12750 getBase(MIR_BinaryAcc.getResult(inst)), 12751 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12752 } 12753 } 12754 } 12755 } 12756 12757 } else { 12758 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 12759 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12760 emitAND_Abs_Reg( 12761 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 12762 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12763 12764 } else { 12765 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 12766 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12767 emitAND_RegDisp_Reg( 12768 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12769 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12770 12771 } else { 12772 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 12773 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12774 emitAND_RegOff_Reg( 12775 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12776 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12777 12778 } else { 12779 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 12780 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12781 emitAND_RegIdx_Reg( 12782 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 12783 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12784 12785 } else { 12786 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12787 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12788 emitAND_RegInd_Reg( 12789 getBase(MIR_BinaryAcc.getResult(inst)), 12790 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 12791 } 12792 } 12793 } 12794 } 12795 } 12796 } 12797 } 12798 } 12799 } 12800 } 12801 12802 /** 12803 * Emit the given instruction, assuming that 12804 * it is a MIR_UnaryNoRes instruction 12805 * and has a FNSTCW operator 12806 * 12807 * @param inst the instruction to assemble 12808 */ 12809 private void doFNSTCW(Instruction inst) { 12810 if (isAbs(MIR_UnaryNoRes.getVal(inst))) { 12811 emitFNSTCW_Abs( 12812 getDisp(MIR_UnaryNoRes.getVal(inst)).toWord().toAddress()); 12813 12814 } else { 12815 if (isRegDisp(MIR_UnaryNoRes.getVal(inst))) { 12816 emitFNSTCW_RegDisp( 12817 getBase(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 12818 12819 } else { 12820 if (isRegOff(MIR_UnaryNoRes.getVal(inst))) { 12821 emitFNSTCW_RegOff( 12822 getIndex(MIR_UnaryNoRes.getVal(inst)), getScale(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 12823 12824 } else { 12825 if (isRegIdx(MIR_UnaryNoRes.getVal(inst))) { 12826 emitFNSTCW_RegIdx( 12827 getBase(MIR_UnaryNoRes.getVal(inst)), getIndex(MIR_UnaryNoRes.getVal(inst)), getScale(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 12828 12829 } else { 12830 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryNoRes.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12831 emitFNSTCW_RegInd( 12832 getBase(MIR_UnaryNoRes.getVal(inst))); 12833 } 12834 } 12835 } 12836 } 12837 } 12838 12839 /** 12840 * Emit the given instruction, assuming that 12841 * it is a MIR_Unary instruction 12842 * and has a MOVZXQ operator 12843 * 12844 * @param inst the instruction to assemble 12845 */ 12846 private void doMOVZXQ(Instruction inst) { 12847 if (isByte(inst)) { 12848 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 12849 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12850 emitMOVZXQ_Reg_Reg_Byte( 12851 getGPR_Reg(MIR_Unary.getResult(inst)), 12852 getGPR_Reg(MIR_Unary.getVal(inst))); 12853 12854 } else { 12855 if (isAbs(MIR_Unary.getVal(inst))) { 12856 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12857 emitMOVZXQ_Reg_Abs_Byte( 12858 getGPR_Reg(MIR_Unary.getResult(inst)), 12859 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 12860 12861 } else { 12862 if (isRegDisp(MIR_Unary.getVal(inst))) { 12863 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12864 emitMOVZXQ_Reg_RegDisp_Byte( 12865 getGPR_Reg(MIR_Unary.getResult(inst)), 12866 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 12867 12868 } else { 12869 if (isRegOff(MIR_Unary.getVal(inst))) { 12870 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12871 emitMOVZXQ_Reg_RegOff_Byte( 12872 getGPR_Reg(MIR_Unary.getResult(inst)), 12873 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 12874 12875 } else { 12876 if (isRegIdx(MIR_Unary.getVal(inst))) { 12877 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12878 emitMOVZXQ_Reg_RegIdx_Byte( 12879 getGPR_Reg(MIR_Unary.getResult(inst)), 12880 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 12881 12882 } else { 12883 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12884 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12885 emitMOVZXQ_Reg_RegInd_Byte( 12886 getGPR_Reg(MIR_Unary.getResult(inst)), 12887 getBase(MIR_Unary.getVal(inst))); 12888 } 12889 } 12890 } 12891 } 12892 } 12893 12894 } else { 12895 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 12896 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12897 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12898 emitMOVZXQ_Reg_Reg_Word( 12899 getGPR_Reg(MIR_Unary.getResult(inst)), 12900 getGPR_Reg(MIR_Unary.getVal(inst))); 12901 12902 } else { 12903 if (isAbs(MIR_Unary.getVal(inst))) { 12904 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12905 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12906 emitMOVZXQ_Reg_Abs_Word( 12907 getGPR_Reg(MIR_Unary.getResult(inst)), 12908 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 12909 12910 } else { 12911 if (isRegDisp(MIR_Unary.getVal(inst))) { 12912 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12913 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12914 emitMOVZXQ_Reg_RegDisp_Word( 12915 getGPR_Reg(MIR_Unary.getResult(inst)), 12916 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 12917 12918 } else { 12919 if (isRegOff(MIR_Unary.getVal(inst))) { 12920 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12921 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12922 emitMOVZXQ_Reg_RegOff_Word( 12923 getGPR_Reg(MIR_Unary.getResult(inst)), 12924 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 12925 12926 } else { 12927 if (isRegIdx(MIR_Unary.getVal(inst))) { 12928 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12929 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12930 emitMOVZXQ_Reg_RegIdx_Word( 12931 getGPR_Reg(MIR_Unary.getResult(inst)), 12932 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 12933 12934 } else { 12935 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12936 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12937 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12938 emitMOVZXQ_Reg_RegInd_Word( 12939 getGPR_Reg(MIR_Unary.getResult(inst)), 12940 getBase(MIR_Unary.getVal(inst))); 12941 } 12942 } 12943 } 12944 } 12945 } 12946 } 12947 } 12948 12949 /** 12950 * Emit the given instruction, assuming that 12951 * it is a MIR_BinaryAcc instruction 12952 * and has a FDIVRP operator 12953 * 12954 * @param inst the instruction to assemble 12955 */ 12956 private void doFDIVRP(Instruction inst) { 12957 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12958 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12959 emitFDIVRP_Reg_Reg( 12960 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 12961 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 12962 } 12963 12964 /** 12965 * Emit the given instruction, assuming that 12966 * it is a MIR_BinaryAcc instruction 12967 * and has a FDIVR operator 12968 * 12969 * @param inst the instruction to assemble 12970 */ 12971 private void doFDIVR(Instruction inst) { 12972 if (isQuad(inst)) { 12973 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 12974 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12975 emitFDIVR_Reg_Abs_Quad( 12976 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 12977 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 12978 12979 } else { 12980 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 12981 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12982 emitFDIVR_Reg_RegDisp_Quad( 12983 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 12984 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12985 12986 } else { 12987 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 12988 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12989 emitFDIVR_Reg_RegOff_Quad( 12990 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 12991 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12992 12993 } else { 12994 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 12995 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 12996 emitFDIVR_Reg_RegIdx_Quad( 12997 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 12998 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 12999 13000 } else { 13001 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13002 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13003 emitFDIVR_Reg_RegInd_Quad( 13004 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13005 getBase(MIR_BinaryAcc.getValue(inst))); 13006 } 13007 } 13008 } 13009 } 13010 13011 } else { 13012 if (isFPR_Reg(MIR_BinaryAcc.getValue(inst))) { 13013 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13014 emitFDIVR_Reg_Reg( 13015 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13016 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 13017 13018 } else { 13019 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 13020 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13021 emitFDIVR_Reg_Abs( 13022 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13023 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 13024 13025 } else { 13026 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 13027 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13028 emitFDIVR_Reg_RegDisp( 13029 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13030 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13031 13032 } else { 13033 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 13034 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13035 emitFDIVR_Reg_RegOff( 13036 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13037 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13038 13039 } else { 13040 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 13041 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13042 emitFDIVR_Reg_RegIdx( 13043 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13044 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13045 13046 } else { 13047 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13048 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13049 emitFDIVR_Reg_RegInd( 13050 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13051 getBase(MIR_BinaryAcc.getValue(inst))); 13052 } 13053 } 13054 } 13055 } 13056 } 13057 } 13058 } 13059 13060 /** 13061 * Emit the given instruction, assuming that 13062 * it is a MIR_Unary instruction 13063 * and has a SQRTSS operator 13064 * 13065 * @param inst the instruction to assemble 13066 */ 13067 private void doSQRTSS(Instruction inst) { 13068 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 13069 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13070 emitSQRTSS_Reg_Reg( 13071 getXMM_Reg(MIR_Unary.getResult(inst)), 13072 getXMM_Reg(MIR_Unary.getVal(inst))); 13073 13074 } else { 13075 if (isAbs(MIR_Unary.getVal(inst))) { 13076 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13077 emitSQRTSS_Reg_Abs( 13078 getXMM_Reg(MIR_Unary.getResult(inst)), 13079 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 13080 13081 } else { 13082 if (isRegDisp(MIR_Unary.getVal(inst))) { 13083 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13084 emitSQRTSS_Reg_RegDisp( 13085 getXMM_Reg(MIR_Unary.getResult(inst)), 13086 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 13087 13088 } else { 13089 if (isRegOff(MIR_Unary.getVal(inst))) { 13090 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13091 emitSQRTSS_Reg_RegOff( 13092 getXMM_Reg(MIR_Unary.getResult(inst)), 13093 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 13094 13095 } else { 13096 if (isRegIdx(MIR_Unary.getVal(inst))) { 13097 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13098 emitSQRTSS_Reg_RegIdx( 13099 getXMM_Reg(MIR_Unary.getResult(inst)), 13100 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 13101 13102 } else { 13103 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13104 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13105 emitSQRTSS_Reg_RegInd( 13106 getXMM_Reg(MIR_Unary.getResult(inst)), 13107 getBase(MIR_Unary.getVal(inst))); 13108 } 13109 } 13110 } 13111 } 13112 } 13113 } 13114 13115 /** 13116 * Emit the given instruction, assuming that 13117 * it is a MIR_Compare instruction 13118 * and has a UCOMISS operator 13119 * 13120 * @param inst the instruction to assemble 13121 */ 13122 private void doUCOMISS(Instruction inst) { 13123 if (isXMM_Reg(MIR_Compare.getVal2(inst))) { 13124 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13125 emitUCOMISS_Reg_Reg( 13126 getXMM_Reg(MIR_Compare.getVal1(inst)), 13127 getXMM_Reg(MIR_Compare.getVal2(inst))); 13128 13129 } else { 13130 if (isAbs(MIR_Compare.getVal2(inst))) { 13131 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13132 emitUCOMISS_Reg_Abs( 13133 getXMM_Reg(MIR_Compare.getVal1(inst)), 13134 getDisp(MIR_Compare.getVal2(inst)).toWord().toAddress()); 13135 13136 } else { 13137 if (isRegDisp(MIR_Compare.getVal2(inst))) { 13138 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13139 emitUCOMISS_Reg_RegDisp( 13140 getXMM_Reg(MIR_Compare.getVal1(inst)), 13141 getBase(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 13142 13143 } else { 13144 if (isRegOff(MIR_Compare.getVal2(inst))) { 13145 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13146 emitUCOMISS_Reg_RegOff( 13147 getXMM_Reg(MIR_Compare.getVal1(inst)), 13148 getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 13149 13150 } else { 13151 if (isRegIdx(MIR_Compare.getVal2(inst))) { 13152 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13153 emitUCOMISS_Reg_RegIdx( 13154 getXMM_Reg(MIR_Compare.getVal1(inst)), 13155 getBase(MIR_Compare.getVal2(inst)), getIndex(MIR_Compare.getVal2(inst)), getScale(MIR_Compare.getVal2(inst)), getDisp(MIR_Compare.getVal2(inst))); 13156 13157 } else { 13158 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Compare.getVal1(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13159 if (VM.VerifyAssertions && !isRegInd(MIR_Compare.getVal2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13160 emitUCOMISS_Reg_RegInd( 13161 getXMM_Reg(MIR_Compare.getVal1(inst)), 13162 getBase(MIR_Compare.getVal2(inst))); 13163 } 13164 } 13165 } 13166 } 13167 } 13168 } 13169 13170 /** 13171 * Emit the given instruction, assuming that 13172 * it is a MIR_BinaryAcc instruction 13173 * and has a FMUL operator 13174 * 13175 * @param inst the instruction to assemble 13176 */ 13177 private void doFMUL(Instruction inst) { 13178 if (isQuad(inst)) { 13179 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 13180 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13181 emitFMUL_Reg_Abs_Quad( 13182 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13183 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 13184 13185 } else { 13186 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 13187 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13188 emitFMUL_Reg_RegDisp_Quad( 13189 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13190 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13191 13192 } else { 13193 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 13194 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13195 emitFMUL_Reg_RegOff_Quad( 13196 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13197 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13198 13199 } else { 13200 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 13201 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13202 emitFMUL_Reg_RegIdx_Quad( 13203 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13204 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13205 13206 } else { 13207 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13208 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13209 emitFMUL_Reg_RegInd_Quad( 13210 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13211 getBase(MIR_BinaryAcc.getValue(inst))); 13212 } 13213 } 13214 } 13215 } 13216 13217 } else { 13218 if (isFPR_Reg(MIR_BinaryAcc.getValue(inst))) { 13219 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13220 emitFMUL_Reg_Reg( 13221 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13222 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 13223 13224 } else { 13225 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 13226 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13227 emitFMUL_Reg_Abs( 13228 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13229 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 13230 13231 } else { 13232 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 13233 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13234 emitFMUL_Reg_RegDisp( 13235 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13236 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13237 13238 } else { 13239 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 13240 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13241 emitFMUL_Reg_RegOff( 13242 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13243 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13244 13245 } else { 13246 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 13247 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13248 emitFMUL_Reg_RegIdx( 13249 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13250 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13251 13252 } else { 13253 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13254 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13255 emitFMUL_Reg_RegInd( 13256 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13257 getBase(MIR_BinaryAcc.getValue(inst))); 13258 } 13259 } 13260 } 13261 } 13262 } 13263 } 13264 } 13265 13266 /** 13267 * Emit the given instruction, assuming that 13268 * it is a MIR_UnaryAcc instruction 13269 * and has a INC operator 13270 * 13271 * @param inst the instruction to assemble 13272 */ 13273 private void doINC(Instruction inst) { 13274 if (isByte(inst)) { 13275 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 13276 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_UnaryAcc.getResult(inst)).isValidAs8bitRegister()); 13277 emitINC_Reg_Byte( 13278 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 13279 13280 } else { 13281 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 13282 emitINC_Abs_Byte( 13283 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 13284 13285 } else { 13286 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 13287 emitINC_RegDisp_Byte( 13288 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13289 13290 } else { 13291 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 13292 emitINC_RegOff_Byte( 13293 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13294 13295 } else { 13296 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 13297 emitINC_RegIdx_Byte( 13298 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13299 13300 } else { 13301 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13302 emitINC_RegInd_Byte( 13303 getBase(MIR_UnaryAcc.getResult(inst))); 13304 } 13305 } 13306 } 13307 } 13308 } 13309 13310 } else { 13311 if (isWord(inst)) { 13312 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 13313 emitINC_Reg_Word( 13314 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 13315 13316 } else { 13317 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 13318 emitINC_Abs_Word( 13319 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 13320 13321 } else { 13322 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 13323 emitINC_RegDisp_Word( 13324 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13325 13326 } else { 13327 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 13328 emitINC_RegOff_Word( 13329 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13330 13331 } else { 13332 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 13333 emitINC_RegIdx_Word( 13334 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13335 13336 } else { 13337 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13338 emitINC_RegInd_Word( 13339 getBase(MIR_UnaryAcc.getResult(inst))); 13340 } 13341 } 13342 } 13343 } 13344 } 13345 13346 } else { 13347 if (isQuad(inst)) { 13348 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 13349 emitINC_Reg_Quad( 13350 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 13351 13352 } else { 13353 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 13354 emitINC_Abs_Quad( 13355 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 13356 13357 } else { 13358 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 13359 emitINC_RegDisp_Quad( 13360 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13361 13362 } else { 13363 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 13364 emitINC_RegOff_Quad( 13365 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13366 13367 } else { 13368 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 13369 emitINC_RegIdx_Quad( 13370 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13371 13372 } else { 13373 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13374 emitINC_RegInd_Quad( 13375 getBase(MIR_UnaryAcc.getResult(inst))); 13376 } 13377 } 13378 } 13379 } 13380 } 13381 13382 } else { 13383 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 13384 emitINC_Reg( 13385 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 13386 13387 } else { 13388 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 13389 emitINC_Abs( 13390 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 13391 13392 } else { 13393 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 13394 emitINC_RegDisp( 13395 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13396 13397 } else { 13398 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 13399 emitINC_RegOff( 13400 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13401 13402 } else { 13403 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 13404 emitINC_RegIdx( 13405 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 13406 13407 } else { 13408 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13409 emitINC_RegInd( 13410 getBase(MIR_UnaryAcc.getResult(inst))); 13411 } 13412 } 13413 } 13414 } 13415 } 13416 } 13417 } 13418 } 13419 } 13420 13421 /** 13422 * Emit the given instruction, assuming that 13423 * it is a MIR_BinaryAcc instruction 13424 * and has a SAL operator 13425 * 13426 * @param inst the instruction to assemble 13427 */ 13428 private void doSAL(Instruction inst) { 13429 if (isImm(MIR_BinaryAcc.getValue(inst))) { 13430 if (isByte(inst)) { 13431 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13432 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 13433 emitSAL_Reg_Imm_Byte( 13434 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13435 getImm(MIR_BinaryAcc.getValue(inst))); 13436 13437 } else { 13438 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13439 emitSAL_Abs_Imm_Byte( 13440 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13441 getImm(MIR_BinaryAcc.getValue(inst))); 13442 13443 } else { 13444 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13445 emitSAL_RegDisp_Imm_Byte( 13446 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13447 getImm(MIR_BinaryAcc.getValue(inst))); 13448 13449 } else { 13450 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13451 emitSAL_RegOff_Imm_Byte( 13452 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13453 getImm(MIR_BinaryAcc.getValue(inst))); 13454 13455 } else { 13456 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13457 emitSAL_RegIdx_Imm_Byte( 13458 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13459 getImm(MIR_BinaryAcc.getValue(inst))); 13460 13461 } else { 13462 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13463 emitSAL_RegInd_Imm_Byte( 13464 getBase(MIR_BinaryAcc.getResult(inst)), 13465 getImm(MIR_BinaryAcc.getValue(inst))); 13466 } 13467 } 13468 } 13469 } 13470 } 13471 13472 } else { 13473 if (isWord(inst)) { 13474 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13475 emitSAL_Reg_Imm_Word( 13476 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13477 getImm(MIR_BinaryAcc.getValue(inst))); 13478 13479 } else { 13480 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13481 emitSAL_Abs_Imm_Word( 13482 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13483 getImm(MIR_BinaryAcc.getValue(inst))); 13484 13485 } else { 13486 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13487 emitSAL_RegDisp_Imm_Word( 13488 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13489 getImm(MIR_BinaryAcc.getValue(inst))); 13490 13491 } else { 13492 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13493 emitSAL_RegOff_Imm_Word( 13494 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13495 getImm(MIR_BinaryAcc.getValue(inst))); 13496 13497 } else { 13498 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13499 emitSAL_RegIdx_Imm_Word( 13500 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13501 getImm(MIR_BinaryAcc.getValue(inst))); 13502 13503 } else { 13504 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13505 emitSAL_RegInd_Imm_Word( 13506 getBase(MIR_BinaryAcc.getResult(inst)), 13507 getImm(MIR_BinaryAcc.getValue(inst))); 13508 } 13509 } 13510 } 13511 } 13512 } 13513 13514 } else { 13515 if (isQuad(inst)) { 13516 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13517 emitSAL_Reg_Imm_Quad( 13518 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13519 getImm(MIR_BinaryAcc.getValue(inst))); 13520 13521 } else { 13522 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13523 emitSAL_Abs_Imm_Quad( 13524 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13525 getImm(MIR_BinaryAcc.getValue(inst))); 13526 13527 } else { 13528 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13529 emitSAL_RegDisp_Imm_Quad( 13530 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13531 getImm(MIR_BinaryAcc.getValue(inst))); 13532 13533 } else { 13534 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13535 emitSAL_RegOff_Imm_Quad( 13536 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13537 getImm(MIR_BinaryAcc.getValue(inst))); 13538 13539 } else { 13540 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13541 emitSAL_RegIdx_Imm_Quad( 13542 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13543 getImm(MIR_BinaryAcc.getValue(inst))); 13544 13545 } else { 13546 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13547 emitSAL_RegInd_Imm_Quad( 13548 getBase(MIR_BinaryAcc.getResult(inst)), 13549 getImm(MIR_BinaryAcc.getValue(inst))); 13550 } 13551 } 13552 } 13553 } 13554 } 13555 13556 } else { 13557 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13558 emitSAL_Reg_Imm( 13559 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13560 getImm(MIR_BinaryAcc.getValue(inst))); 13561 13562 } else { 13563 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13564 emitSAL_Abs_Imm( 13565 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13566 getImm(MIR_BinaryAcc.getValue(inst))); 13567 13568 } else { 13569 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13570 emitSAL_RegDisp_Imm( 13571 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13572 getImm(MIR_BinaryAcc.getValue(inst))); 13573 13574 } else { 13575 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13576 emitSAL_RegOff_Imm( 13577 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13578 getImm(MIR_BinaryAcc.getValue(inst))); 13579 13580 } else { 13581 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13582 emitSAL_RegIdx_Imm( 13583 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13584 getImm(MIR_BinaryAcc.getValue(inst))); 13585 13586 } else { 13587 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13588 emitSAL_RegInd_Imm( 13589 getBase(MIR_BinaryAcc.getResult(inst)), 13590 getImm(MIR_BinaryAcc.getValue(inst))); 13591 } 13592 } 13593 } 13594 } 13595 } 13596 } 13597 } 13598 } 13599 13600 } else { 13601 if (isByte(inst)) { 13602 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13603 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13604 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 13605 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 13606 emitSAL_Reg_Reg_Byte( 13607 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13608 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13609 13610 } else { 13611 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13612 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13613 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 13614 emitSAL_Abs_Reg_Byte( 13615 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13616 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13617 13618 } else { 13619 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13620 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13621 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 13622 emitSAL_RegDisp_Reg_Byte( 13623 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13624 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13625 13626 } else { 13627 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13628 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13629 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 13630 emitSAL_RegOff_Reg_Byte( 13631 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13632 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13633 13634 } else { 13635 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13636 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13637 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 13638 emitSAL_RegIdx_Reg_Byte( 13639 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13640 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13641 13642 } else { 13643 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13644 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13645 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 13646 emitSAL_RegInd_Reg_Byte( 13647 getBase(MIR_BinaryAcc.getResult(inst)), 13648 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13649 } 13650 } 13651 } 13652 } 13653 } 13654 13655 } else { 13656 if (isWord(inst)) { 13657 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13658 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13659 emitSAL_Reg_Reg_Word( 13660 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13661 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13662 13663 } else { 13664 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13665 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13666 emitSAL_Abs_Reg_Word( 13667 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13668 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13669 13670 } else { 13671 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13672 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13673 emitSAL_RegDisp_Reg_Word( 13674 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13675 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13676 13677 } else { 13678 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13679 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13680 emitSAL_RegOff_Reg_Word( 13681 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13682 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13683 13684 } else { 13685 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13686 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13687 emitSAL_RegIdx_Reg_Word( 13688 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13689 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13690 13691 } else { 13692 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13693 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13694 emitSAL_RegInd_Reg_Word( 13695 getBase(MIR_BinaryAcc.getResult(inst)), 13696 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13697 } 13698 } 13699 } 13700 } 13701 } 13702 13703 } else { 13704 if (isQuad(inst)) { 13705 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13706 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13707 emitSAL_Reg_Reg_Quad( 13708 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13709 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13710 13711 } else { 13712 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13713 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13714 emitSAL_Abs_Reg_Quad( 13715 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13716 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13717 13718 } else { 13719 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13720 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13721 emitSAL_RegDisp_Reg_Quad( 13722 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13723 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13724 13725 } else { 13726 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13727 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13728 emitSAL_RegOff_Reg_Quad( 13729 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13730 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13731 13732 } else { 13733 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13734 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13735 emitSAL_RegIdx_Reg_Quad( 13736 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13737 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13738 13739 } else { 13740 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13741 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13742 emitSAL_RegInd_Reg_Quad( 13743 getBase(MIR_BinaryAcc.getResult(inst)), 13744 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13745 } 13746 } 13747 } 13748 } 13749 } 13750 13751 } else { 13752 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13753 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13754 emitSAL_Reg_Reg( 13755 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13756 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13757 13758 } else { 13759 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13760 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13761 emitSAL_Abs_Reg( 13762 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13763 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13764 13765 } else { 13766 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13767 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13768 emitSAL_RegDisp_Reg( 13769 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13770 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13771 13772 } else { 13773 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13774 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13775 emitSAL_RegOff_Reg( 13776 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13777 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13778 13779 } else { 13780 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13781 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13782 emitSAL_RegIdx_Reg( 13783 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13784 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13785 13786 } else { 13787 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13788 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13789 emitSAL_RegInd_Reg( 13790 getBase(MIR_BinaryAcc.getResult(inst)), 13791 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 13792 } 13793 } 13794 } 13795 } 13796 } 13797 } 13798 } 13799 } 13800 } 13801 } 13802 13803 /** 13804 * Emit the given instruction, assuming that 13805 * it is a MIR_BinaryAcc instruction 13806 * and has a FDIVP operator 13807 * 13808 * @param inst the instruction to assemble 13809 */ 13810 private void doFDIVP(Instruction inst) { 13811 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13812 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13813 emitFDIVP_Reg_Reg( 13814 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 13815 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 13816 } 13817 13818 /** 13819 * Emit the given instruction, assuming that 13820 * it is a MIR_BinaryAcc instruction 13821 * and has a CMPUNORDSD operator 13822 * 13823 * @param inst the instruction to assemble 13824 */ 13825 private void doCMPUNORDSD(Instruction inst) { 13826 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 13827 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13828 emitCMPUNORDSD_Reg_Reg( 13829 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 13830 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 13831 13832 } else { 13833 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 13834 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13835 emitCMPUNORDSD_Reg_Abs( 13836 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 13837 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 13838 13839 } else { 13840 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 13841 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13842 emitCMPUNORDSD_Reg_RegDisp( 13843 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 13844 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13845 13846 } else { 13847 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 13848 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13849 emitCMPUNORDSD_Reg_RegOff( 13850 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 13851 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13852 13853 } else { 13854 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 13855 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13856 emitCMPUNORDSD_Reg_RegIdx( 13857 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 13858 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 13859 13860 } else { 13861 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13862 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13863 emitCMPUNORDSD_Reg_RegInd( 13864 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 13865 getBase(MIR_BinaryAcc.getValue(inst))); 13866 } 13867 } 13868 } 13869 } 13870 } 13871 } 13872 13873 /** 13874 * Emit the given instruction, assuming that 13875 * it is a MIR_BinaryAcc instruction 13876 * and has a SAR operator 13877 * 13878 * @param inst the instruction to assemble 13879 */ 13880 private void doSAR(Instruction inst) { 13881 if (isImm(MIR_BinaryAcc.getValue(inst))) { 13882 if (isByte(inst)) { 13883 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13884 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 13885 emitSAR_Reg_Imm_Byte( 13886 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13887 getImm(MIR_BinaryAcc.getValue(inst))); 13888 13889 } else { 13890 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13891 emitSAR_Abs_Imm_Byte( 13892 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13893 getImm(MIR_BinaryAcc.getValue(inst))); 13894 13895 } else { 13896 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13897 emitSAR_RegDisp_Imm_Byte( 13898 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13899 getImm(MIR_BinaryAcc.getValue(inst))); 13900 13901 } else { 13902 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13903 emitSAR_RegOff_Imm_Byte( 13904 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13905 getImm(MIR_BinaryAcc.getValue(inst))); 13906 13907 } else { 13908 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13909 emitSAR_RegIdx_Imm_Byte( 13910 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13911 getImm(MIR_BinaryAcc.getValue(inst))); 13912 13913 } else { 13914 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13915 emitSAR_RegInd_Imm_Byte( 13916 getBase(MIR_BinaryAcc.getResult(inst)), 13917 getImm(MIR_BinaryAcc.getValue(inst))); 13918 } 13919 } 13920 } 13921 } 13922 } 13923 13924 } else { 13925 if (isWord(inst)) { 13926 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13927 emitSAR_Reg_Imm_Word( 13928 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13929 getImm(MIR_BinaryAcc.getValue(inst))); 13930 13931 } else { 13932 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13933 emitSAR_Abs_Imm_Word( 13934 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13935 getImm(MIR_BinaryAcc.getValue(inst))); 13936 13937 } else { 13938 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13939 emitSAR_RegDisp_Imm_Word( 13940 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13941 getImm(MIR_BinaryAcc.getValue(inst))); 13942 13943 } else { 13944 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13945 emitSAR_RegOff_Imm_Word( 13946 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13947 getImm(MIR_BinaryAcc.getValue(inst))); 13948 13949 } else { 13950 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13951 emitSAR_RegIdx_Imm_Word( 13952 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13953 getImm(MIR_BinaryAcc.getValue(inst))); 13954 13955 } else { 13956 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13957 emitSAR_RegInd_Imm_Word( 13958 getBase(MIR_BinaryAcc.getResult(inst)), 13959 getImm(MIR_BinaryAcc.getValue(inst))); 13960 } 13961 } 13962 } 13963 } 13964 } 13965 13966 } else { 13967 if (isQuad(inst)) { 13968 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 13969 emitSAR_Reg_Imm_Quad( 13970 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 13971 getImm(MIR_BinaryAcc.getValue(inst))); 13972 13973 } else { 13974 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 13975 emitSAR_Abs_Imm_Quad( 13976 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 13977 getImm(MIR_BinaryAcc.getValue(inst))); 13978 13979 } else { 13980 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 13981 emitSAR_RegDisp_Imm_Quad( 13982 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13983 getImm(MIR_BinaryAcc.getValue(inst))); 13984 13985 } else { 13986 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 13987 emitSAR_RegOff_Imm_Quad( 13988 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13989 getImm(MIR_BinaryAcc.getValue(inst))); 13990 13991 } else { 13992 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 13993 emitSAR_RegIdx_Imm_Quad( 13994 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 13995 getImm(MIR_BinaryAcc.getValue(inst))); 13996 13997 } else { 13998 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 13999 emitSAR_RegInd_Imm_Quad( 14000 getBase(MIR_BinaryAcc.getResult(inst)), 14001 getImm(MIR_BinaryAcc.getValue(inst))); 14002 } 14003 } 14004 } 14005 } 14006 } 14007 14008 } else { 14009 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 14010 emitSAR_Reg_Imm( 14011 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14012 getImm(MIR_BinaryAcc.getValue(inst))); 14013 14014 } else { 14015 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 14016 emitSAR_Abs_Imm( 14017 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 14018 getImm(MIR_BinaryAcc.getValue(inst))); 14019 14020 } else { 14021 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 14022 emitSAR_RegDisp_Imm( 14023 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14024 getImm(MIR_BinaryAcc.getValue(inst))); 14025 14026 } else { 14027 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 14028 emitSAR_RegOff_Imm( 14029 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14030 getImm(MIR_BinaryAcc.getValue(inst))); 14031 14032 } else { 14033 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 14034 emitSAR_RegIdx_Imm( 14035 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14036 getImm(MIR_BinaryAcc.getValue(inst))); 14037 14038 } else { 14039 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14040 emitSAR_RegInd_Imm( 14041 getBase(MIR_BinaryAcc.getResult(inst)), 14042 getImm(MIR_BinaryAcc.getValue(inst))); 14043 } 14044 } 14045 } 14046 } 14047 } 14048 } 14049 } 14050 } 14051 14052 } else { 14053 if (isByte(inst)) { 14054 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 14055 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14056 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 14057 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 14058 emitSAR_Reg_Reg_Byte( 14059 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14060 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14061 14062 } else { 14063 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 14064 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14065 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 14066 emitSAR_Abs_Reg_Byte( 14067 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 14068 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14069 14070 } else { 14071 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 14072 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14073 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 14074 emitSAR_RegDisp_Reg_Byte( 14075 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14076 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14077 14078 } else { 14079 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 14080 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14081 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 14082 emitSAR_RegOff_Reg_Byte( 14083 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14084 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14085 14086 } else { 14087 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 14088 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14089 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 14090 emitSAR_RegIdx_Reg_Byte( 14091 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14092 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14093 14094 } else { 14095 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14096 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14097 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 14098 emitSAR_RegInd_Reg_Byte( 14099 getBase(MIR_BinaryAcc.getResult(inst)), 14100 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14101 } 14102 } 14103 } 14104 } 14105 } 14106 14107 } else { 14108 if (isWord(inst)) { 14109 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 14110 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14111 emitSAR_Reg_Reg_Word( 14112 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14113 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14114 14115 } else { 14116 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 14117 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14118 emitSAR_Abs_Reg_Word( 14119 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 14120 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14121 14122 } else { 14123 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 14124 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14125 emitSAR_RegDisp_Reg_Word( 14126 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14127 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14128 14129 } else { 14130 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 14131 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14132 emitSAR_RegOff_Reg_Word( 14133 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14134 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14135 14136 } else { 14137 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 14138 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14139 emitSAR_RegIdx_Reg_Word( 14140 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14141 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14142 14143 } else { 14144 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14145 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14146 emitSAR_RegInd_Reg_Word( 14147 getBase(MIR_BinaryAcc.getResult(inst)), 14148 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14149 } 14150 } 14151 } 14152 } 14153 } 14154 14155 } else { 14156 if (isQuad(inst)) { 14157 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 14158 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14159 emitSAR_Reg_Reg_Quad( 14160 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14161 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14162 14163 } else { 14164 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 14165 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14166 emitSAR_Abs_Reg_Quad( 14167 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 14168 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14169 14170 } else { 14171 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 14172 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14173 emitSAR_RegDisp_Reg_Quad( 14174 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14175 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14176 14177 } else { 14178 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 14179 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14180 emitSAR_RegOff_Reg_Quad( 14181 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14182 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14183 14184 } else { 14185 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 14186 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14187 emitSAR_RegIdx_Reg_Quad( 14188 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14189 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14190 14191 } else { 14192 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14193 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14194 emitSAR_RegInd_Reg_Quad( 14195 getBase(MIR_BinaryAcc.getResult(inst)), 14196 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14197 } 14198 } 14199 } 14200 } 14201 } 14202 14203 } else { 14204 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 14205 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14206 emitSAR_Reg_Reg( 14207 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14208 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14209 14210 } else { 14211 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 14212 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14213 emitSAR_Abs_Reg( 14214 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 14215 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14216 14217 } else { 14218 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 14219 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14220 emitSAR_RegDisp_Reg( 14221 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14222 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14223 14224 } else { 14225 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 14226 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14227 emitSAR_RegOff_Reg( 14228 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14229 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14230 14231 } else { 14232 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 14233 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14234 emitSAR_RegIdx_Reg( 14235 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14236 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14237 14238 } else { 14239 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14240 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14241 emitSAR_RegInd_Reg( 14242 getBase(MIR_BinaryAcc.getResult(inst)), 14243 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14244 } 14245 } 14246 } 14247 } 14248 } 14249 } 14250 } 14251 } 14252 } 14253 } 14254 14255 /** 14256 * Emit the given instruction, assuming that 14257 * it is a MIR_CompareExchange8B instruction 14258 * and has a CMPXCHG8B operator 14259 * 14260 * @param inst the instruction to assemble 14261 */ 14262 private void doCMPXCHG8B(Instruction inst) { 14263 if (isAbs(MIR_CompareExchange8B.getMemAddr(inst))) { 14264 emitCMPXCHG8B_Abs( 14265 getDisp(MIR_CompareExchange8B.getMemAddr(inst)).toWord().toAddress()); 14266 14267 } else { 14268 if (isRegDisp(MIR_CompareExchange8B.getMemAddr(inst))) { 14269 emitCMPXCHG8B_RegDisp( 14270 getBase(MIR_CompareExchange8B.getMemAddr(inst)), getDisp(MIR_CompareExchange8B.getMemAddr(inst))); 14271 14272 } else { 14273 if (isRegOff(MIR_CompareExchange8B.getMemAddr(inst))) { 14274 emitCMPXCHG8B_RegOff( 14275 getIndex(MIR_CompareExchange8B.getMemAddr(inst)), getScale(MIR_CompareExchange8B.getMemAddr(inst)), getDisp(MIR_CompareExchange8B.getMemAddr(inst))); 14276 14277 } else { 14278 if (isRegIdx(MIR_CompareExchange8B.getMemAddr(inst))) { 14279 emitCMPXCHG8B_RegIdx( 14280 getBase(MIR_CompareExchange8B.getMemAddr(inst)), getIndex(MIR_CompareExchange8B.getMemAddr(inst)), getScale(MIR_CompareExchange8B.getMemAddr(inst)), getDisp(MIR_CompareExchange8B.getMemAddr(inst))); 14281 14282 } else { 14283 if (VM.VerifyAssertions && !isRegInd(MIR_CompareExchange8B.getMemAddr(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14284 emitCMPXCHG8B_RegInd( 14285 getBase(MIR_CompareExchange8B.getMemAddr(inst))); 14286 } 14287 } 14288 } 14289 } 14290 } 14291 14292 /** 14293 * Emit the given instruction, assuming that 14294 * it is a MIR_BinaryAcc instruction 14295 * and has a SUBSD operator 14296 * 14297 * @param inst the instruction to assemble 14298 */ 14299 private void doSUBSD(Instruction inst) { 14300 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 14301 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14302 emitSUBSD_Reg_Reg( 14303 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14304 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 14305 14306 } else { 14307 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 14308 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14309 emitSUBSD_Reg_Abs( 14310 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14311 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 14312 14313 } else { 14314 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 14315 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14316 emitSUBSD_Reg_RegDisp( 14317 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14318 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14319 14320 } else { 14321 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 14322 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14323 emitSUBSD_Reg_RegOff( 14324 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14325 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14326 14327 } else { 14328 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 14329 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14330 emitSUBSD_Reg_RegIdx( 14331 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14332 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14333 14334 } else { 14335 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14336 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14337 emitSUBSD_Reg_RegInd( 14338 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14339 getBase(MIR_BinaryAcc.getValue(inst))); 14340 } 14341 } 14342 } 14343 } 14344 } 14345 } 14346 14347 /** 14348 * Emit the given instruction, assuming that 14349 * it is a MIR_Unary instruction 14350 * and has a FSTSW operator 14351 * 14352 * @param inst the instruction to assemble 14353 */ 14354 private void doFSTSW(Instruction inst) { 14355 if (isGPR_Reg(MIR_Unary.getResult(inst))) { 14356 emitFSTSW_Reg( 14357 getGPR_Reg(MIR_Unary.getResult(inst))); 14358 14359 } else { 14360 if (isAbs(MIR_Unary.getResult(inst))) { 14361 emitFSTSW_Abs( 14362 getDisp(MIR_Unary.getResult(inst)).toWord().toAddress()); 14363 14364 } else { 14365 if (isRegDisp(MIR_Unary.getResult(inst))) { 14366 emitFSTSW_RegDisp( 14367 getBase(MIR_Unary.getResult(inst)), getDisp(MIR_Unary.getResult(inst))); 14368 14369 } else { 14370 if (isRegOff(MIR_Unary.getResult(inst))) { 14371 emitFSTSW_RegOff( 14372 getIndex(MIR_Unary.getResult(inst)), getScale(MIR_Unary.getResult(inst)), getDisp(MIR_Unary.getResult(inst))); 14373 14374 } else { 14375 if (isRegIdx(MIR_Unary.getResult(inst))) { 14376 emitFSTSW_RegIdx( 14377 getBase(MIR_Unary.getResult(inst)), getIndex(MIR_Unary.getResult(inst)), getScale(MIR_Unary.getResult(inst)), getDisp(MIR_Unary.getResult(inst))); 14378 14379 } else { 14380 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14381 emitFSTSW_RegInd( 14382 getBase(MIR_Unary.getResult(inst))); 14383 } 14384 } 14385 } 14386 } 14387 } 14388 } 14389 14390 /** 14391 * Emit the given instruction, assuming that 14392 * it is a MIR_BinaryAcc instruction 14393 * and has a FADDP operator 14394 * 14395 * @param inst the instruction to assemble 14396 */ 14397 private void doFADDP(Instruction inst) { 14398 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14399 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14400 emitFADDP_Reg_Reg( 14401 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 14402 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 14403 } 14404 14405 /** 14406 * Emit the given instruction, assuming that 14407 * it is a MIR_UnaryNoRes instruction 14408 * and has a FLDCW operator 14409 * 14410 * @param inst the instruction to assemble 14411 */ 14412 private void doFLDCW(Instruction inst) { 14413 if (isAbs(MIR_UnaryNoRes.getVal(inst))) { 14414 emitFLDCW_Abs( 14415 getDisp(MIR_UnaryNoRes.getVal(inst)).toWord().toAddress()); 14416 14417 } else { 14418 if (isRegDisp(MIR_UnaryNoRes.getVal(inst))) { 14419 emitFLDCW_RegDisp( 14420 getBase(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 14421 14422 } else { 14423 if (isRegOff(MIR_UnaryNoRes.getVal(inst))) { 14424 emitFLDCW_RegOff( 14425 getIndex(MIR_UnaryNoRes.getVal(inst)), getScale(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 14426 14427 } else { 14428 if (isRegIdx(MIR_UnaryNoRes.getVal(inst))) { 14429 emitFLDCW_RegIdx( 14430 getBase(MIR_UnaryNoRes.getVal(inst)), getIndex(MIR_UnaryNoRes.getVal(inst)), getScale(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 14431 14432 } else { 14433 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryNoRes.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14434 emitFLDCW_RegInd( 14435 getBase(MIR_UnaryNoRes.getVal(inst))); 14436 } 14437 } 14438 } 14439 } 14440 } 14441 14442 /** 14443 * Emit the given instruction, assuming that 14444 * it is a MIR_FSave instruction 14445 * and has a FRSTOR operator 14446 * 14447 * @param inst the instruction to assemble 14448 */ 14449 private void doFRSTOR(Instruction inst) { 14450 if (isAbs(MIR_FSave.getDestination(inst))) { 14451 emitFRSTOR_Abs( 14452 getDisp(MIR_FSave.getDestination(inst)).toWord().toAddress()); 14453 14454 } else { 14455 if (isRegDisp(MIR_FSave.getDestination(inst))) { 14456 emitFRSTOR_RegDisp( 14457 getBase(MIR_FSave.getDestination(inst)), getDisp(MIR_FSave.getDestination(inst))); 14458 14459 } else { 14460 if (isRegOff(MIR_FSave.getDestination(inst))) { 14461 emitFRSTOR_RegOff( 14462 getIndex(MIR_FSave.getDestination(inst)), getScale(MIR_FSave.getDestination(inst)), getDisp(MIR_FSave.getDestination(inst))); 14463 14464 } else { 14465 if (isRegIdx(MIR_FSave.getDestination(inst))) { 14466 emitFRSTOR_RegIdx( 14467 getBase(MIR_FSave.getDestination(inst)), getIndex(MIR_FSave.getDestination(inst)), getScale(MIR_FSave.getDestination(inst)), getDisp(MIR_FSave.getDestination(inst))); 14468 14469 } else { 14470 if (VM.VerifyAssertions && !isRegInd(MIR_FSave.getDestination(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14471 emitFRSTOR_RegInd( 14472 getBase(MIR_FSave.getDestination(inst))); 14473 } 14474 } 14475 } 14476 } 14477 } 14478 14479 /** 14480 * Emit the given instruction, assuming that 14481 * it is a MIR_CondMove instruction 14482 * and has a CMOV operator 14483 * 14484 * @param inst the instruction to assemble 14485 */ 14486 private void doCMOV(Instruction inst) { 14487 if (isGPR_Reg(MIR_CondMove.getValue(inst))) { 14488 if (VM.VerifyAssertions && !isCond(MIR_CondMove.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14489 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CondMove.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14490 emitCMOV_Cond_Reg_Reg( 14491 getCond(MIR_CondMove.getCond(inst)), 14492 getGPR_Reg(MIR_CondMove.getResult(inst)), 14493 getGPR_Reg(MIR_CondMove.getValue(inst))); 14494 14495 } else { 14496 if (isAbs(MIR_CondMove.getValue(inst))) { 14497 if (VM.VerifyAssertions && !isCond(MIR_CondMove.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14498 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CondMove.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14499 emitCMOV_Cond_Reg_Abs( 14500 getCond(MIR_CondMove.getCond(inst)), 14501 getGPR_Reg(MIR_CondMove.getResult(inst)), 14502 getDisp(MIR_CondMove.getValue(inst)).toWord().toAddress()); 14503 14504 } else { 14505 if (isRegDisp(MIR_CondMove.getValue(inst))) { 14506 if (VM.VerifyAssertions && !isCond(MIR_CondMove.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14507 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CondMove.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14508 emitCMOV_Cond_Reg_RegDisp( 14509 getCond(MIR_CondMove.getCond(inst)), 14510 getGPR_Reg(MIR_CondMove.getResult(inst)), 14511 getBase(MIR_CondMove.getValue(inst)), getDisp(MIR_CondMove.getValue(inst))); 14512 14513 } else { 14514 if (isRegOff(MIR_CondMove.getValue(inst))) { 14515 if (VM.VerifyAssertions && !isCond(MIR_CondMove.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14516 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CondMove.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14517 emitCMOV_Cond_Reg_RegOff( 14518 getCond(MIR_CondMove.getCond(inst)), 14519 getGPR_Reg(MIR_CondMove.getResult(inst)), 14520 getIndex(MIR_CondMove.getValue(inst)), getScale(MIR_CondMove.getValue(inst)), getDisp(MIR_CondMove.getValue(inst))); 14521 14522 } else { 14523 if (isRegIdx(MIR_CondMove.getValue(inst))) { 14524 if (VM.VerifyAssertions && !isCond(MIR_CondMove.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14525 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CondMove.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14526 emitCMOV_Cond_Reg_RegIdx( 14527 getCond(MIR_CondMove.getCond(inst)), 14528 getGPR_Reg(MIR_CondMove.getResult(inst)), 14529 getBase(MIR_CondMove.getValue(inst)), getIndex(MIR_CondMove.getValue(inst)), getScale(MIR_CondMove.getValue(inst)), getDisp(MIR_CondMove.getValue(inst))); 14530 14531 } else { 14532 if (VM.VerifyAssertions && !isCond(MIR_CondMove.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14533 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CondMove.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14534 if (VM.VerifyAssertions && !isRegInd(MIR_CondMove.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14535 emitCMOV_Cond_Reg_RegInd( 14536 getCond(MIR_CondMove.getCond(inst)), 14537 getGPR_Reg(MIR_CondMove.getResult(inst)), 14538 getBase(MIR_CondMove.getValue(inst))); 14539 } 14540 } 14541 } 14542 } 14543 } 14544 } 14545 14546 /** 14547 * Emit the given instruction, assuming that 14548 * it is a MIR_Trap instruction 14549 * and has a INT operator 14550 * 14551 * @param inst the instruction to assemble 14552 */ 14553 private void doINT(Instruction inst) { 14554 if (VM.VerifyAssertions && !isImm(MIR_Trap.getTrapCode(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14555 emitINT_Imm( 14556 getImm(MIR_Trap.getTrapCode(inst))); 14557 } 14558 14559 /** 14560 * Emit the given instruction, assuming that 14561 * it is a MIR_BinaryAcc instruction 14562 * and has a CMPLTSD operator 14563 * 14564 * @param inst the instruction to assemble 14565 */ 14566 private void doCMPLTSD(Instruction inst) { 14567 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 14568 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14569 emitCMPLTSD_Reg_Reg( 14570 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14571 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 14572 14573 } else { 14574 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 14575 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14576 emitCMPLTSD_Reg_Abs( 14577 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14578 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 14579 14580 } else { 14581 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 14582 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14583 emitCMPLTSD_Reg_RegDisp( 14584 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14585 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14586 14587 } else { 14588 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 14589 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14590 emitCMPLTSD_Reg_RegOff( 14591 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14592 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14593 14594 } else { 14595 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 14596 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14597 emitCMPLTSD_Reg_RegIdx( 14598 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14599 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14600 14601 } else { 14602 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14603 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14604 emitCMPLTSD_Reg_RegInd( 14605 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 14606 getBase(MIR_BinaryAcc.getValue(inst))); 14607 } 14608 } 14609 } 14610 } 14611 } 14612 } 14613 14614 /** 14615 * Emit the given instruction, assuming that 14616 * it is a MIR_Unary instruction 14617 * and has a CVTSD2SS operator 14618 * 14619 * @param inst the instruction to assemble 14620 */ 14621 private void doCVTSD2SS(Instruction inst) { 14622 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 14623 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14624 emitCVTSD2SS_Reg_Reg( 14625 getXMM_Reg(MIR_Unary.getResult(inst)), 14626 getXMM_Reg(MIR_Unary.getVal(inst))); 14627 14628 } else { 14629 if (isAbs(MIR_Unary.getVal(inst))) { 14630 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14631 emitCVTSD2SS_Reg_Abs( 14632 getXMM_Reg(MIR_Unary.getResult(inst)), 14633 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 14634 14635 } else { 14636 if (isRegDisp(MIR_Unary.getVal(inst))) { 14637 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14638 emitCVTSD2SS_Reg_RegDisp( 14639 getXMM_Reg(MIR_Unary.getResult(inst)), 14640 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 14641 14642 } else { 14643 if (isRegOff(MIR_Unary.getVal(inst))) { 14644 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14645 emitCVTSD2SS_Reg_RegOff( 14646 getXMM_Reg(MIR_Unary.getResult(inst)), 14647 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 14648 14649 } else { 14650 if (isRegIdx(MIR_Unary.getVal(inst))) { 14651 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14652 emitCVTSD2SS_Reg_RegIdx( 14653 getXMM_Reg(MIR_Unary.getResult(inst)), 14654 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 14655 14656 } else { 14657 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14658 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14659 emitCVTSD2SS_Reg_RegInd( 14660 getXMM_Reg(MIR_Unary.getResult(inst)), 14661 getBase(MIR_Unary.getVal(inst))); 14662 } 14663 } 14664 } 14665 } 14666 } 14667 } 14668 14669 /** 14670 * Emit the given instruction, assuming that 14671 * it is a MIR_BinaryAcc instruction 14672 * and has a SBB operator 14673 * 14674 * @param inst the instruction to assemble 14675 */ 14676 private void doSBB(Instruction inst) { 14677 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 14678 if (isByte(inst)) { 14679 if (isImm(MIR_BinaryAcc.getValue(inst))) { 14680 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 14681 emitSBB_Reg_Imm_Byte( 14682 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14683 getImm(MIR_BinaryAcc.getValue(inst))); 14684 14685 } else { 14686 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 14687 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 14688 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 14689 emitSBB_Reg_Reg_Byte( 14690 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14691 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14692 14693 } else { 14694 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 14695 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 14696 emitSBB_Reg_Abs_Byte( 14697 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14698 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 14699 14700 } else { 14701 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 14702 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 14703 emitSBB_Reg_RegDisp_Byte( 14704 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14705 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14706 14707 } else { 14708 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 14709 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 14710 emitSBB_Reg_RegOff_Byte( 14711 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14712 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14713 14714 } else { 14715 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 14716 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 14717 emitSBB_Reg_RegIdx_Byte( 14718 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14719 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14720 14721 } else { 14722 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14723 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 14724 emitSBB_Reg_RegInd_Byte( 14725 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14726 getBase(MIR_BinaryAcc.getValue(inst))); 14727 } 14728 } 14729 } 14730 } 14731 } 14732 } 14733 14734 } else { 14735 if (isWord(inst)) { 14736 if (isImm(MIR_BinaryAcc.getValue(inst))) { 14737 emitSBB_Reg_Imm_Word( 14738 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14739 getImm(MIR_BinaryAcc.getValue(inst))); 14740 14741 } else { 14742 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 14743 emitSBB_Reg_Reg_Word( 14744 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14745 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14746 14747 } else { 14748 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 14749 emitSBB_Reg_Abs_Word( 14750 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14751 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 14752 14753 } else { 14754 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 14755 emitSBB_Reg_RegDisp_Word( 14756 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14757 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14758 14759 } else { 14760 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 14761 emitSBB_Reg_RegOff_Word( 14762 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14763 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14764 14765 } else { 14766 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 14767 emitSBB_Reg_RegIdx_Word( 14768 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14769 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14770 14771 } else { 14772 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14773 emitSBB_Reg_RegInd_Word( 14774 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14775 getBase(MIR_BinaryAcc.getValue(inst))); 14776 } 14777 } 14778 } 14779 } 14780 } 14781 } 14782 14783 } else { 14784 if (isQuad(inst)) { 14785 if (isImm(MIR_BinaryAcc.getValue(inst))) { 14786 emitSBB_Reg_Imm_Quad( 14787 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14788 getImm(MIR_BinaryAcc.getValue(inst))); 14789 14790 } else { 14791 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 14792 emitSBB_Reg_Reg_Quad( 14793 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14794 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14795 14796 } else { 14797 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 14798 emitSBB_Reg_Abs_Quad( 14799 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14800 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 14801 14802 } else { 14803 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 14804 emitSBB_Reg_RegDisp_Quad( 14805 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14806 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14807 14808 } else { 14809 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 14810 emitSBB_Reg_RegOff_Quad( 14811 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14812 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14813 14814 } else { 14815 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 14816 emitSBB_Reg_RegIdx_Quad( 14817 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14818 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14819 14820 } else { 14821 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14822 emitSBB_Reg_RegInd_Quad( 14823 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14824 getBase(MIR_BinaryAcc.getValue(inst))); 14825 } 14826 } 14827 } 14828 } 14829 } 14830 } 14831 14832 } else { 14833 if (isImm(MIR_BinaryAcc.getValue(inst))) { 14834 emitSBB_Reg_Imm( 14835 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14836 getImm(MIR_BinaryAcc.getValue(inst))); 14837 14838 } else { 14839 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 14840 emitSBB_Reg_Reg( 14841 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14842 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 14843 14844 } else { 14845 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 14846 emitSBB_Reg_Abs( 14847 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14848 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 14849 14850 } else { 14851 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 14852 emitSBB_Reg_RegDisp( 14853 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14854 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14855 14856 } else { 14857 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 14858 emitSBB_Reg_RegOff( 14859 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14860 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14861 14862 } else { 14863 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 14864 emitSBB_Reg_RegIdx( 14865 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14866 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 14867 14868 } else { 14869 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14870 emitSBB_Reg_RegInd( 14871 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 14872 getBase(MIR_BinaryAcc.getValue(inst))); 14873 } 14874 } 14875 } 14876 } 14877 } 14878 } 14879 } 14880 } 14881 } 14882 14883 } else { 14884 if (isImm(MIR_BinaryAcc.getValue(inst))) { 14885 if (isByte(inst)) { 14886 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 14887 emitSBB_Abs_Imm_Byte( 14888 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 14889 getImm(MIR_BinaryAcc.getValue(inst))); 14890 14891 } else { 14892 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 14893 emitSBB_RegDisp_Imm_Byte( 14894 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14895 getImm(MIR_BinaryAcc.getValue(inst))); 14896 14897 } else { 14898 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 14899 emitSBB_RegOff_Imm_Byte( 14900 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14901 getImm(MIR_BinaryAcc.getValue(inst))); 14902 14903 } else { 14904 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 14905 emitSBB_RegIdx_Imm_Byte( 14906 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14907 getImm(MIR_BinaryAcc.getValue(inst))); 14908 14909 } else { 14910 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14911 emitSBB_RegInd_Imm_Byte( 14912 getBase(MIR_BinaryAcc.getResult(inst)), 14913 getImm(MIR_BinaryAcc.getValue(inst))); 14914 } 14915 } 14916 } 14917 } 14918 14919 } else { 14920 if (isWord(inst)) { 14921 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 14922 emitSBB_Abs_Imm_Word( 14923 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 14924 getImm(MIR_BinaryAcc.getValue(inst))); 14925 14926 } else { 14927 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 14928 emitSBB_RegDisp_Imm_Word( 14929 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14930 getImm(MIR_BinaryAcc.getValue(inst))); 14931 14932 } else { 14933 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 14934 emitSBB_RegOff_Imm_Word( 14935 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14936 getImm(MIR_BinaryAcc.getValue(inst))); 14937 14938 } else { 14939 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 14940 emitSBB_RegIdx_Imm_Word( 14941 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14942 getImm(MIR_BinaryAcc.getValue(inst))); 14943 14944 } else { 14945 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14946 emitSBB_RegInd_Imm_Word( 14947 getBase(MIR_BinaryAcc.getResult(inst)), 14948 getImm(MIR_BinaryAcc.getValue(inst))); 14949 } 14950 } 14951 } 14952 } 14953 14954 } else { 14955 if (isQuad(inst)) { 14956 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 14957 emitSBB_Abs_Imm_Quad( 14958 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 14959 getImm(MIR_BinaryAcc.getValue(inst))); 14960 14961 } else { 14962 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 14963 emitSBB_RegDisp_Imm_Quad( 14964 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14965 getImm(MIR_BinaryAcc.getValue(inst))); 14966 14967 } else { 14968 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 14969 emitSBB_RegOff_Imm_Quad( 14970 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14971 getImm(MIR_BinaryAcc.getValue(inst))); 14972 14973 } else { 14974 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 14975 emitSBB_RegIdx_Imm_Quad( 14976 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14977 getImm(MIR_BinaryAcc.getValue(inst))); 14978 14979 } else { 14980 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 14981 emitSBB_RegInd_Imm_Quad( 14982 getBase(MIR_BinaryAcc.getResult(inst)), 14983 getImm(MIR_BinaryAcc.getValue(inst))); 14984 } 14985 } 14986 } 14987 } 14988 14989 } else { 14990 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 14991 emitSBB_Abs_Imm( 14992 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 14993 getImm(MIR_BinaryAcc.getValue(inst))); 14994 14995 } else { 14996 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 14997 emitSBB_RegDisp_Imm( 14998 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 14999 getImm(MIR_BinaryAcc.getValue(inst))); 15000 15001 } else { 15002 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15003 emitSBB_RegOff_Imm( 15004 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15005 getImm(MIR_BinaryAcc.getValue(inst))); 15006 15007 } else { 15008 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15009 emitSBB_RegIdx_Imm( 15010 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15011 getImm(MIR_BinaryAcc.getValue(inst))); 15012 15013 } else { 15014 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15015 emitSBB_RegInd_Imm( 15016 getBase(MIR_BinaryAcc.getResult(inst)), 15017 getImm(MIR_BinaryAcc.getValue(inst))); 15018 } 15019 } 15020 } 15021 } 15022 } 15023 } 15024 } 15025 15026 } else { 15027 if (isByte(inst)) { 15028 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15029 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15030 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15031 emitSBB_Abs_Reg_Byte( 15032 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15033 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15034 15035 } else { 15036 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15037 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15038 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15039 emitSBB_RegDisp_Reg_Byte( 15040 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15041 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15042 15043 } else { 15044 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15045 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15046 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15047 emitSBB_RegOff_Reg_Byte( 15048 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15049 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15050 15051 } else { 15052 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15053 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15054 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15055 emitSBB_RegIdx_Reg_Byte( 15056 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15057 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15058 15059 } else { 15060 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15061 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15062 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15063 emitSBB_RegInd_Reg_Byte( 15064 getBase(MIR_BinaryAcc.getResult(inst)), 15065 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15066 } 15067 } 15068 } 15069 } 15070 15071 } else { 15072 if (isWord(inst)) { 15073 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15074 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15075 emitSBB_Abs_Reg_Word( 15076 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15077 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15078 15079 } else { 15080 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15081 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15082 emitSBB_RegDisp_Reg_Word( 15083 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15084 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15085 15086 } else { 15087 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15088 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15089 emitSBB_RegOff_Reg_Word( 15090 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15091 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15092 15093 } else { 15094 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15095 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15096 emitSBB_RegIdx_Reg_Word( 15097 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15098 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15099 15100 } else { 15101 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15102 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15103 emitSBB_RegInd_Reg_Word( 15104 getBase(MIR_BinaryAcc.getResult(inst)), 15105 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15106 } 15107 } 15108 } 15109 } 15110 15111 } else { 15112 if (isQuad(inst)) { 15113 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15114 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15115 emitSBB_Abs_Reg_Quad( 15116 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15117 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15118 15119 } else { 15120 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15121 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15122 emitSBB_RegDisp_Reg_Quad( 15123 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15124 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15125 15126 } else { 15127 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15128 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15129 emitSBB_RegOff_Reg_Quad( 15130 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15131 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15132 15133 } else { 15134 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15135 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15136 emitSBB_RegIdx_Reg_Quad( 15137 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15138 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15139 15140 } else { 15141 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15142 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15143 emitSBB_RegInd_Reg_Quad( 15144 getBase(MIR_BinaryAcc.getResult(inst)), 15145 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15146 } 15147 } 15148 } 15149 } 15150 15151 } else { 15152 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15153 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15154 emitSBB_Abs_Reg( 15155 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15156 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15157 15158 } else { 15159 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15160 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15161 emitSBB_RegDisp_Reg( 15162 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15163 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15164 15165 } else { 15166 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15167 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15168 emitSBB_RegOff_Reg( 15169 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15170 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15171 15172 } else { 15173 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15174 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15175 emitSBB_RegIdx_Reg( 15176 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15177 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15178 15179 } else { 15180 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15181 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15182 emitSBB_RegInd_Reg( 15183 getBase(MIR_BinaryAcc.getResult(inst)), 15184 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15185 } 15186 } 15187 } 15188 } 15189 } 15190 } 15191 } 15192 } 15193 } 15194 } 15195 15196 /** 15197 * Emit the given instruction, assuming that 15198 * it is a MIR_BinaryAcc instruction 15199 * and has a FIDIVR operator 15200 * 15201 * @param inst the instruction to assemble 15202 */ 15203 private void doFIDIVR(Instruction inst) { 15204 if (isWord(inst)) { 15205 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 15206 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15207 emitFIDIVR_Reg_Abs_Word( 15208 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15209 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 15210 15211 } else { 15212 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 15213 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15214 emitFIDIVR_Reg_RegDisp_Word( 15215 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15216 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15217 15218 } else { 15219 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 15220 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15221 emitFIDIVR_Reg_RegOff_Word( 15222 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15223 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15224 15225 } else { 15226 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 15227 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15228 emitFIDIVR_Reg_RegIdx_Word( 15229 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15230 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15231 15232 } else { 15233 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15234 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15235 emitFIDIVR_Reg_RegInd_Word( 15236 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15237 getBase(MIR_BinaryAcc.getValue(inst))); 15238 } 15239 } 15240 } 15241 } 15242 15243 } else { 15244 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 15245 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15246 emitFIDIVR_Reg_Abs( 15247 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15248 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 15249 15250 } else { 15251 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 15252 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15253 emitFIDIVR_Reg_RegDisp( 15254 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15255 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15256 15257 } else { 15258 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 15259 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15260 emitFIDIVR_Reg_RegOff( 15261 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15262 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15263 15264 } else { 15265 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 15266 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15267 emitFIDIVR_Reg_RegIdx( 15268 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15269 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15270 15271 } else { 15272 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15273 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15274 emitFIDIVR_Reg_RegInd( 15275 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 15276 getBase(MIR_BinaryAcc.getValue(inst))); 15277 } 15278 } 15279 } 15280 } 15281 } 15282 } 15283 15284 /** 15285 * Emit the given instruction, assuming that 15286 * it is a MIR_UnaryNoRes instruction 15287 * and has a FSTCW operator 15288 * 15289 * @param inst the instruction to assemble 15290 */ 15291 private void doFSTCW(Instruction inst) { 15292 if (isAbs(MIR_UnaryNoRes.getVal(inst))) { 15293 emitFSTCW_Abs( 15294 getDisp(MIR_UnaryNoRes.getVal(inst)).toWord().toAddress()); 15295 15296 } else { 15297 if (isRegDisp(MIR_UnaryNoRes.getVal(inst))) { 15298 emitFSTCW_RegDisp( 15299 getBase(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 15300 15301 } else { 15302 if (isRegOff(MIR_UnaryNoRes.getVal(inst))) { 15303 emitFSTCW_RegOff( 15304 getIndex(MIR_UnaryNoRes.getVal(inst)), getScale(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 15305 15306 } else { 15307 if (isRegIdx(MIR_UnaryNoRes.getVal(inst))) { 15308 emitFSTCW_RegIdx( 15309 getBase(MIR_UnaryNoRes.getVal(inst)), getIndex(MIR_UnaryNoRes.getVal(inst)), getScale(MIR_UnaryNoRes.getVal(inst)), getDisp(MIR_UnaryNoRes.getVal(inst))); 15310 15311 } else { 15312 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryNoRes.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15313 emitFSTCW_RegInd( 15314 getBase(MIR_UnaryNoRes.getVal(inst))); 15315 } 15316 } 15317 } 15318 } 15319 } 15320 15321 /** 15322 * Emit the given instruction, assuming that 15323 * it is a MIR_Nullary instruction 15324 * and has a FLDLG2 operator 15325 * 15326 * @param inst the instruction to assemble 15327 */ 15328 private void doFLDLG2(Instruction inst) { 15329 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15330 emitFLDLG2_Reg( 15331 getFPR_Reg(MIR_Nullary.getResult(inst))); 15332 } 15333 15334 /** 15335 * Emit the given instruction, assuming that 15336 * it is a MIR_CacheOp instruction 15337 * and has a PREFETCHNTA operator 15338 * 15339 * @param inst the instruction to assemble 15340 */ 15341 private void doPREFETCHNTA(Instruction inst) { 15342 if (VM.VerifyAssertions && !isGPR_Reg(MIR_CacheOp.getAddress(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15343 emitPREFETCHNTA_Reg( 15344 getGPR_Reg(MIR_CacheOp.getAddress(inst))); 15345 } 15346 15347 /** 15348 * Emit the given instruction, assuming that 15349 * it is a MIR_BinaryAcc instruction 15350 * and has a CMPNLTSD operator 15351 * 15352 * @param inst the instruction to assemble 15353 */ 15354 private void doCMPNLTSD(Instruction inst) { 15355 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 15356 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15357 emitCMPNLTSD_Reg_Reg( 15358 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 15359 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 15360 15361 } else { 15362 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 15363 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15364 emitCMPNLTSD_Reg_Abs( 15365 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 15366 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 15367 15368 } else { 15369 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 15370 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15371 emitCMPNLTSD_Reg_RegDisp( 15372 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 15373 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15374 15375 } else { 15376 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 15377 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15378 emitCMPNLTSD_Reg_RegOff( 15379 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 15380 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15381 15382 } else { 15383 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 15384 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15385 emitCMPNLTSD_Reg_RegIdx( 15386 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 15387 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15388 15389 } else { 15390 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15391 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15392 emitCMPNLTSD_Reg_RegInd( 15393 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 15394 getBase(MIR_BinaryAcc.getValue(inst))); 15395 } 15396 } 15397 } 15398 } 15399 } 15400 } 15401 15402 /** 15403 * Emit the given instruction, assuming that 15404 * it is a MIR_BinaryAcc instruction 15405 * and has a OR operator 15406 * 15407 * @param inst the instruction to assemble 15408 */ 15409 private void doOR(Instruction inst) { 15410 if (isGPR_Reg(MIR_BinaryAcc.getResult(inst))) { 15411 if (isByte(inst)) { 15412 if (isImm(MIR_BinaryAcc.getValue(inst))) { 15413 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 15414 emitOR_Reg_Imm_Byte( 15415 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15416 getImm(MIR_BinaryAcc.getValue(inst))); 15417 15418 } else { 15419 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 15420 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 15421 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15422 emitOR_Reg_Reg_Byte( 15423 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15424 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15425 15426 } else { 15427 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 15428 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 15429 emitOR_Reg_Abs_Byte( 15430 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15431 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 15432 15433 } else { 15434 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 15435 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 15436 emitOR_Reg_RegDisp_Byte( 15437 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15438 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15439 15440 } else { 15441 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 15442 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 15443 emitOR_Reg_RegOff_Byte( 15444 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15445 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15446 15447 } else { 15448 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 15449 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 15450 emitOR_Reg_RegIdx_Byte( 15451 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15452 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15453 15454 } else { 15455 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15456 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getResult(inst)).isValidAs8bitRegister()); 15457 emitOR_Reg_RegInd_Byte( 15458 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15459 getBase(MIR_BinaryAcc.getValue(inst))); 15460 } 15461 } 15462 } 15463 } 15464 } 15465 } 15466 15467 } else { 15468 if (isWord(inst)) { 15469 if (isImm(MIR_BinaryAcc.getValue(inst))) { 15470 emitOR_Reg_Imm_Word( 15471 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15472 getImm(MIR_BinaryAcc.getValue(inst))); 15473 15474 } else { 15475 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 15476 emitOR_Reg_Reg_Word( 15477 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15478 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15479 15480 } else { 15481 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 15482 emitOR_Reg_Abs_Word( 15483 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15484 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 15485 15486 } else { 15487 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 15488 emitOR_Reg_RegDisp_Word( 15489 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15490 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15491 15492 } else { 15493 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 15494 emitOR_Reg_RegOff_Word( 15495 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15496 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15497 15498 } else { 15499 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 15500 emitOR_Reg_RegIdx_Word( 15501 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15502 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15503 15504 } else { 15505 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15506 emitOR_Reg_RegInd_Word( 15507 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15508 getBase(MIR_BinaryAcc.getValue(inst))); 15509 } 15510 } 15511 } 15512 } 15513 } 15514 } 15515 15516 } else { 15517 if (isQuad(inst)) { 15518 if (isImm(MIR_BinaryAcc.getValue(inst))) { 15519 emitOR_Reg_Imm_Quad( 15520 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15521 getImm(MIR_BinaryAcc.getValue(inst))); 15522 15523 } else { 15524 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 15525 emitOR_Reg_Reg_Quad( 15526 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15527 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15528 15529 } else { 15530 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 15531 emitOR_Reg_Abs_Quad( 15532 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15533 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 15534 15535 } else { 15536 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 15537 emitOR_Reg_RegDisp_Quad( 15538 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15539 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15540 15541 } else { 15542 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 15543 emitOR_Reg_RegOff_Quad( 15544 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15545 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15546 15547 } else { 15548 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 15549 emitOR_Reg_RegIdx_Quad( 15550 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15551 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15552 15553 } else { 15554 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15555 emitOR_Reg_RegInd_Quad( 15556 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15557 getBase(MIR_BinaryAcc.getValue(inst))); 15558 } 15559 } 15560 } 15561 } 15562 } 15563 } 15564 15565 } else { 15566 if (isImm(MIR_BinaryAcc.getValue(inst))) { 15567 emitOR_Reg_Imm( 15568 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15569 getImm(MIR_BinaryAcc.getValue(inst))); 15570 15571 } else { 15572 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 15573 emitOR_Reg_Reg( 15574 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15575 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15576 15577 } else { 15578 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 15579 emitOR_Reg_Abs( 15580 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15581 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 15582 15583 } else { 15584 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 15585 emitOR_Reg_RegDisp( 15586 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15587 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15588 15589 } else { 15590 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 15591 emitOR_Reg_RegOff( 15592 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15593 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15594 15595 } else { 15596 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 15597 emitOR_Reg_RegIdx( 15598 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15599 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 15600 15601 } else { 15602 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15603 emitOR_Reg_RegInd( 15604 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 15605 getBase(MIR_BinaryAcc.getValue(inst))); 15606 } 15607 } 15608 } 15609 } 15610 } 15611 } 15612 } 15613 } 15614 } 15615 15616 } else { 15617 if (isImm(MIR_BinaryAcc.getValue(inst))) { 15618 if (isByte(inst)) { 15619 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15620 emitOR_Abs_Imm_Byte( 15621 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15622 getImm(MIR_BinaryAcc.getValue(inst))); 15623 15624 } else { 15625 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15626 emitOR_RegDisp_Imm_Byte( 15627 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15628 getImm(MIR_BinaryAcc.getValue(inst))); 15629 15630 } else { 15631 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15632 emitOR_RegOff_Imm_Byte( 15633 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15634 getImm(MIR_BinaryAcc.getValue(inst))); 15635 15636 } else { 15637 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15638 emitOR_RegIdx_Imm_Byte( 15639 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15640 getImm(MIR_BinaryAcc.getValue(inst))); 15641 15642 } else { 15643 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15644 emitOR_RegInd_Imm_Byte( 15645 getBase(MIR_BinaryAcc.getResult(inst)), 15646 getImm(MIR_BinaryAcc.getValue(inst))); 15647 } 15648 } 15649 } 15650 } 15651 15652 } else { 15653 if (isWord(inst)) { 15654 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15655 emitOR_Abs_Imm_Word( 15656 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15657 getImm(MIR_BinaryAcc.getValue(inst))); 15658 15659 } else { 15660 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15661 emitOR_RegDisp_Imm_Word( 15662 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15663 getImm(MIR_BinaryAcc.getValue(inst))); 15664 15665 } else { 15666 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15667 emitOR_RegOff_Imm_Word( 15668 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15669 getImm(MIR_BinaryAcc.getValue(inst))); 15670 15671 } else { 15672 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15673 emitOR_RegIdx_Imm_Word( 15674 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15675 getImm(MIR_BinaryAcc.getValue(inst))); 15676 15677 } else { 15678 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15679 emitOR_RegInd_Imm_Word( 15680 getBase(MIR_BinaryAcc.getResult(inst)), 15681 getImm(MIR_BinaryAcc.getValue(inst))); 15682 } 15683 } 15684 } 15685 } 15686 15687 } else { 15688 if (isQuad(inst)) { 15689 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15690 emitOR_Abs_Imm_Quad( 15691 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15692 getImm(MIR_BinaryAcc.getValue(inst))); 15693 15694 } else { 15695 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15696 emitOR_RegDisp_Imm_Quad( 15697 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15698 getImm(MIR_BinaryAcc.getValue(inst))); 15699 15700 } else { 15701 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15702 emitOR_RegOff_Imm_Quad( 15703 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15704 getImm(MIR_BinaryAcc.getValue(inst))); 15705 15706 } else { 15707 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15708 emitOR_RegIdx_Imm_Quad( 15709 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15710 getImm(MIR_BinaryAcc.getValue(inst))); 15711 15712 } else { 15713 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15714 emitOR_RegInd_Imm_Quad( 15715 getBase(MIR_BinaryAcc.getResult(inst)), 15716 getImm(MIR_BinaryAcc.getValue(inst))); 15717 } 15718 } 15719 } 15720 } 15721 15722 } else { 15723 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15724 emitOR_Abs_Imm( 15725 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15726 getImm(MIR_BinaryAcc.getValue(inst))); 15727 15728 } else { 15729 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15730 emitOR_RegDisp_Imm( 15731 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15732 getImm(MIR_BinaryAcc.getValue(inst))); 15733 15734 } else { 15735 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15736 emitOR_RegOff_Imm( 15737 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15738 getImm(MIR_BinaryAcc.getValue(inst))); 15739 15740 } else { 15741 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15742 emitOR_RegIdx_Imm( 15743 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15744 getImm(MIR_BinaryAcc.getValue(inst))); 15745 15746 } else { 15747 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15748 emitOR_RegInd_Imm( 15749 getBase(MIR_BinaryAcc.getResult(inst)), 15750 getImm(MIR_BinaryAcc.getValue(inst))); 15751 } 15752 } 15753 } 15754 } 15755 } 15756 } 15757 } 15758 15759 } else { 15760 if (isByte(inst)) { 15761 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15762 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15763 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15764 emitOR_Abs_Reg_Byte( 15765 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15766 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15767 15768 } else { 15769 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15770 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15771 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15772 emitOR_RegDisp_Reg_Byte( 15773 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15774 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15775 15776 } else { 15777 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15778 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15779 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15780 emitOR_RegOff_Reg_Byte( 15781 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15782 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15783 15784 } else { 15785 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15786 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15787 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15788 emitOR_RegIdx_Reg_Byte( 15789 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15790 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15791 15792 } else { 15793 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15794 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15795 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_BinaryAcc.getValue(inst)).isValidAs8bitRegister()); 15796 emitOR_RegInd_Reg_Byte( 15797 getBase(MIR_BinaryAcc.getResult(inst)), 15798 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15799 } 15800 } 15801 } 15802 } 15803 15804 } else { 15805 if (isWord(inst)) { 15806 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15807 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15808 emitOR_Abs_Reg_Word( 15809 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15810 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15811 15812 } else { 15813 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15814 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15815 emitOR_RegDisp_Reg_Word( 15816 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15817 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15818 15819 } else { 15820 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15821 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15822 emitOR_RegOff_Reg_Word( 15823 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15824 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15825 15826 } else { 15827 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15828 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15829 emitOR_RegIdx_Reg_Word( 15830 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15831 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15832 15833 } else { 15834 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15835 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15836 emitOR_RegInd_Reg_Word( 15837 getBase(MIR_BinaryAcc.getResult(inst)), 15838 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15839 } 15840 } 15841 } 15842 } 15843 15844 } else { 15845 if (isQuad(inst)) { 15846 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15847 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15848 emitOR_Abs_Reg_Quad( 15849 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15850 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15851 15852 } else { 15853 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15854 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15855 emitOR_RegDisp_Reg_Quad( 15856 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15857 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15858 15859 } else { 15860 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15861 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15862 emitOR_RegOff_Reg_Quad( 15863 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15864 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15865 15866 } else { 15867 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15868 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15869 emitOR_RegIdx_Reg_Quad( 15870 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15871 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15872 15873 } else { 15874 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15875 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15876 emitOR_RegInd_Reg_Quad( 15877 getBase(MIR_BinaryAcc.getResult(inst)), 15878 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15879 } 15880 } 15881 } 15882 } 15883 15884 } else { 15885 if (isAbs(MIR_BinaryAcc.getResult(inst))) { 15886 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15887 emitOR_Abs_Reg( 15888 getDisp(MIR_BinaryAcc.getResult(inst)).toWord().toAddress(), 15889 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15890 15891 } else { 15892 if (isRegDisp(MIR_BinaryAcc.getResult(inst))) { 15893 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15894 emitOR_RegDisp_Reg( 15895 getBase(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15896 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15897 15898 } else { 15899 if (isRegOff(MIR_BinaryAcc.getResult(inst))) { 15900 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15901 emitOR_RegOff_Reg( 15902 getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15903 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15904 15905 } else { 15906 if (isRegIdx(MIR_BinaryAcc.getResult(inst))) { 15907 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15908 emitOR_RegIdx_Reg( 15909 getBase(MIR_BinaryAcc.getResult(inst)), getIndex(MIR_BinaryAcc.getResult(inst)), getScale(MIR_BinaryAcc.getResult(inst)), getDisp(MIR_BinaryAcc.getResult(inst)), 15910 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15911 15912 } else { 15913 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15914 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15915 emitOR_RegInd_Reg( 15916 getBase(MIR_BinaryAcc.getResult(inst)), 15917 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 15918 } 15919 } 15920 } 15921 } 15922 } 15923 } 15924 } 15925 } 15926 } 15927 } 15928 15929 /** 15930 * Emit the given instruction, assuming that 15931 * it is a MIR_UnaryAcc instruction 15932 * and has a DEC operator 15933 * 15934 * @param inst the instruction to assemble 15935 */ 15936 private void doDEC(Instruction inst) { 15937 if (isByte(inst)) { 15938 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 15939 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_UnaryAcc.getResult(inst)).isValidAs8bitRegister()); 15940 emitDEC_Reg_Byte( 15941 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 15942 15943 } else { 15944 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 15945 emitDEC_Abs_Byte( 15946 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 15947 15948 } else { 15949 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 15950 emitDEC_RegDisp_Byte( 15951 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 15952 15953 } else { 15954 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 15955 emitDEC_RegOff_Byte( 15956 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 15957 15958 } else { 15959 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 15960 emitDEC_RegIdx_Byte( 15961 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 15962 15963 } else { 15964 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 15965 emitDEC_RegInd_Byte( 15966 getBase(MIR_UnaryAcc.getResult(inst))); 15967 } 15968 } 15969 } 15970 } 15971 } 15972 15973 } else { 15974 if (isWord(inst)) { 15975 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 15976 emitDEC_Reg_Word( 15977 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 15978 15979 } else { 15980 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 15981 emitDEC_Abs_Word( 15982 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 15983 15984 } else { 15985 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 15986 emitDEC_RegDisp_Word( 15987 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 15988 15989 } else { 15990 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 15991 emitDEC_RegOff_Word( 15992 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 15993 15994 } else { 15995 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 15996 emitDEC_RegIdx_Word( 15997 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 15998 15999 } else { 16000 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16001 emitDEC_RegInd_Word( 16002 getBase(MIR_UnaryAcc.getResult(inst))); 16003 } 16004 } 16005 } 16006 } 16007 } 16008 16009 } else { 16010 if (isQuad(inst)) { 16011 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 16012 emitDEC_Reg_Quad( 16013 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 16014 16015 } else { 16016 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 16017 emitDEC_Abs_Quad( 16018 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 16019 16020 } else { 16021 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 16022 emitDEC_RegDisp_Quad( 16023 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 16024 16025 } else { 16026 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 16027 emitDEC_RegOff_Quad( 16028 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 16029 16030 } else { 16031 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 16032 emitDEC_RegIdx_Quad( 16033 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 16034 16035 } else { 16036 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16037 emitDEC_RegInd_Quad( 16038 getBase(MIR_UnaryAcc.getResult(inst))); 16039 } 16040 } 16041 } 16042 } 16043 } 16044 16045 } else { 16046 if (isGPR_Reg(MIR_UnaryAcc.getResult(inst))) { 16047 emitDEC_Reg( 16048 getGPR_Reg(MIR_UnaryAcc.getResult(inst))); 16049 16050 } else { 16051 if (isAbs(MIR_UnaryAcc.getResult(inst))) { 16052 emitDEC_Abs( 16053 getDisp(MIR_UnaryAcc.getResult(inst)).toWord().toAddress()); 16054 16055 } else { 16056 if (isRegDisp(MIR_UnaryAcc.getResult(inst))) { 16057 emitDEC_RegDisp( 16058 getBase(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 16059 16060 } else { 16061 if (isRegOff(MIR_UnaryAcc.getResult(inst))) { 16062 emitDEC_RegOff( 16063 getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 16064 16065 } else { 16066 if (isRegIdx(MIR_UnaryAcc.getResult(inst))) { 16067 emitDEC_RegIdx( 16068 getBase(MIR_UnaryAcc.getResult(inst)), getIndex(MIR_UnaryAcc.getResult(inst)), getScale(MIR_UnaryAcc.getResult(inst)), getDisp(MIR_UnaryAcc.getResult(inst))); 16069 16070 } else { 16071 if (VM.VerifyAssertions && !isRegInd(MIR_UnaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16072 emitDEC_RegInd( 16073 getBase(MIR_UnaryAcc.getResult(inst))); 16074 } 16075 } 16076 } 16077 } 16078 } 16079 } 16080 } 16081 } 16082 } 16083 16084 /** 16085 * Emit the given instruction, assuming that 16086 * it is a MIR_Unary instruction 16087 * and has a CVTTSD2SI operator 16088 * 16089 * @param inst the instruction to assemble 16090 */ 16091 private void doCVTTSD2SI(Instruction inst) { 16092 if (isXMM_Reg(MIR_Unary.getVal(inst))) { 16093 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16094 emitCVTTSD2SI_Reg_Reg( 16095 getGPR_Reg(MIR_Unary.getResult(inst)), 16096 getXMM_Reg(MIR_Unary.getVal(inst))); 16097 16098 } else { 16099 if (isAbs(MIR_Unary.getVal(inst))) { 16100 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16101 emitCVTTSD2SI_Reg_Abs( 16102 getGPR_Reg(MIR_Unary.getResult(inst)), 16103 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 16104 16105 } else { 16106 if (isRegDisp(MIR_Unary.getVal(inst))) { 16107 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16108 emitCVTTSD2SI_Reg_RegDisp( 16109 getGPR_Reg(MIR_Unary.getResult(inst)), 16110 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 16111 16112 } else { 16113 if (isRegOff(MIR_Unary.getVal(inst))) { 16114 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16115 emitCVTTSD2SI_Reg_RegOff( 16116 getGPR_Reg(MIR_Unary.getResult(inst)), 16117 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 16118 16119 } else { 16120 if (isRegIdx(MIR_Unary.getVal(inst))) { 16121 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16122 emitCVTTSD2SI_Reg_RegIdx( 16123 getGPR_Reg(MIR_Unary.getResult(inst)), 16124 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 16125 16126 } else { 16127 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16128 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16129 emitCVTTSD2SI_Reg_RegInd( 16130 getGPR_Reg(MIR_Unary.getResult(inst)), 16131 getBase(MIR_Unary.getVal(inst))); 16132 } 16133 } 16134 } 16135 } 16136 } 16137 } 16138 16139 /** 16140 * Emit the given instruction, assuming that 16141 * it is a MIR_Lea instruction 16142 * and has a LEA operator 16143 * 16144 * @param inst the instruction to assemble 16145 */ 16146 private void doLEA(Instruction inst) { 16147 if (isQuad(inst)) { 16148 if (isAbs(MIR_Lea.getValue(inst))) { 16149 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16150 emitLEA_Reg_Abs_Quad( 16151 getGPR_Reg(MIR_Lea.getResult(inst)), 16152 getDisp(MIR_Lea.getValue(inst)).toWord().toAddress()); 16153 16154 } else { 16155 if (isRegDisp(MIR_Lea.getValue(inst))) { 16156 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16157 emitLEA_Reg_RegDisp_Quad( 16158 getGPR_Reg(MIR_Lea.getResult(inst)), 16159 getBase(MIR_Lea.getValue(inst)), getDisp(MIR_Lea.getValue(inst))); 16160 16161 } else { 16162 if (isRegOff(MIR_Lea.getValue(inst))) { 16163 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16164 emitLEA_Reg_RegOff_Quad( 16165 getGPR_Reg(MIR_Lea.getResult(inst)), 16166 getIndex(MIR_Lea.getValue(inst)), getScale(MIR_Lea.getValue(inst)), getDisp(MIR_Lea.getValue(inst))); 16167 16168 } else { 16169 if (isRegIdx(MIR_Lea.getValue(inst))) { 16170 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16171 emitLEA_Reg_RegIdx_Quad( 16172 getGPR_Reg(MIR_Lea.getResult(inst)), 16173 getBase(MIR_Lea.getValue(inst)), getIndex(MIR_Lea.getValue(inst)), getScale(MIR_Lea.getValue(inst)), getDisp(MIR_Lea.getValue(inst))); 16174 16175 } else { 16176 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16177 if (VM.VerifyAssertions && !isRegInd(MIR_Lea.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16178 emitLEA_Reg_RegInd_Quad( 16179 getGPR_Reg(MIR_Lea.getResult(inst)), 16180 getBase(MIR_Lea.getValue(inst))); 16181 } 16182 } 16183 } 16184 } 16185 16186 } else { 16187 if (isAbs(MIR_Lea.getValue(inst))) { 16188 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16189 emitLEA_Reg_Abs( 16190 getGPR_Reg(MIR_Lea.getResult(inst)), 16191 getDisp(MIR_Lea.getValue(inst)).toWord().toAddress()); 16192 16193 } else { 16194 if (isRegDisp(MIR_Lea.getValue(inst))) { 16195 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16196 emitLEA_Reg_RegDisp( 16197 getGPR_Reg(MIR_Lea.getResult(inst)), 16198 getBase(MIR_Lea.getValue(inst)), getDisp(MIR_Lea.getValue(inst))); 16199 16200 } else { 16201 if (isRegOff(MIR_Lea.getValue(inst))) { 16202 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16203 emitLEA_Reg_RegOff( 16204 getGPR_Reg(MIR_Lea.getResult(inst)), 16205 getIndex(MIR_Lea.getValue(inst)), getScale(MIR_Lea.getValue(inst)), getDisp(MIR_Lea.getValue(inst))); 16206 16207 } else { 16208 if (isRegIdx(MIR_Lea.getValue(inst))) { 16209 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16210 emitLEA_Reg_RegIdx( 16211 getGPR_Reg(MIR_Lea.getResult(inst)), 16212 getBase(MIR_Lea.getValue(inst)), getIndex(MIR_Lea.getValue(inst)), getScale(MIR_Lea.getValue(inst)), getDisp(MIR_Lea.getValue(inst))); 16213 16214 } else { 16215 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Lea.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16216 if (VM.VerifyAssertions && !isRegInd(MIR_Lea.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16217 emitLEA_Reg_RegInd( 16218 getGPR_Reg(MIR_Lea.getResult(inst)), 16219 getBase(MIR_Lea.getValue(inst))); 16220 } 16221 } 16222 } 16223 } 16224 } 16225 } 16226 16227 /** 16228 * Emit the given instruction, assuming that 16229 * it is a MIR_BinaryAcc instruction 16230 * and has a FISUBR operator 16231 * 16232 * @param inst the instruction to assemble 16233 */ 16234 private void doFISUBR(Instruction inst) { 16235 if (isWord(inst)) { 16236 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 16237 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16238 emitFISUBR_Reg_Abs_Word( 16239 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16240 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 16241 16242 } else { 16243 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 16244 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16245 emitFISUBR_Reg_RegDisp_Word( 16246 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16247 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16248 16249 } else { 16250 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 16251 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16252 emitFISUBR_Reg_RegOff_Word( 16253 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16254 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16255 16256 } else { 16257 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 16258 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16259 emitFISUBR_Reg_RegIdx_Word( 16260 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16261 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16262 16263 } else { 16264 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16265 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16266 emitFISUBR_Reg_RegInd_Word( 16267 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16268 getBase(MIR_BinaryAcc.getValue(inst))); 16269 } 16270 } 16271 } 16272 } 16273 16274 } else { 16275 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 16276 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16277 emitFISUBR_Reg_Abs( 16278 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16279 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 16280 16281 } else { 16282 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 16283 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16284 emitFISUBR_Reg_RegDisp( 16285 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16286 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16287 16288 } else { 16289 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 16290 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16291 emitFISUBR_Reg_RegOff( 16292 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16293 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16294 16295 } else { 16296 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 16297 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16298 emitFISUBR_Reg_RegIdx( 16299 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16300 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16301 16302 } else { 16303 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16304 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16305 emitFISUBR_Reg_RegInd( 16306 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16307 getBase(MIR_BinaryAcc.getValue(inst))); 16308 } 16309 } 16310 } 16311 } 16312 } 16313 } 16314 16315 /** 16316 * Emit the given instruction, assuming that 16317 * it is a MIR_BinaryAcc instruction 16318 * and has a ANDNPS operator 16319 * 16320 * @param inst the instruction to assemble 16321 */ 16322 private void doANDNPS(Instruction inst) { 16323 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 16324 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16325 emitANDNPS_Reg_Reg( 16326 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16327 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 16328 16329 } else { 16330 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 16331 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16332 emitANDNPS_Reg_Abs( 16333 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16334 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 16335 16336 } else { 16337 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 16338 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16339 emitANDNPS_Reg_RegDisp( 16340 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16341 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16342 16343 } else { 16344 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 16345 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16346 emitANDNPS_Reg_RegOff( 16347 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16348 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16349 16350 } else { 16351 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 16352 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16353 emitANDNPS_Reg_RegIdx( 16354 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16355 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16356 16357 } else { 16358 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16359 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16360 emitANDNPS_Reg_RegInd( 16361 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16362 getBase(MIR_BinaryAcc.getValue(inst))); 16363 } 16364 } 16365 } 16366 } 16367 } 16368 } 16369 16370 /** 16371 * Emit the given instruction, assuming that 16372 * it is a MIR_CondMove instruction 16373 * and has a FCMOV operator 16374 * 16375 * @param inst the instruction to assemble 16376 */ 16377 private void doFCMOV(Instruction inst) { 16378 if (VM.VerifyAssertions && !isCond(MIR_CondMove.getCond(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16379 if (VM.VerifyAssertions && !isFPR_Reg(MIR_CondMove.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16380 if (VM.VerifyAssertions && !isFPR_Reg(MIR_CondMove.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16381 emitFCMOV_Cond_Reg_Reg( 16382 getCond(MIR_CondMove.getCond(inst)), 16383 getFPR_Reg(MIR_CondMove.getResult(inst)), 16384 getFPR_Reg(MIR_CondMove.getValue(inst))); 16385 } 16386 16387 /** 16388 * Emit the given instruction, assuming that 16389 * it is a MIR_BinaryAcc instruction 16390 * and has a CMPNLTSS operator 16391 * 16392 * @param inst the instruction to assemble 16393 */ 16394 private void doCMPNLTSS(Instruction inst) { 16395 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 16396 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16397 emitCMPNLTSS_Reg_Reg( 16398 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16399 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 16400 16401 } else { 16402 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 16403 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16404 emitCMPNLTSS_Reg_Abs( 16405 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16406 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 16407 16408 } else { 16409 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 16410 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16411 emitCMPNLTSS_Reg_RegDisp( 16412 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16413 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16414 16415 } else { 16416 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 16417 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16418 emitCMPNLTSS_Reg_RegOff( 16419 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16420 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16421 16422 } else { 16423 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 16424 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16425 emitCMPNLTSS_Reg_RegIdx( 16426 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16427 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 16428 16429 } else { 16430 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16431 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16432 emitCMPNLTSS_Reg_RegInd( 16433 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 16434 getBase(MIR_BinaryAcc.getValue(inst))); 16435 } 16436 } 16437 } 16438 } 16439 } 16440 } 16441 16442 /** 16443 * Emit the given instruction, assuming that 16444 * it is a MIR_Move instruction 16445 * and has a MOVD operator 16446 * 16447 * @param inst the instruction to assemble 16448 */ 16449 private void doMOVD(Instruction inst) { 16450 if (isMM_Reg(MIR_Move.getResult(inst))) { 16451 if (isGPR_Reg(MIR_Move.getValue(inst))) { 16452 emitMOVD_Reg_Reg( 16453 getMM_Reg(MIR_Move.getResult(inst)), 16454 getGPR_Reg(MIR_Move.getValue(inst))); 16455 16456 } else { 16457 if (isAbs(MIR_Move.getValue(inst))) { 16458 emitMOVD_Reg_Abs( 16459 getMM_Reg(MIR_Move.getResult(inst)), 16460 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 16461 16462 } else { 16463 if (isRegDisp(MIR_Move.getValue(inst))) { 16464 emitMOVD_Reg_RegDisp( 16465 getMM_Reg(MIR_Move.getResult(inst)), 16466 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16467 16468 } else { 16469 if (isRegOff(MIR_Move.getValue(inst))) { 16470 emitMOVD_Reg_RegOff( 16471 getMM_Reg(MIR_Move.getResult(inst)), 16472 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16473 16474 } else { 16475 if (isRegIdx(MIR_Move.getValue(inst))) { 16476 emitMOVD_Reg_RegIdx( 16477 getMM_Reg(MIR_Move.getResult(inst)), 16478 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16479 16480 } else { 16481 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16482 emitMOVD_Reg_RegInd( 16483 getMM_Reg(MIR_Move.getResult(inst)), 16484 getBase(MIR_Move.getValue(inst))); 16485 } 16486 } 16487 } 16488 } 16489 } 16490 16491 } else { 16492 if (isXMM_Reg(MIR_Move.getResult(inst))) { 16493 if (isGPR_Reg(MIR_Move.getValue(inst))) { 16494 emitMOVD_Reg_Reg( 16495 getXMM_Reg(MIR_Move.getResult(inst)), 16496 getGPR_Reg(MIR_Move.getValue(inst))); 16497 16498 } else { 16499 if (isAbs(MIR_Move.getValue(inst))) { 16500 emitMOVD_Reg_Abs( 16501 getXMM_Reg(MIR_Move.getResult(inst)), 16502 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 16503 16504 } else { 16505 if (isRegDisp(MIR_Move.getValue(inst))) { 16506 emitMOVD_Reg_RegDisp( 16507 getXMM_Reg(MIR_Move.getResult(inst)), 16508 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16509 16510 } else { 16511 if (isRegOff(MIR_Move.getValue(inst))) { 16512 emitMOVD_Reg_RegOff( 16513 getXMM_Reg(MIR_Move.getResult(inst)), 16514 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16515 16516 } else { 16517 if (isRegIdx(MIR_Move.getValue(inst))) { 16518 emitMOVD_Reg_RegIdx( 16519 getXMM_Reg(MIR_Move.getResult(inst)), 16520 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16521 16522 } else { 16523 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16524 emitMOVD_Reg_RegInd( 16525 getXMM_Reg(MIR_Move.getResult(inst)), 16526 getBase(MIR_Move.getValue(inst))); 16527 } 16528 } 16529 } 16530 } 16531 } 16532 16533 } else { 16534 if (isMM_Reg(MIR_Move.getValue(inst))) { 16535 if (isGPR_Reg(MIR_Move.getResult(inst))) { 16536 emitMOVD_Reg_Reg( 16537 getGPR_Reg(MIR_Move.getResult(inst)), 16538 getMM_Reg(MIR_Move.getValue(inst))); 16539 16540 } else { 16541 if (isAbs(MIR_Move.getResult(inst))) { 16542 emitMOVD_Abs_Reg( 16543 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 16544 getMM_Reg(MIR_Move.getValue(inst))); 16545 16546 } else { 16547 if (isRegDisp(MIR_Move.getResult(inst))) { 16548 emitMOVD_RegDisp_Reg( 16549 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16550 getMM_Reg(MIR_Move.getValue(inst))); 16551 16552 } else { 16553 if (isRegOff(MIR_Move.getResult(inst))) { 16554 emitMOVD_RegOff_Reg( 16555 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16556 getMM_Reg(MIR_Move.getValue(inst))); 16557 16558 } else { 16559 if (isRegIdx(MIR_Move.getResult(inst))) { 16560 emitMOVD_RegIdx_Reg( 16561 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16562 getMM_Reg(MIR_Move.getValue(inst))); 16563 16564 } else { 16565 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16566 emitMOVD_RegInd_Reg( 16567 getBase(MIR_Move.getResult(inst)), 16568 getMM_Reg(MIR_Move.getValue(inst))); 16569 } 16570 } 16571 } 16572 } 16573 } 16574 16575 } else { 16576 if (isGPR_Reg(MIR_Move.getResult(inst))) { 16577 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16578 emitMOVD_Reg_Reg( 16579 getGPR_Reg(MIR_Move.getResult(inst)), 16580 getXMM_Reg(MIR_Move.getValue(inst))); 16581 16582 } else { 16583 if (isAbs(MIR_Move.getResult(inst))) { 16584 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16585 emitMOVD_Abs_Reg( 16586 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 16587 getXMM_Reg(MIR_Move.getValue(inst))); 16588 16589 } else { 16590 if (isRegDisp(MIR_Move.getResult(inst))) { 16591 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16592 emitMOVD_RegDisp_Reg( 16593 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16594 getXMM_Reg(MIR_Move.getValue(inst))); 16595 16596 } else { 16597 if (isRegOff(MIR_Move.getResult(inst))) { 16598 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16599 emitMOVD_RegOff_Reg( 16600 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16601 getXMM_Reg(MIR_Move.getValue(inst))); 16602 16603 } else { 16604 if (isRegIdx(MIR_Move.getResult(inst))) { 16605 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16606 emitMOVD_RegIdx_Reg( 16607 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16608 getXMM_Reg(MIR_Move.getValue(inst))); 16609 16610 } else { 16611 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16612 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16613 emitMOVD_RegInd_Reg( 16614 getBase(MIR_Move.getResult(inst)), 16615 getXMM_Reg(MIR_Move.getValue(inst))); 16616 } 16617 } 16618 } 16619 } 16620 } 16621 } 16622 } 16623 } 16624 } 16625 16626 /** 16627 * Emit the given instruction, assuming that 16628 * it is a MIR_BinaryAcc instruction 16629 * and has a FSUBRP operator 16630 * 16631 * @param inst the instruction to assemble 16632 */ 16633 private void doFSUBRP(Instruction inst) { 16634 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16635 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16636 emitFSUBRP_Reg_Reg( 16637 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 16638 getFPR_Reg(MIR_BinaryAcc.getValue(inst))); 16639 } 16640 16641 /** 16642 * Emit the given instruction, assuming that 16643 * it is a MIR_Move instruction 16644 * and has a MOV operator 16645 * 16646 * @param inst the instruction to assemble 16647 */ 16648 private void doMOV(Instruction inst) { 16649 if (isGPR_Reg(MIR_Move.getResult(inst))) { 16650 if (isQuad(inst)) { 16651 if (isImm(MIR_Move.getValue(inst))) { 16652 emitMOV_Reg_Imm_Quad( 16653 getGPR_Reg(MIR_Move.getResult(inst)), 16654 getImm(MIR_Move.getValue(inst))); 16655 16656 } else { 16657 if (isGPR_Reg(MIR_Move.getValue(inst))) { 16658 emitMOV_Reg_Reg_Quad( 16659 getGPR_Reg(MIR_Move.getResult(inst)), 16660 getGPR_Reg(MIR_Move.getValue(inst))); 16661 16662 } else { 16663 if (isAbs(MIR_Move.getValue(inst))) { 16664 emitMOV_Reg_Abs_Quad( 16665 getGPR_Reg(MIR_Move.getResult(inst)), 16666 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 16667 16668 } else { 16669 if (isRegDisp(MIR_Move.getValue(inst))) { 16670 emitMOV_Reg_RegDisp_Quad( 16671 getGPR_Reg(MIR_Move.getResult(inst)), 16672 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16673 16674 } else { 16675 if (isRegOff(MIR_Move.getValue(inst))) { 16676 emitMOV_Reg_RegOff_Quad( 16677 getGPR_Reg(MIR_Move.getResult(inst)), 16678 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16679 16680 } else { 16681 if (isRegIdx(MIR_Move.getValue(inst))) { 16682 emitMOV_Reg_RegIdx_Quad( 16683 getGPR_Reg(MIR_Move.getResult(inst)), 16684 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16685 16686 } else { 16687 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16688 emitMOV_Reg_RegInd_Quad( 16689 getGPR_Reg(MIR_Move.getResult(inst)), 16690 getBase(MIR_Move.getValue(inst))); 16691 } 16692 } 16693 } 16694 } 16695 } 16696 } 16697 16698 } else { 16699 if (isByte(inst)) { 16700 if (isGPR_Reg(MIR_Move.getValue(inst))) { 16701 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getResult(inst)).isValidAs8bitRegister()); 16702 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getValue(inst)).isValidAs8bitRegister()); 16703 emitMOV_Reg_Reg_Byte( 16704 getGPR_Reg(MIR_Move.getResult(inst)), 16705 getGPR_Reg(MIR_Move.getValue(inst))); 16706 16707 } else { 16708 if (isAbs(MIR_Move.getValue(inst))) { 16709 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getResult(inst)).isValidAs8bitRegister()); 16710 emitMOV_Reg_Abs_Byte( 16711 getGPR_Reg(MIR_Move.getResult(inst)), 16712 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 16713 16714 } else { 16715 if (isRegDisp(MIR_Move.getValue(inst))) { 16716 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getResult(inst)).isValidAs8bitRegister()); 16717 emitMOV_Reg_RegDisp_Byte( 16718 getGPR_Reg(MIR_Move.getResult(inst)), 16719 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16720 16721 } else { 16722 if (isRegOff(MIR_Move.getValue(inst))) { 16723 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getResult(inst)).isValidAs8bitRegister()); 16724 emitMOV_Reg_RegOff_Byte( 16725 getGPR_Reg(MIR_Move.getResult(inst)), 16726 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16727 16728 } else { 16729 if (isRegIdx(MIR_Move.getValue(inst))) { 16730 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getResult(inst)).isValidAs8bitRegister()); 16731 emitMOV_Reg_RegIdx_Byte( 16732 getGPR_Reg(MIR_Move.getResult(inst)), 16733 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16734 16735 } else { 16736 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16737 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getResult(inst)).isValidAs8bitRegister()); 16738 emitMOV_Reg_RegInd_Byte( 16739 getGPR_Reg(MIR_Move.getResult(inst)), 16740 getBase(MIR_Move.getValue(inst))); 16741 } 16742 } 16743 } 16744 } 16745 } 16746 16747 } else { 16748 if (isWord(inst)) { 16749 if (isGPR_Reg(MIR_Move.getValue(inst))) { 16750 emitMOV_Reg_Reg_Word( 16751 getGPR_Reg(MIR_Move.getResult(inst)), 16752 getGPR_Reg(MIR_Move.getValue(inst))); 16753 16754 } else { 16755 if (isAbs(MIR_Move.getValue(inst))) { 16756 emitMOV_Reg_Abs_Word( 16757 getGPR_Reg(MIR_Move.getResult(inst)), 16758 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 16759 16760 } else { 16761 if (isRegDisp(MIR_Move.getValue(inst))) { 16762 emitMOV_Reg_RegDisp_Word( 16763 getGPR_Reg(MIR_Move.getResult(inst)), 16764 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16765 16766 } else { 16767 if (isRegOff(MIR_Move.getValue(inst))) { 16768 emitMOV_Reg_RegOff_Word( 16769 getGPR_Reg(MIR_Move.getResult(inst)), 16770 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16771 16772 } else { 16773 if (isRegIdx(MIR_Move.getValue(inst))) { 16774 emitMOV_Reg_RegIdx_Word( 16775 getGPR_Reg(MIR_Move.getResult(inst)), 16776 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16777 16778 } else { 16779 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16780 emitMOV_Reg_RegInd_Word( 16781 getGPR_Reg(MIR_Move.getResult(inst)), 16782 getBase(MIR_Move.getValue(inst))); 16783 } 16784 } 16785 } 16786 } 16787 } 16788 16789 } else { 16790 if (isImm(MIR_Move.getValue(inst))) { 16791 emitMOV_Reg_Imm( 16792 getGPR_Reg(MIR_Move.getResult(inst)), 16793 getImm(MIR_Move.getValue(inst))); 16794 16795 } else { 16796 if (isGPR_Reg(MIR_Move.getValue(inst))) { 16797 emitMOV_Reg_Reg( 16798 getGPR_Reg(MIR_Move.getResult(inst)), 16799 getGPR_Reg(MIR_Move.getValue(inst))); 16800 16801 } else { 16802 if (isAbs(MIR_Move.getValue(inst))) { 16803 emitMOV_Reg_Abs( 16804 getGPR_Reg(MIR_Move.getResult(inst)), 16805 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 16806 16807 } else { 16808 if (isRegDisp(MIR_Move.getValue(inst))) { 16809 emitMOV_Reg_RegDisp( 16810 getGPR_Reg(MIR_Move.getResult(inst)), 16811 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16812 16813 } else { 16814 if (isRegOff(MIR_Move.getValue(inst))) { 16815 emitMOV_Reg_RegOff( 16816 getGPR_Reg(MIR_Move.getResult(inst)), 16817 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16818 16819 } else { 16820 if (isRegIdx(MIR_Move.getValue(inst))) { 16821 emitMOV_Reg_RegIdx( 16822 getGPR_Reg(MIR_Move.getResult(inst)), 16823 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 16824 16825 } else { 16826 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16827 emitMOV_Reg_RegInd( 16828 getGPR_Reg(MIR_Move.getResult(inst)), 16829 getBase(MIR_Move.getValue(inst))); 16830 } 16831 } 16832 } 16833 } 16834 } 16835 } 16836 } 16837 } 16838 } 16839 16840 } else { 16841 if (isImm(MIR_Move.getValue(inst))) { 16842 if (isByte(inst)) { 16843 if (isAbs(MIR_Move.getResult(inst))) { 16844 emitMOV_Abs_Imm_Byte( 16845 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 16846 getImm(MIR_Move.getValue(inst))); 16847 16848 } else { 16849 if (isRegDisp(MIR_Move.getResult(inst))) { 16850 emitMOV_RegDisp_Imm_Byte( 16851 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16852 getImm(MIR_Move.getValue(inst))); 16853 16854 } else { 16855 if (isRegOff(MIR_Move.getResult(inst))) { 16856 emitMOV_RegOff_Imm_Byte( 16857 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16858 getImm(MIR_Move.getValue(inst))); 16859 16860 } else { 16861 if (isRegIdx(MIR_Move.getResult(inst))) { 16862 emitMOV_RegIdx_Imm_Byte( 16863 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16864 getImm(MIR_Move.getValue(inst))); 16865 16866 } else { 16867 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16868 emitMOV_RegInd_Imm_Byte( 16869 getBase(MIR_Move.getResult(inst)), 16870 getImm(MIR_Move.getValue(inst))); 16871 } 16872 } 16873 } 16874 } 16875 16876 } else { 16877 if (isWord(inst)) { 16878 if (isAbs(MIR_Move.getResult(inst))) { 16879 emitMOV_Abs_Imm_Word( 16880 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 16881 getImm(MIR_Move.getValue(inst))); 16882 16883 } else { 16884 if (isRegDisp(MIR_Move.getResult(inst))) { 16885 emitMOV_RegDisp_Imm_Word( 16886 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16887 getImm(MIR_Move.getValue(inst))); 16888 16889 } else { 16890 if (isRegOff(MIR_Move.getResult(inst))) { 16891 emitMOV_RegOff_Imm_Word( 16892 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16893 getImm(MIR_Move.getValue(inst))); 16894 16895 } else { 16896 if (isRegIdx(MIR_Move.getResult(inst))) { 16897 emitMOV_RegIdx_Imm_Word( 16898 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16899 getImm(MIR_Move.getValue(inst))); 16900 16901 } else { 16902 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16903 emitMOV_RegInd_Imm_Word( 16904 getBase(MIR_Move.getResult(inst)), 16905 getImm(MIR_Move.getValue(inst))); 16906 } 16907 } 16908 } 16909 } 16910 16911 } else { 16912 if (isQuad(inst)) { 16913 if (isAbs(MIR_Move.getResult(inst))) { 16914 emitMOV_Abs_Imm_Quad( 16915 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 16916 getImm(MIR_Move.getValue(inst))); 16917 16918 } else { 16919 if (isRegDisp(MIR_Move.getResult(inst))) { 16920 emitMOV_RegDisp_Imm_Quad( 16921 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16922 getImm(MIR_Move.getValue(inst))); 16923 16924 } else { 16925 if (isRegOff(MIR_Move.getResult(inst))) { 16926 emitMOV_RegOff_Imm_Quad( 16927 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16928 getImm(MIR_Move.getValue(inst))); 16929 16930 } else { 16931 if (isRegIdx(MIR_Move.getResult(inst))) { 16932 emitMOV_RegIdx_Imm_Quad( 16933 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16934 getImm(MIR_Move.getValue(inst))); 16935 16936 } else { 16937 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16938 emitMOV_RegInd_Imm_Quad( 16939 getBase(MIR_Move.getResult(inst)), 16940 getImm(MIR_Move.getValue(inst))); 16941 } 16942 } 16943 } 16944 } 16945 16946 } else { 16947 if (isAbs(MIR_Move.getResult(inst))) { 16948 emitMOV_Abs_Imm( 16949 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 16950 getImm(MIR_Move.getValue(inst))); 16951 16952 } else { 16953 if (isRegDisp(MIR_Move.getResult(inst))) { 16954 emitMOV_RegDisp_Imm( 16955 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16956 getImm(MIR_Move.getValue(inst))); 16957 16958 } else { 16959 if (isRegOff(MIR_Move.getResult(inst))) { 16960 emitMOV_RegOff_Imm( 16961 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16962 getImm(MIR_Move.getValue(inst))); 16963 16964 } else { 16965 if (isRegIdx(MIR_Move.getResult(inst))) { 16966 emitMOV_RegIdx_Imm( 16967 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16968 getImm(MIR_Move.getValue(inst))); 16969 16970 } else { 16971 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16972 emitMOV_RegInd_Imm( 16973 getBase(MIR_Move.getResult(inst)), 16974 getImm(MIR_Move.getValue(inst))); 16975 } 16976 } 16977 } 16978 } 16979 } 16980 } 16981 } 16982 16983 } else { 16984 if (isByte(inst)) { 16985 if (isAbs(MIR_Move.getResult(inst))) { 16986 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16987 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getValue(inst)).isValidAs8bitRegister()); 16988 emitMOV_Abs_Reg_Byte( 16989 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 16990 getGPR_Reg(MIR_Move.getValue(inst))); 16991 16992 } else { 16993 if (isRegDisp(MIR_Move.getResult(inst))) { 16994 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 16995 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getValue(inst)).isValidAs8bitRegister()); 16996 emitMOV_RegDisp_Reg_Byte( 16997 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 16998 getGPR_Reg(MIR_Move.getValue(inst))); 16999 17000 } else { 17001 if (isRegOff(MIR_Move.getResult(inst))) { 17002 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17003 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getValue(inst)).isValidAs8bitRegister()); 17004 emitMOV_RegOff_Reg_Byte( 17005 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17006 getGPR_Reg(MIR_Move.getValue(inst))); 17007 17008 } else { 17009 if (isRegIdx(MIR_Move.getResult(inst))) { 17010 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17011 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getValue(inst)).isValidAs8bitRegister()); 17012 emitMOV_RegIdx_Reg_Byte( 17013 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17014 getGPR_Reg(MIR_Move.getValue(inst))); 17015 17016 } else { 17017 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17018 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17019 if (VM.VerifyAssertions) opt_assert(getGPR_Reg(MIR_Move.getValue(inst)).isValidAs8bitRegister()); 17020 emitMOV_RegInd_Reg_Byte( 17021 getBase(MIR_Move.getResult(inst)), 17022 getGPR_Reg(MIR_Move.getValue(inst))); 17023 } 17024 } 17025 } 17026 } 17027 17028 } else { 17029 if (isWord(inst)) { 17030 if (isAbs(MIR_Move.getResult(inst))) { 17031 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17032 emitMOV_Abs_Reg_Word( 17033 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 17034 getGPR_Reg(MIR_Move.getValue(inst))); 17035 17036 } else { 17037 if (isRegDisp(MIR_Move.getResult(inst))) { 17038 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17039 emitMOV_RegDisp_Reg_Word( 17040 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17041 getGPR_Reg(MIR_Move.getValue(inst))); 17042 17043 } else { 17044 if (isRegOff(MIR_Move.getResult(inst))) { 17045 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17046 emitMOV_RegOff_Reg_Word( 17047 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17048 getGPR_Reg(MIR_Move.getValue(inst))); 17049 17050 } else { 17051 if (isRegIdx(MIR_Move.getResult(inst))) { 17052 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17053 emitMOV_RegIdx_Reg_Word( 17054 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17055 getGPR_Reg(MIR_Move.getValue(inst))); 17056 17057 } else { 17058 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17059 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17060 emitMOV_RegInd_Reg_Word( 17061 getBase(MIR_Move.getResult(inst)), 17062 getGPR_Reg(MIR_Move.getValue(inst))); 17063 } 17064 } 17065 } 17066 } 17067 17068 } else { 17069 if (isQuad(inst)) { 17070 if (isAbs(MIR_Move.getResult(inst))) { 17071 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17072 emitMOV_Abs_Reg_Quad( 17073 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 17074 getGPR_Reg(MIR_Move.getValue(inst))); 17075 17076 } else { 17077 if (isRegDisp(MIR_Move.getResult(inst))) { 17078 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17079 emitMOV_RegDisp_Reg_Quad( 17080 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17081 getGPR_Reg(MIR_Move.getValue(inst))); 17082 17083 } else { 17084 if (isRegOff(MIR_Move.getResult(inst))) { 17085 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17086 emitMOV_RegOff_Reg_Quad( 17087 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17088 getGPR_Reg(MIR_Move.getValue(inst))); 17089 17090 } else { 17091 if (isRegIdx(MIR_Move.getResult(inst))) { 17092 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17093 emitMOV_RegIdx_Reg_Quad( 17094 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17095 getGPR_Reg(MIR_Move.getValue(inst))); 17096 17097 } else { 17098 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17099 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17100 emitMOV_RegInd_Reg_Quad( 17101 getBase(MIR_Move.getResult(inst)), 17102 getGPR_Reg(MIR_Move.getValue(inst))); 17103 } 17104 } 17105 } 17106 } 17107 17108 } else { 17109 if (isAbs(MIR_Move.getResult(inst))) { 17110 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17111 emitMOV_Abs_Reg( 17112 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 17113 getGPR_Reg(MIR_Move.getValue(inst))); 17114 17115 } else { 17116 if (isRegDisp(MIR_Move.getResult(inst))) { 17117 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17118 emitMOV_RegDisp_Reg( 17119 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17120 getGPR_Reg(MIR_Move.getValue(inst))); 17121 17122 } else { 17123 if (isRegOff(MIR_Move.getResult(inst))) { 17124 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17125 emitMOV_RegOff_Reg( 17126 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17127 getGPR_Reg(MIR_Move.getValue(inst))); 17128 17129 } else { 17130 if (isRegIdx(MIR_Move.getResult(inst))) { 17131 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17132 emitMOV_RegIdx_Reg( 17133 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17134 getGPR_Reg(MIR_Move.getValue(inst))); 17135 17136 } else { 17137 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17138 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17139 emitMOV_RegInd_Reg( 17140 getBase(MIR_Move.getResult(inst)), 17141 getGPR_Reg(MIR_Move.getValue(inst))); 17142 } 17143 } 17144 } 17145 } 17146 } 17147 } 17148 } 17149 } 17150 } 17151 } 17152 17153 /** 17154 * Emit the given instruction, assuming that 17155 * it is a MIR_Move instruction 17156 * and has a MOVQ operator 17157 * 17158 * @param inst the instruction to assemble 17159 */ 17160 private void doMOVQ(Instruction inst) { 17161 if (isMM_Reg(MIR_Move.getResult(inst))) { 17162 if (isMM_Reg(MIR_Move.getValue(inst))) { 17163 emitMOVQ_Reg_Reg( 17164 getMM_Reg(MIR_Move.getResult(inst)), 17165 getMM_Reg(MIR_Move.getValue(inst))); 17166 17167 } else { 17168 if (isAbs(MIR_Move.getValue(inst))) { 17169 emitMOVQ_Reg_Abs( 17170 getMM_Reg(MIR_Move.getResult(inst)), 17171 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 17172 17173 } else { 17174 if (isRegDisp(MIR_Move.getValue(inst))) { 17175 emitMOVQ_Reg_RegDisp( 17176 getMM_Reg(MIR_Move.getResult(inst)), 17177 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 17178 17179 } else { 17180 if (isRegOff(MIR_Move.getValue(inst))) { 17181 emitMOVQ_Reg_RegOff( 17182 getMM_Reg(MIR_Move.getResult(inst)), 17183 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 17184 17185 } else { 17186 if (isRegIdx(MIR_Move.getValue(inst))) { 17187 emitMOVQ_Reg_RegIdx( 17188 getMM_Reg(MIR_Move.getResult(inst)), 17189 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 17190 17191 } else { 17192 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17193 emitMOVQ_Reg_RegInd( 17194 getMM_Reg(MIR_Move.getResult(inst)), 17195 getBase(MIR_Move.getValue(inst))); 17196 } 17197 } 17198 } 17199 } 17200 } 17201 17202 } else { 17203 if (isXMM_Reg(MIR_Move.getResult(inst))) { 17204 if (isXMM_Reg(MIR_Move.getValue(inst))) { 17205 emitMOVQ_Reg_Reg( 17206 getXMM_Reg(MIR_Move.getResult(inst)), 17207 getXMM_Reg(MIR_Move.getValue(inst))); 17208 17209 } else { 17210 if (isAbs(MIR_Move.getValue(inst))) { 17211 emitMOVQ_Reg_Abs( 17212 getXMM_Reg(MIR_Move.getResult(inst)), 17213 getDisp(MIR_Move.getValue(inst)).toWord().toAddress()); 17214 17215 } else { 17216 if (isRegDisp(MIR_Move.getValue(inst))) { 17217 emitMOVQ_Reg_RegDisp( 17218 getXMM_Reg(MIR_Move.getResult(inst)), 17219 getBase(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 17220 17221 } else { 17222 if (isRegOff(MIR_Move.getValue(inst))) { 17223 emitMOVQ_Reg_RegOff( 17224 getXMM_Reg(MIR_Move.getResult(inst)), 17225 getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 17226 17227 } else { 17228 if (isRegIdx(MIR_Move.getValue(inst))) { 17229 emitMOVQ_Reg_RegIdx( 17230 getXMM_Reg(MIR_Move.getResult(inst)), 17231 getBase(MIR_Move.getValue(inst)), getIndex(MIR_Move.getValue(inst)), getScale(MIR_Move.getValue(inst)), getDisp(MIR_Move.getValue(inst))); 17232 17233 } else { 17234 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17235 emitMOVQ_Reg_RegInd( 17236 getXMM_Reg(MIR_Move.getResult(inst)), 17237 getBase(MIR_Move.getValue(inst))); 17238 } 17239 } 17240 } 17241 } 17242 } 17243 17244 } else { 17245 if (isMM_Reg(MIR_Move.getValue(inst))) { 17246 if (isAbs(MIR_Move.getResult(inst))) { 17247 emitMOVQ_Abs_Reg( 17248 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 17249 getMM_Reg(MIR_Move.getValue(inst))); 17250 17251 } else { 17252 if (isRegDisp(MIR_Move.getResult(inst))) { 17253 emitMOVQ_RegDisp_Reg( 17254 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17255 getMM_Reg(MIR_Move.getValue(inst))); 17256 17257 } else { 17258 if (isRegOff(MIR_Move.getResult(inst))) { 17259 emitMOVQ_RegOff_Reg( 17260 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17261 getMM_Reg(MIR_Move.getValue(inst))); 17262 17263 } else { 17264 if (isRegIdx(MIR_Move.getResult(inst))) { 17265 emitMOVQ_RegIdx_Reg( 17266 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17267 getMM_Reg(MIR_Move.getValue(inst))); 17268 17269 } else { 17270 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17271 emitMOVQ_RegInd_Reg( 17272 getBase(MIR_Move.getResult(inst)), 17273 getMM_Reg(MIR_Move.getValue(inst))); 17274 } 17275 } 17276 } 17277 } 17278 17279 } else { 17280 if (isAbs(MIR_Move.getResult(inst))) { 17281 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17282 emitMOVQ_Abs_Reg( 17283 getDisp(MIR_Move.getResult(inst)).toWord().toAddress(), 17284 getXMM_Reg(MIR_Move.getValue(inst))); 17285 17286 } else { 17287 if (isRegDisp(MIR_Move.getResult(inst))) { 17288 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17289 emitMOVQ_RegDisp_Reg( 17290 getBase(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17291 getXMM_Reg(MIR_Move.getValue(inst))); 17292 17293 } else { 17294 if (isRegOff(MIR_Move.getResult(inst))) { 17295 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17296 emitMOVQ_RegOff_Reg( 17297 getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17298 getXMM_Reg(MIR_Move.getValue(inst))); 17299 17300 } else { 17301 if (isRegIdx(MIR_Move.getResult(inst))) { 17302 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17303 emitMOVQ_RegIdx_Reg( 17304 getBase(MIR_Move.getResult(inst)), getIndex(MIR_Move.getResult(inst)), getScale(MIR_Move.getResult(inst)), getDisp(MIR_Move.getResult(inst)), 17305 getXMM_Reg(MIR_Move.getValue(inst))); 17306 17307 } else { 17308 if (VM.VerifyAssertions && !isRegInd(MIR_Move.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17309 if (VM.VerifyAssertions && !isXMM_Reg(MIR_Move.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17310 emitMOVQ_RegInd_Reg( 17311 getBase(MIR_Move.getResult(inst)), 17312 getXMM_Reg(MIR_Move.getValue(inst))); 17313 } 17314 } 17315 } 17316 } 17317 } 17318 } 17319 } 17320 } 17321 17322 /** 17323 * Emit the given instruction, assuming that 17324 * it is a MIR_BinaryAcc instruction 17325 * and has a PSRLQ operator 17326 * 17327 * @param inst the instruction to assemble 17328 */ 17329 private void doPSRLQ(Instruction inst) { 17330 if (isMM_Reg(MIR_BinaryAcc.getResult(inst))) { 17331 if (isMM_Reg(MIR_BinaryAcc.getValue(inst))) { 17332 emitPSRLQ_Reg_Reg( 17333 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 17334 getMM_Reg(MIR_BinaryAcc.getValue(inst))); 17335 17336 } else { 17337 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 17338 emitPSRLQ_Reg_Abs( 17339 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 17340 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 17341 17342 } else { 17343 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 17344 emitPSRLQ_Reg_RegDisp( 17345 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 17346 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17347 17348 } else { 17349 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 17350 emitPSRLQ_Reg_RegOff( 17351 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 17352 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17353 17354 } else { 17355 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 17356 emitPSRLQ_Reg_RegIdx( 17357 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 17358 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17359 17360 } else { 17361 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17362 emitPSRLQ_Reg_RegInd( 17363 getMM_Reg(MIR_BinaryAcc.getResult(inst)), 17364 getBase(MIR_BinaryAcc.getValue(inst))); 17365 } 17366 } 17367 } 17368 } 17369 } 17370 17371 } else { 17372 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 17373 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17374 emitPSRLQ_Reg_Reg( 17375 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17376 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 17377 17378 } else { 17379 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 17380 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17381 emitPSRLQ_Reg_Abs( 17382 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17383 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 17384 17385 } else { 17386 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 17387 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17388 emitPSRLQ_Reg_RegDisp( 17389 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17390 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17391 17392 } else { 17393 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 17394 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17395 emitPSRLQ_Reg_RegOff( 17396 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17397 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17398 17399 } else { 17400 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 17401 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17402 emitPSRLQ_Reg_RegIdx( 17403 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17404 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17405 17406 } else { 17407 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17408 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17409 emitPSRLQ_Reg_RegInd( 17410 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17411 getBase(MIR_BinaryAcc.getValue(inst))); 17412 } 17413 } 17414 } 17415 } 17416 } 17417 } 17418 } 17419 17420 /** 17421 * Emit the given instruction, assuming that 17422 * it is a MIR_Nullary instruction 17423 * and has a FLDZ operator 17424 * 17425 * @param inst the instruction to assemble 17426 */ 17427 private void doFLDZ(Instruction inst) { 17428 if (VM.VerifyAssertions && !isFPR_Reg(MIR_Nullary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17429 emitFLDZ_Reg( 17430 getFPR_Reg(MIR_Nullary.getResult(inst))); 17431 } 17432 17433 /** 17434 * Emit the given instruction, assuming that 17435 * it is a MIR_BinaryAcc instruction 17436 * and has a ANDNPD operator 17437 * 17438 * @param inst the instruction to assemble 17439 */ 17440 private void doANDNPD(Instruction inst) { 17441 if (isXMM_Reg(MIR_BinaryAcc.getValue(inst))) { 17442 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17443 emitANDNPD_Reg_Reg( 17444 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17445 getXMM_Reg(MIR_BinaryAcc.getValue(inst))); 17446 17447 } else { 17448 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 17449 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17450 emitANDNPD_Reg_Abs( 17451 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17452 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 17453 17454 } else { 17455 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 17456 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17457 emitANDNPD_Reg_RegDisp( 17458 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17459 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17460 17461 } else { 17462 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 17463 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17464 emitANDNPD_Reg_RegOff( 17465 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17466 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17467 17468 } else { 17469 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 17470 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17471 emitANDNPD_Reg_RegIdx( 17472 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17473 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17474 17475 } else { 17476 if (VM.VerifyAssertions && !isXMM_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17477 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17478 emitANDNPD_Reg_RegInd( 17479 getXMM_Reg(MIR_BinaryAcc.getResult(inst)), 17480 getBase(MIR_BinaryAcc.getValue(inst))); 17481 } 17482 } 17483 } 17484 } 17485 } 17486 } 17487 17488 /** 17489 * Emit the given instruction, assuming that 17490 * it is a MIR_BinaryAcc instruction 17491 * and has a FIMUL operator 17492 * 17493 * @param inst the instruction to assemble 17494 */ 17495 private void doFIMUL(Instruction inst) { 17496 if (isWord(inst)) { 17497 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 17498 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17499 emitFIMUL_Reg_Abs_Word( 17500 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17501 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 17502 17503 } else { 17504 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 17505 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17506 emitFIMUL_Reg_RegDisp_Word( 17507 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17508 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17509 17510 } else { 17511 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 17512 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17513 emitFIMUL_Reg_RegOff_Word( 17514 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17515 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17516 17517 } else { 17518 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 17519 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17520 emitFIMUL_Reg_RegIdx_Word( 17521 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17522 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17523 17524 } else { 17525 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17526 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17527 emitFIMUL_Reg_RegInd_Word( 17528 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17529 getBase(MIR_BinaryAcc.getValue(inst))); 17530 } 17531 } 17532 } 17533 } 17534 17535 } else { 17536 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 17537 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17538 emitFIMUL_Reg_Abs( 17539 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17540 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 17541 17542 } else { 17543 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 17544 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17545 emitFIMUL_Reg_RegDisp( 17546 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17547 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17548 17549 } else { 17550 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 17551 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17552 emitFIMUL_Reg_RegOff( 17553 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17554 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17555 17556 } else { 17557 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 17558 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17559 emitFIMUL_Reg_RegIdx( 17560 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17561 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17562 17563 } else { 17564 if (VM.VerifyAssertions && !isFPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17565 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17566 emitFIMUL_Reg_RegInd( 17567 getFPR_Reg(MIR_BinaryAcc.getResult(inst)), 17568 getBase(MIR_BinaryAcc.getValue(inst))); 17569 } 17570 } 17571 } 17572 } 17573 } 17574 } 17575 17576 /** 17577 * Emit the given instruction, assuming that 17578 * it is a MIR_Multiply instruction 17579 * and has a IMUL1 operator 17580 * 17581 * @param inst the instruction to assemble 17582 */ 17583 private void doIMUL1(Instruction inst) { 17584 if (isQuad(inst)) { 17585 if (isGPR_Reg(MIR_Multiply.getValue(inst))) { 17586 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17587 emitIMUL1_Reg_Reg_Quad( 17588 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17589 getGPR_Reg(MIR_Multiply.getValue(inst))); 17590 17591 } else { 17592 if (isAbs(MIR_Multiply.getValue(inst))) { 17593 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17594 emitIMUL1_Reg_Abs_Quad( 17595 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17596 getDisp(MIR_Multiply.getValue(inst)).toWord().toAddress()); 17597 17598 } else { 17599 if (isRegDisp(MIR_Multiply.getValue(inst))) { 17600 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17601 emitIMUL1_Reg_RegDisp_Quad( 17602 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17603 getBase(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 17604 17605 } else { 17606 if (isRegOff(MIR_Multiply.getValue(inst))) { 17607 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17608 emitIMUL1_Reg_RegOff_Quad( 17609 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17610 getIndex(MIR_Multiply.getValue(inst)), getScale(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 17611 17612 } else { 17613 if (isRegIdx(MIR_Multiply.getValue(inst))) { 17614 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17615 emitIMUL1_Reg_RegIdx_Quad( 17616 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17617 getBase(MIR_Multiply.getValue(inst)), getIndex(MIR_Multiply.getValue(inst)), getScale(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 17618 17619 } else { 17620 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17621 if (VM.VerifyAssertions && !isRegInd(MIR_Multiply.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17622 emitIMUL1_Reg_RegInd_Quad( 17623 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17624 getBase(MIR_Multiply.getValue(inst))); 17625 } 17626 } 17627 } 17628 } 17629 } 17630 17631 } else { 17632 if (isGPR_Reg(MIR_Multiply.getValue(inst))) { 17633 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17634 emitIMUL1_Reg_Reg( 17635 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17636 getGPR_Reg(MIR_Multiply.getValue(inst))); 17637 17638 } else { 17639 if (isAbs(MIR_Multiply.getValue(inst))) { 17640 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17641 emitIMUL1_Reg_Abs( 17642 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17643 getDisp(MIR_Multiply.getValue(inst)).toWord().toAddress()); 17644 17645 } else { 17646 if (isRegDisp(MIR_Multiply.getValue(inst))) { 17647 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17648 emitIMUL1_Reg_RegDisp( 17649 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17650 getBase(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 17651 17652 } else { 17653 if (isRegOff(MIR_Multiply.getValue(inst))) { 17654 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17655 emitIMUL1_Reg_RegOff( 17656 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17657 getIndex(MIR_Multiply.getValue(inst)), getScale(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 17658 17659 } else { 17660 if (isRegIdx(MIR_Multiply.getValue(inst))) { 17661 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17662 emitIMUL1_Reg_RegIdx( 17663 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17664 getBase(MIR_Multiply.getValue(inst)), getIndex(MIR_Multiply.getValue(inst)), getScale(MIR_Multiply.getValue(inst)), getDisp(MIR_Multiply.getValue(inst))); 17665 17666 } else { 17667 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Multiply.getResult2(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17668 if (VM.VerifyAssertions && !isRegInd(MIR_Multiply.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17669 emitIMUL1_Reg_RegInd( 17670 getGPR_Reg(MIR_Multiply.getResult2(inst)), 17671 getBase(MIR_Multiply.getValue(inst))); 17672 } 17673 } 17674 } 17675 } 17676 } 17677 } 17678 } 17679 17680 /** 17681 * Emit the given instruction, assuming that 17682 * it is a MIR_Unary instruction 17683 * and has a MOVSXQ operator 17684 * 17685 * @param inst the instruction to assemble 17686 */ 17687 private void doMOVSXQ(Instruction inst) { 17688 if (isByte(inst)) { 17689 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 17690 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17691 emitMOVSXQ_Reg_Reg_Byte( 17692 getGPR_Reg(MIR_Unary.getResult(inst)), 17693 getGPR_Reg(MIR_Unary.getVal(inst))); 17694 17695 } else { 17696 if (isAbs(MIR_Unary.getVal(inst))) { 17697 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17698 emitMOVSXQ_Reg_Abs_Byte( 17699 getGPR_Reg(MIR_Unary.getResult(inst)), 17700 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 17701 17702 } else { 17703 if (isRegDisp(MIR_Unary.getVal(inst))) { 17704 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17705 emitMOVSXQ_Reg_RegDisp_Byte( 17706 getGPR_Reg(MIR_Unary.getResult(inst)), 17707 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 17708 17709 } else { 17710 if (isRegOff(MIR_Unary.getVal(inst))) { 17711 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17712 emitMOVSXQ_Reg_RegOff_Byte( 17713 getGPR_Reg(MIR_Unary.getResult(inst)), 17714 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 17715 17716 } else { 17717 if (isRegIdx(MIR_Unary.getVal(inst))) { 17718 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17719 emitMOVSXQ_Reg_RegIdx_Byte( 17720 getGPR_Reg(MIR_Unary.getResult(inst)), 17721 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 17722 17723 } else { 17724 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17725 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17726 emitMOVSXQ_Reg_RegInd_Byte( 17727 getGPR_Reg(MIR_Unary.getResult(inst)), 17728 getBase(MIR_Unary.getVal(inst))); 17729 } 17730 } 17731 } 17732 } 17733 } 17734 17735 } else { 17736 if (isGPR_Reg(MIR_Unary.getVal(inst))) { 17737 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17738 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17739 emitMOVSXQ_Reg_Reg_Word( 17740 getGPR_Reg(MIR_Unary.getResult(inst)), 17741 getGPR_Reg(MIR_Unary.getVal(inst))); 17742 17743 } else { 17744 if (isAbs(MIR_Unary.getVal(inst))) { 17745 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17746 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17747 emitMOVSXQ_Reg_Abs_Word( 17748 getGPR_Reg(MIR_Unary.getResult(inst)), 17749 getDisp(MIR_Unary.getVal(inst)).toWord().toAddress()); 17750 17751 } else { 17752 if (isRegDisp(MIR_Unary.getVal(inst))) { 17753 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17754 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17755 emitMOVSXQ_Reg_RegDisp_Word( 17756 getGPR_Reg(MIR_Unary.getResult(inst)), 17757 getBase(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 17758 17759 } else { 17760 if (isRegOff(MIR_Unary.getVal(inst))) { 17761 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17762 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17763 emitMOVSXQ_Reg_RegOff_Word( 17764 getGPR_Reg(MIR_Unary.getResult(inst)), 17765 getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 17766 17767 } else { 17768 if (isRegIdx(MIR_Unary.getVal(inst))) { 17769 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17770 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17771 emitMOVSXQ_Reg_RegIdx_Word( 17772 getGPR_Reg(MIR_Unary.getResult(inst)), 17773 getBase(MIR_Unary.getVal(inst)), getIndex(MIR_Unary.getVal(inst)), getScale(MIR_Unary.getVal(inst)), getDisp(MIR_Unary.getVal(inst))); 17774 17775 } else { 17776 if (VM.VerifyAssertions && !isGPR_Reg(MIR_Unary.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17777 if (VM.VerifyAssertions && !isRegInd(MIR_Unary.getVal(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17778 if (VM.VerifyAssertions && !isWord(inst)) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17779 emitMOVSXQ_Reg_RegInd_Word( 17780 getGPR_Reg(MIR_Unary.getResult(inst)), 17781 getBase(MIR_Unary.getVal(inst))); 17782 } 17783 } 17784 } 17785 } 17786 } 17787 } 17788 } 17789 17790 /** 17791 * Emit the given instruction, assuming that 17792 * it is a MIR_BinaryAcc instruction 17793 * and has a IMUL2 operator 17794 * 17795 * @param inst the instruction to assemble 17796 */ 17797 private void doIMUL2(Instruction inst) { 17798 if (isQuad(inst)) { 17799 if (isImm(MIR_BinaryAcc.getValue(inst))) { 17800 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17801 emitIMUL2_Reg_Imm_Quad( 17802 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17803 getImm(MIR_BinaryAcc.getValue(inst))); 17804 17805 } else { 17806 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 17807 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17808 emitIMUL2_Reg_Reg_Quad( 17809 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17810 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 17811 17812 } else { 17813 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 17814 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17815 emitIMUL2_Reg_Abs_Quad( 17816 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17817 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 17818 17819 } else { 17820 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 17821 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17822 emitIMUL2_Reg_RegDisp_Quad( 17823 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17824 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17825 17826 } else { 17827 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 17828 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17829 emitIMUL2_Reg_RegOff_Quad( 17830 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17831 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17832 17833 } else { 17834 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 17835 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17836 emitIMUL2_Reg_RegIdx_Quad( 17837 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17838 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17839 17840 } else { 17841 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17842 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17843 emitIMUL2_Reg_RegInd_Quad( 17844 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17845 getBase(MIR_BinaryAcc.getValue(inst))); 17846 } 17847 } 17848 } 17849 } 17850 } 17851 } 17852 17853 } else { 17854 if (isImm(MIR_BinaryAcc.getValue(inst))) { 17855 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17856 emitIMUL2_Reg_Imm( 17857 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17858 getImm(MIR_BinaryAcc.getValue(inst))); 17859 17860 } else { 17861 if (isGPR_Reg(MIR_BinaryAcc.getValue(inst))) { 17862 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17863 emitIMUL2_Reg_Reg( 17864 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17865 getGPR_Reg(MIR_BinaryAcc.getValue(inst))); 17866 17867 } else { 17868 if (isAbs(MIR_BinaryAcc.getValue(inst))) { 17869 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17870 emitIMUL2_Reg_Abs( 17871 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17872 getDisp(MIR_BinaryAcc.getValue(inst)).toWord().toAddress()); 17873 17874 } else { 17875 if (isRegDisp(MIR_BinaryAcc.getValue(inst))) { 17876 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17877 emitIMUL2_Reg_RegDisp( 17878 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17879 getBase(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17880 17881 } else { 17882 if (isRegOff(MIR_BinaryAcc.getValue(inst))) { 17883 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17884 emitIMUL2_Reg_RegOff( 17885 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17886 getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17887 17888 } else { 17889 if (isRegIdx(MIR_BinaryAcc.getValue(inst))) { 17890 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17891 emitIMUL2_Reg_RegIdx( 17892 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17893 getBase(MIR_BinaryAcc.getValue(inst)), getIndex(MIR_BinaryAcc.getValue(inst)), getScale(MIR_BinaryAcc.getValue(inst)), getDisp(MIR_BinaryAcc.getValue(inst))); 17894 17895 } else { 17896 if (VM.VerifyAssertions && !isGPR_Reg(MIR_BinaryAcc.getResult(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17897 if (VM.VerifyAssertions && !isRegInd(MIR_BinaryAcc.getValue(inst))) throw new OptimizingCompilerException("Unexpected operand " + inst.toString()); 17898 emitIMUL2_Reg_RegInd( 17899 getGPR_Reg(MIR_BinaryAcc.getResult(inst)), 17900 getBase(MIR_BinaryAcc.getValue(inst))); 17901 } 17902 } 17903 } 17904 } 17905 } 17906 } 17907 } 17908 } 17909 17910 /** 17911 * The number of instructions emitted so far 17912 */ 17913 private int instructionCount = 0; 17914 17915 @Override 17916 public void doInst(Instruction inst) { 17917 instructionCount++; 17918 resolveForwardReferences(instructionCount); 17919 switch (inst.getOpcode()) { 17920 case IA32_ORPS_opcode: 17921 doORPS(inst); 17922 break; 17923 case IA32_CVTSD2SIQ_opcode: 17924 doCVTSD2SIQ(inst); 17925 break; 17926 case IA32_CVTSI2SS_opcode: 17927 doCVTSI2SS(inst); 17928 break; 17929 case IA32_FUCOMIP_opcode: 17930 doFUCOMIP(inst); 17931 break; 17932 case IA32_CMPEQSD_opcode: 17933 doCMPEQSD(inst); 17934 break; 17935 case IA32_CDO_opcode: 17936 doCDO(inst); 17937 break; 17938 case IA32_CDQ_opcode: 17939 doCDQ(inst); 17940 break; 17941 case IA32_CVTTSD2SIQ_opcode: 17942 doCVTTSD2SIQ(inst); 17943 break; 17944 case IA32_ADDSS_opcode: 17945 doADDSS(inst); 17946 break; 17947 case IA32_FUCOMI_opcode: 17948 doFUCOMI(inst); 17949 break; 17950 case IA32_BSWAP_opcode: 17951 doBSWAP(inst); 17952 break; 17953 case IA32_CMPEQSS_opcode: 17954 doCMPEQSS(inst); 17955 break; 17956 case IA32_CVTSI2SD_opcode: 17957 doCVTSI2SD(inst); 17958 break; 17959 case IA32_SUB_opcode: 17960 doSUB(inst); 17961 break; 17962 case IA32_ADDSD_opcode: 17963 doADDSD(inst); 17964 break; 17965 case IA32_FIADD_opcode: 17966 doFIADD(inst); 17967 break; 17968 case IA32_FST_opcode: 17969 doFST(inst); 17970 break; 17971 case IA32_CMP_opcode: 17972 doCMP(inst); 17973 break; 17974 case IA32_MOVSD_opcode: 17975 doMOVSD(inst); 17976 break; 17977 case IA32_FSTP_opcode: 17978 doFSTP(inst); 17979 break; 17980 case IA32_CDQE_opcode: 17981 doCDQE(inst); 17982 break; 17983 case IA32_MOVLPD_opcode: 17984 doMOVLPD(inst); 17985 break; 17986 case IA32_METHODSTART_opcode: 17987 doMETHODSTART(inst); 17988 break; 17989 case IA32_BTC_opcode: 17990 doBTC(inst); 17991 break; 17992 case IA32_POP_opcode: 17993 doPOP(inst); 17994 break; 17995 case IA32_FLDLN2_opcode: 17996 doFLDLN2(inst); 17997 break; 17998 case IA32_ORPD_opcode: 17999 doORPD(inst); 18000 break; 18001 case IA32_FIDIV_opcode: 18002 doFIDIV(inst); 18003 break; 18004 case IA32_CMPUNORDSS_opcode: 18005 doCMPUNORDSS(inst); 18006 break; 18007 case IA32_MOVSS_opcode: 18008 doMOVSS(inst); 18009 break; 18010 case IA32_FNINIT_opcode: 18011 doFNINIT(inst); 18012 break; 18013 case IA32_SUBSS_opcode: 18014 doSUBSS(inst); 18015 break; 18016 case IA32_CVTSD2SI_opcode: 18017 doCVTSD2SI(inst); 18018 break; 18019 case IA32_XOR_opcode: 18020 doXOR(inst); 18021 break; 18022 case IA32_RCL_opcode: 18023 doRCL(inst); 18024 break; 18025 case IA32_MOVSX__B_opcode: 18026 case IA32_MOVSX__W_opcode: 18027 doMOVSX(inst); 18028 break; 18029 case IA32_FSUB_opcode: 18030 doFSUB(inst); 18031 break; 18032 case IA32_MOVLPS_opcode: 18033 doMOVLPS(inst); 18034 break; 18035 case IA32_FLD_opcode: 18036 doFLD(inst); 18037 break; 18038 case IA32_PUSH_opcode: 18039 doPUSH(inst); 18040 break; 18041 case IA32_CMPLTSS_opcode: 18042 doCMPLTSS(inst); 18043 break; 18044 case IA32_BTS_opcode: 18045 doBTS(inst); 18046 break; 18047 case IA32_RCR_opcode: 18048 doRCR(inst); 18049 break; 18050 case IA32_BTR_opcode: 18051 doBTR(inst); 18052 break; 18053 case IA32_CALL_opcode: 18054 doCALL(inst); 18055 break; 18056 case IA32_ANDPS_opcode: 18057 doANDPS(inst); 18058 break; 18059 case IA32_SET__B_opcode: 18060 doSET(inst); 18061 break; 18062 case IA32_FIST_opcode: 18063 doFIST(inst); 18064 break; 18065 case IA32_FFREE_opcode: 18066 doFFREE(inst); 18067 break; 18068 case IA32_FLDPI_opcode: 18069 doFLDPI(inst); 18070 break; 18071 case IA32_CMPORDSS_opcode: 18072 doCMPORDSS(inst); 18073 break; 18074 case IA32_FDIV_opcode: 18075 doFDIV(inst); 18076 break; 18077 case IA32_CMPNESS_opcode: 18078 doCMPNESS(inst); 18079 break; 18080 case IA32_SQRTSD_opcode: 18081 doSQRTSD(inst); 18082 break; 18083 case IA32_PAUSE_opcode: 18084 doPAUSE(inst); 18085 break; 18086 case IA32_MOVZX__W_opcode: 18087 case IA32_MOVZX__B_opcode: 18088 doMOVZX(inst); 18089 break; 18090 case IA32_BT_opcode: 18091 doBT(inst); 18092 break; 18093 case IA32_CVTSS2SI_opcode: 18094 doCVTSS2SI(inst); 18095 break; 18096 case IA32_CMPNLESD_opcode: 18097 doCMPNLESD(inst); 18098 break; 18099 case IA32_ANDPD_opcode: 18100 doANDPD(inst); 18101 break; 18102 case IA32_MOVSXDQ_opcode: 18103 doMOVSXDQ(inst); 18104 break; 18105 case IA32_CVTSS2SD_opcode: 18106 doCVTSS2SD(inst); 18107 break; 18108 case IA32_OFFSET_opcode: 18109 doOFFSET(inst); 18110 break; 18111 case IA32_FADD_opcode: 18112 doFADD(inst); 18113 break; 18114 case IA32_FILD_opcode: 18115 doFILD(inst); 18116 break; 18117 case IA32_CMPNESD_opcode: 18118 doCMPNESD(inst); 18119 break; 18120 case IA32_CVTSI2SDQ_opcode: 18121 doCVTSI2SDQ(inst); 18122 break; 18123 case IA32_CMPORDSD_opcode: 18124 doCMPORDSD(inst); 18125 break; 18126 case IA32_MULSS_opcode: 18127 doMULSS(inst); 18128 break; 18129 case IA32_PSLLQ_opcode: 18130 doPSLLQ(inst); 18131 break; 18132 case IA32_SHRD_opcode: 18133 doSHRD(inst); 18134 break; 18135 case IA32_DIVSD_opcode: 18136 doDIVSD(inst); 18137 break; 18138 case IA32_FLDL2E_opcode: 18139 doFLDL2E(inst); 18140 break; 18141 case IA32_CMPXCHG_opcode: 18142 doCMPXCHG(inst); 18143 break; 18144 case IA32_MOVAPD_opcode: 18145 doMOVAPD(inst); 18146 break; 18147 case IA32_FPREM_opcode: 18148 doFPREM(inst); 18149 break; 18150 case IA32_DIV_opcode: 18151 doDIV(inst); 18152 break; 18153 case IA32_NEG_opcode: 18154 doNEG(inst); 18155 break; 18156 case IA32_DIVSS_opcode: 18157 doDIVSS(inst); 18158 break; 18159 case IA32_FLDL2T_opcode: 18160 doFLDL2T(inst); 18161 break; 18162 case IA32_MOVAPS_opcode: 18163 doMOVAPS(inst); 18164 break; 18165 case IA32_FSUBP_opcode: 18166 doFSUBP(inst); 18167 break; 18168 case IA32_FSUBR_opcode: 18169 doFSUBR(inst); 18170 break; 18171 case IA32_CVTTSS2SI_opcode: 18172 doCVTTSS2SI(inst); 18173 break; 18174 case IA32_RET_opcode: 18175 doRET(inst); 18176 break; 18177 case IA32_ADC_opcode: 18178 doADC(inst); 18179 break; 18180 case IA32_ADD_opcode: 18181 doADD(inst); 18182 break; 18183 case IA32_CMPLESD_opcode: 18184 doCMPLESD(inst); 18185 break; 18186 case IA32_FISUB_opcode: 18187 doFISUB(inst); 18188 break; 18189 case IA32_XORPS_opcode: 18190 doXORPS(inst); 18191 break; 18192 case IA32_MFENCE_opcode: 18193 doMFENCE(inst); 18194 break; 18195 case IA32_FCOMIP_opcode: 18196 doFCOMIP(inst); 18197 break; 18198 case IA32_FMULP_opcode: 18199 doFMULP(inst); 18200 break; 18201 case IA32_CMPLESS_opcode: 18202 doCMPLESS(inst); 18203 break; 18204 case IA32_FISTP_opcode: 18205 doFISTP(inst); 18206 break; 18207 case IA32_RDTSC_opcode: 18208 doRDTSC(inst); 18209 break; 18210 case IA32_MULSD_opcode: 18211 doMULSD(inst); 18212 break; 18213 case IA32_XORPD_opcode: 18214 doXORPD(inst); 18215 break; 18216 case IA32_FLD1_opcode: 18217 doFLD1(inst); 18218 break; 18219 case IA32_FXCH_opcode: 18220 doFXCH(inst); 18221 break; 18222 case IA32_SHL_opcode: 18223 doSHL(inst); 18224 break; 18225 case IA32_SHR_opcode: 18226 doSHR(inst); 18227 break; 18228 case IA32_CMPNLESS_opcode: 18229 doCMPNLESS(inst); 18230 break; 18231 case IA32_FNSAVE_opcode: 18232 doFNSAVE(inst); 18233 break; 18234 case IA32_MUL_opcode: 18235 doMUL(inst); 18236 break; 18237 case IA32_FCHS_opcode: 18238 doFCHS(inst); 18239 break; 18240 case IA32_FINIT_opcode: 18241 doFINIT(inst); 18242 break; 18243 case IA32_IDIV_opcode: 18244 doIDIV(inst); 18245 break; 18246 case IA32_SHLD_opcode: 18247 doSHLD(inst); 18248 break; 18249 case IA32_FFREEP_opcode: 18250 doFFREEP(inst); 18251 break; 18252 case IA32_UCOMISD_opcode: 18253 doUCOMISD(inst); 18254 break; 18255 case IA32_ROL_opcode: 18256 doROL(inst); 18257 break; 18258 case IA32_NOT_opcode: 18259 doNOT(inst); 18260 break; 18261 case IA32_ROR_opcode: 18262 doROR(inst); 18263 break; 18264 case IA32_FCOMI_opcode: 18265 doFCOMI(inst); 18266 break; 18267 case IA32_TEST_opcode: 18268 doTEST(inst); 18269 break; 18270 case IA32_AND_opcode: 18271 doAND(inst); 18272 break; 18273 case IA32_FNSTCW_opcode: 18274 doFNSTCW(inst); 18275 break; 18276 case IA32_MOVZXQ__W_opcode: 18277 case IA32_MOVZXQ__B_opcode: 18278 doMOVZXQ(inst); 18279 break; 18280 case IA32_FDIVRP_opcode: 18281 doFDIVRP(inst); 18282 break; 18283 case IA32_FDIVR_opcode: 18284 doFDIVR(inst); 18285 break; 18286 case IA32_SQRTSS_opcode: 18287 doSQRTSS(inst); 18288 break; 18289 case IA32_UCOMISS_opcode: 18290 doUCOMISS(inst); 18291 break; 18292 case IA32_FMUL_opcode: 18293 doFMUL(inst); 18294 break; 18295 case IA32_INC_opcode: 18296 doINC(inst); 18297 break; 18298 case IA32_SAL_opcode: 18299 doSAL(inst); 18300 break; 18301 case IA32_FDIVP_opcode: 18302 doFDIVP(inst); 18303 break; 18304 case IA32_CMPUNORDSD_opcode: 18305 doCMPUNORDSD(inst); 18306 break; 18307 case IA32_SAR_opcode: 18308 doSAR(inst); 18309 break; 18310 case IA32_CMPXCHG8B_opcode: 18311 doCMPXCHG8B(inst); 18312 break; 18313 case IA32_SUBSD_opcode: 18314 doSUBSD(inst); 18315 break; 18316 case IA32_FSTSW_opcode: 18317 doFSTSW(inst); 18318 break; 18319 case IA32_FADDP_opcode: 18320 doFADDP(inst); 18321 break; 18322 case IA32_FLDCW_opcode: 18323 doFLDCW(inst); 18324 break; 18325 case IA32_FRSTOR_opcode: 18326 doFRSTOR(inst); 18327 break; 18328 case IA32_CMOV_opcode: 18329 doCMOV(inst); 18330 break; 18331 case IA32_INT_opcode: 18332 doINT(inst); 18333 break; 18334 case IA32_CMPLTSD_opcode: 18335 doCMPLTSD(inst); 18336 break; 18337 case IA32_CVTSD2SS_opcode: 18338 doCVTSD2SS(inst); 18339 break; 18340 case IA32_SBB_opcode: 18341 doSBB(inst); 18342 break; 18343 case IA32_FIDIVR_opcode: 18344 doFIDIVR(inst); 18345 break; 18346 case IA32_FSTCW_opcode: 18347 doFSTCW(inst); 18348 break; 18349 case IA32_FLDLG2_opcode: 18350 doFLDLG2(inst); 18351 break; 18352 case IA32_PREFETCHNTA_opcode: 18353 doPREFETCHNTA(inst); 18354 break; 18355 case IA32_CMPNLTSD_opcode: 18356 doCMPNLTSD(inst); 18357 break; 18358 case IA32_OR_opcode: 18359 doOR(inst); 18360 break; 18361 case IA32_DEC_opcode: 18362 doDEC(inst); 18363 break; 18364 case IA32_CVTTSD2SI_opcode: 18365 doCVTTSD2SI(inst); 18366 break; 18367 case IA32_LEA_opcode: 18368 doLEA(inst); 18369 break; 18370 case IA32_FISUBR_opcode: 18371 doFISUBR(inst); 18372 break; 18373 case IA32_ANDNPS_opcode: 18374 doANDNPS(inst); 18375 break; 18376 case IA32_FCMOV_opcode: 18377 doFCMOV(inst); 18378 break; 18379 case IA32_CMPNLTSS_opcode: 18380 doCMPNLTSS(inst); 18381 break; 18382 case IA32_MOVD_opcode: 18383 doMOVD(inst); 18384 break; 18385 case IA32_FSUBRP_opcode: 18386 doFSUBRP(inst); 18387 break; 18388 case IA32_MOV_opcode: 18389 doMOV(inst); 18390 break; 18391 case IA32_MOVQ_opcode: 18392 doMOVQ(inst); 18393 break; 18394 case IA32_PSRLQ_opcode: 18395 doPSRLQ(inst); 18396 break; 18397 case IA32_FLDZ_opcode: 18398 doFLDZ(inst); 18399 break; 18400 case IA32_ANDNPD_opcode: 18401 doANDNPD(inst); 18402 break; 18403 case IA32_FIMUL_opcode: 18404 doFIMUL(inst); 18405 break; 18406 case IA32_IMUL1_opcode: 18407 doIMUL1(inst); 18408 break; 18409 case IA32_MOVSXQ__B_opcode: 18410 case IA32_MOVSXQ__W_opcode: 18411 doMOVSXQ(inst); 18412 break; 18413 case IA32_IMUL2_opcode: 18414 doIMUL2(inst); 18415 break; 18416 case IA32_JCC_opcode: 18417 doJCC(inst); 18418 break; 18419 case IA32_JMP_opcode: 18420 doJMP(inst); 18421 break; 18422 case IA32_LOCK_opcode: 18423 emitLockNextInstruction(); 18424 break; 18425 case IG_PATCH_POINT_opcode: 18426 emitPatchPoint(); 18427 break; 18428 case IMMQ_MOV_opcode: 18429 doIMMQ_MOV(inst); 18430 break; 18431 case MIR_LOWTABLESWITCH_opcode: 18432 doLOWTABLESWITCH(inst); 18433 // kludge table switches that are unusually long instructions 18434 instructionCount += MIR_LowTableSwitch.getNumberOfTargets(inst); 18435 break; 18436 case IA32_LOCK_CMPXCHG_opcode: 18437 case IA32_FCLEAR_opcode: 18438 case IA32_TRAPIF_opcode: 18439 case IA32_FMOV_ENDING_LIVE_RANGE_opcode: 18440 case IA32_FNSTSW_opcode: 18441 case IA32_JCC2_opcode: 18442 case IA32_FEXAM_opcode: 18443 case IA32_SYSCALL_opcode: 18444 case IA32_FMOV_opcode: 18445 case IA32_LOCK_CMPXCHG8B_opcode: 18446 throw new OptimizingCompilerException(inst + " has unimplemented IA32 opcode (check excludedOpcodes)"); 18447 } 18448 mcOffsets.setMachineCodeOffset(inst, mi); 18449 } 18450 18451 18452}