001    /*
002     *  This file is part of the Jikes RVM project (http://jikesrvm.org).
003     *
004     *  This file is licensed to You under the Eclipse Public License (EPL);
005     *  You may not use this file except in compliance with the License. You
006     *  may obtain a copy of the License at
007     *
008     *      http://www.opensource.org/licenses/eclipse-1.0.php
009     *
010     *  See the COPYRIGHT.txt file distributed with this work for information
011     *  regarding copyright ownership.
012     */
013    package org.jikesrvm.compilers.opt.driver.ia32;
014    
015    import java.util.ArrayList;
016    
017    import org.jikesrvm.compilers.opt.MutateSplits;
018    import org.jikesrvm.compilers.opt.OptOptions;
019    import org.jikesrvm.compilers.opt.controlflow.MIRBranchOptimizations;
020    import org.jikesrvm.compilers.opt.driver.IRPrinter;
021    import org.jikesrvm.compilers.opt.driver.OptimizationPlanElement;
022    import org.jikesrvm.compilers.opt.driver.OptimizationPlanner;
023    import org.jikesrvm.compilers.opt.lir2mir.ConvertLIRtoMIR;
024    import org.jikesrvm.compilers.opt.lir2mir.SplitBasicBlock;
025    import org.jikesrvm.compilers.opt.liveness.LiveAnalysis;
026    import org.jikesrvm.compilers.opt.mir2mc.ConvertMIRtoMC;
027    import org.jikesrvm.compilers.opt.regalloc.ExpandCallingConvention;
028    import org.jikesrvm.compilers.opt.regalloc.PrologueEpilogueCreator;
029    import org.jikesrvm.compilers.opt.regalloc.RegisterAllocator;
030    import org.jikesrvm.compilers.opt.regalloc.ia32.ExpandFPRStackConvention;
031    import org.jikesrvm.compilers.opt.regalloc.ia32.MIRSplitRanges;
032    
033    /**
034     * This class specifies the order in which CompilerPhases are
035     * executed in the target-specific backend of the optimzing compiler.
036     * The methods LIR2MIR, MIROptimizations, and MIR2MC each specify the
037     * elements that make up the main compilation stages.
038     */
039    public class MIROptimizationPlanner extends OptimizationPlanner {
040    
041      /**
042       * Initialize the "master plan" for the IA32 backend of the opt compiler.
043       */
044      public static void intializeMasterPlan(ArrayList<OptimizationPlanElement> temp) {
045        LIR2MIR(temp);
046        MIROptimizations(temp);
047        MIR2MC(temp);
048      }
049    
050      /**
051       * This method defines the optimization plan elements that
052       * are to be performed to convert LIR to IA32 MIR.
053       *
054       * @param p the plan under construction
055       */
056      private static void LIR2MIR(ArrayList<OptimizationPlanElement> p) {
057        composeComponents(p, "Convert LIR to MIR", new Object[]{
058            // Split very large basic blocks into smaller ones.
059            new SplitBasicBlock(),
060            // Optional printing of final LIR
061            new IRPrinter("Final LIR") {
062              public boolean shouldPerform(OptOptions options) {
063                return options.PRINT_FINAL_LIR;
064              }
065            },
066            // Change operations that split live ranges to moves
067            new MutateSplits(),
068            // Instruction Selection
069            new ConvertLIRtoMIR(),
070    
071            // Optional printing of initial MIR
072            new IRPrinter("Initial MIR") {
073              public boolean shouldPerform(OptOptions options) {
074                return options.PRINT_MIR;
075              }
076            }});
077      }
078    
079      /**
080       * This method defines the optimization plan elements that
081       * are to be performed on IA32 MIR.
082       *
083       * @param p the plan under construction
084       */
085      private static void MIROptimizations(ArrayList<OptimizationPlanElement> p) {
086        // Register Allocation
087        composeComponents(p, "Register Mapping", new Object[]{new MIRSplitRanges(),
088                                                              // MANDATORY: Expand calling convention
089                                                              new ExpandCallingConvention(),
090                                                              // MANDATORY: Insert defs/uses due to floating-point stack
091                                                              new ExpandFPRStackConvention(),
092                                                              // MANDATORY: Perform Live analysis and create GC maps
093                                                              new LiveAnalysis(true, false),
094                                                              // MANDATORY: Perform register allocation
095                                                              new RegisterAllocator(),
096                                                              // MANDATORY: Add prologue and epilogue
097                                                              new PrologueEpilogueCreator(),});
098        // Peephole branch optimizations
099        addComponent(p, new MIRBranchOptimizations(1));
100      }
101    
102      /**
103       * This method defines the optimization plan elements that
104       * are to be performed to convert IA32 MIR into
105       * ready-to-execute machinecode (and associated mapping tables).
106       *
107       * @param p the plan under construction
108       */
109      private static void MIR2MC(ArrayList<OptimizationPlanElement> p) {
110        // MANDATORY: Final assembly
111        addComponent(p, new ConvertMIRtoMC());
112      }
113    
114    }